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DSDT - Vanilla Speedstep - Generic Scope (_PR)


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#441
barnum

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Hi Beerkex'd,

I've look your P-states and I see only 4 on you DSDT :

Package (0x06) { 0x0C5E, 0x00015BA8, 0x0A, 0x0A, 0x4922, 0x4922},
Package (0x06) { 0x0A6E, 0x00012CC8, 0x0A, 0x0A, 0x081E, 0x081E},
Package (0x06) { 0x0920, 0x000101D0, 0x0A, 0x0A, 0x071A, 0x071A},
Package (0x06) { 0x07D3, 0xDEA8, 0x0A, 0x0A, 0x0616, 0x0616}

In you screenshot you have 8 ?
Can you explain to me how you have this 8 p-states

regards,

#442
William Parker

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Hi,
An essential tool which was quite hard to track down - Voodoo Monitor / VoodooMonitor version 1.0.7. As yeeha pointed out it is the latest iteration of CPU-i by mojodojo. It works nicely in the 64 bit kernel and is quite responsive. Thought I'd share..

Attached Files



#443
Master Chief

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Here's what I got with LegacyAGPMEnabler and the Legacy SMBUS kext + adding the SBUS device to my DSDT. And of course the P-states. I'm still using iMac9,1 as model identifier - And so Snow Leopard thinks my E8500 is a Penryn CPU.


Thanks Master Chief, for all your awesome work and research.

Thanks man!

I have a rarely occurring issue where the 9800 GTX+ fan will spin up to full speed, followed by instant reboot. I want to see if that still happens but I haven't figured out how to trigger it.

Interesting. Let me know when you found out what it was :D

btw if you keep the SPKR device in the DSDT, Parallels will use it when it boots a virtual machine! I guess they must have left the code in from the PC version.

I do have Parallels 4.something but I didn't knew this. Let me check later today.

I didn't have to patch the device ID of the SBUS device. Here's my DSDT if you want to see how it works on ASUS P5Q-E.

Looks awesome.

I didn't rip out all the SIOR stuff, I can't figure out which parts are safe to remove.

Start by modifying your _PTS and _WAK objects first. Look at my code, then rip out the underlaying code.

I see that you was smart enough not to RIP _PDC and _OSC because I tell you these are mighty important. I know that some people here (and there) make you believe that these are not important. Well... let's see what they mean to your system:

_PDC (Processor Driver Capabilities)
_OSC (Operating System Capabilities)

Now read that, and think for a moment. Do I want to fry another CPU? No thanks. Next.

There's also stuff in your dsdt.dsl that should NOT be there. The following targets are most likely inserted by you after reading stuff here, but please, please remove these again:

_PPC, _PCT, _PSD, _PSS, SPSS, NPSS,

The reasons for this is that your DSDT already loads these object with the following statements:
Load (GV00, HI[0/1])
I mean all these code duplications make my head spin. This is about global name space pollution (Google it) I guess that you are not a developer, which is fine of course, but we developers are hammered with bugs due to this. Have a look at DSDT V2.7 and note that DSDT V2.8 will be released later today with stuff you want to fix this. In short: Do not pollute the global/_PR name space with unrelated objects. It screams for BUGS.

Note: You only need _PSS when you want/need to modify or expand the P-State values!

And there's one big fat plus in it for you... Yep. because you won't need to search for related code. All nice and tidy in one block. Hand in hand. As it supposed to be -_-

p.s. They have got to fix these F'ing database errors once and for all.... I am getting so sick of thenm (I was not even able to fix by type due to these DBF error! Grrrr!

#444
Master Chief

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Give me some time and I'll add part two, showing C-States working, lowering the CPU temperature by almost 25 degrees centigrade!


And this my friends is the stunning result....

With _CST (no errors in kernel.log) but without _PDC object:
Posted Image

With _PDC and _CST objects:

Posted Image

Well... what else can I say....

#445
Beerkex'd

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I've look your P-states and I see only 4 on you DSDT :
In you screenshot you have 8 ?
Can you explain to me how you have this 8 p-states

Um...by luck? :)

(I seriously don't know, Ask Master Chief).

I guess that you are not a developer

Hell no, I'm a musician. Hackintoshing is a hobby. I don't even use my "iMac" for anything serious, I mostly just tweak and marvel at it :D
I am old enough to have typed in game listings from magazines on my ZX Spectrum in the early 80's. I remember having at least as much fun debugging and changing things in the code as i did actually playing the games. But I never got into assembler, and then later came the music.

I will wait for your 2.8 and then compare DSDTs again, while ripping out NPSS and friends in the meantime.

/edit - removed them - all 8 p-states are still working, idle temp hovers at the same comfy 37-39 degrees.

The reason why it's placed all neatly at the end of my DSDT like that is that I used FormerlyKnownAs' original DSDT from the first post as "inspiration". All the code there is from my own ACPI dumps (posted earlier in the thread as you know) though. But thanks for the compliment, I'm a little embarassed because (surprise :) ) I don't really know what I'm doing, so I try to mix logic with instinct and follow the code the best I can.

#446
Master Chief

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Um...by luck? ;)

(I seriously don't know, Ask Master Chief).

Your CPU supports eight P-States (as displayed) but you might have only four listed under Status in CPU-i due to your _PSS object. You can use this information and make them all work by expanding your _PSS object.

Hell no, I'm a musician. Hackintoshing is a hobby.
I am old enough to have typed in game listings from magazines on my ZX Spectrum back in 1982. I remember having at least as much fun debugging and changing things in the code as actually playing the games. But I never got into assembler, and then later came the music.

Hm. Sounds like we're pretty close age wise. I myself joined the Commodore community in 1986.

I will wait for your 2.8 and then compare DSDTs again, while ripping out NPSS and friends in the meantime.

It's already available from post #3 there. Still have to announce it though.

The reason why it's placed all neatly at the end of my DSDT like that is that I used FormerlyKnownAs' original DSDT from the first post as "inspiration". All the code there is from my own ACPI dumps (posted earlier in the thread as you know) though. But thanks for the compliment, I'm a little embarassed because (surprise ;) ) I don't really know what I'm doing, I see the general outline of things and try to follow the logic.

And I'm not much of a musician, so there is really no need to be embarrassed. You are doing a great job. And we're all here for fun... and ultimately to get the job done.

Cheers my friend!

#447
verdant

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And this my friends is the stunning result....

With _CST (no errors in kernel.log) but without _PDC object:
Posted Image

With _PDC and _CST objects:

Posted Image

Well... what else can I say....


Hi Master Chief, I hope this is not off-topic but on my 650i nForce chipset MOBO with the current BIOS settings (I will get to my specific question at the end)......

CPU Internal Thermal Control [AUTO]
Limit CPUID MaxVal [DISABLED]
Enhanced C1 (C1E) [DISABLED]
Execute Disable Bit [ENABLED]
Virtualization Technology [DISABLED]
Enhanced Intel Speedstep Technology [DISABLED]

VoodooMonitor v1.0.7 shows, with changing temps.....

Attached File  VoodooMonitor1.tiff   25.28KB   21 downloads Attached File  VoodooMonitor2.tiff   45.95KB   12 downloads Attached File  VoodooMonitor3.tiff   44.11KB   10 downloads

compared with FanSpeed temps in Vista of

Core 0 48°C
Core 1 46°C
Core 2 42°C
Core 3 46°C

Now my Ubuntu Linux ACPI Table dump using

sudo mkdir ACPI && dmesg | perl -we '$n=0; while (<>) { if  (($t,$a,$l,$o) = (/^[^a-zA-Z]*ACPI: ([-._A-Z0-9]{4,4})  +([0-9A-F]{8,8}), ([0-9A-F]{4,4})+(?:\s*\(([^)]+))?/)) { $o &&  $o=~s/[^-._a-zA-Z0-9]+/-/g; ($cmd="acpidump -a $a -l $l >  \"ACPI/${t}".($o?"_$o":"").".aml\""); print "Running command:  \"$cmd\"\n"; system($cmd); ++$n; } } die("No match") unless $n;'  && zip -r ACPI-Tables.zip ACPI

which I believe should dump SSDT tables (including C-states), produced

Attached File  ACPITables.tiff   49.3KB   10 downloads

with my FACP table showing:

/* * Intel ACPI Component Architecture * AML Disassembler version 20090730 * * Disassembly of ./dsdt.aml, Wed Oct 14 20:54:33 2009 * * ACPI Data Table [FACP] * * Format: [HexOffset DecimalOffset ByteLength]  FieldName : FieldValue */[000h 0000  4]                    Signature : "FACP"    /* Fixed ACPI Description Table */[004h 0004  4]                 Table Length : 000000F4[008h 0008  1]                     Revision : 03[009h 0009  1]                     Checksum : 3D[00Ah 0010  6]                       Oem ID : "Nvidia"[010h 0016  8]                 Oem Table ID : "ASUSACPI"[018h 0024  4]                 Oem Revision : 42302E31[01Ch 0028  4]              Asl Compiler ID : "AWRD"[020h 0032  4]        Asl Compiler Revision : 00000000[024h 0036  4]                 FACS Address : CFEF0000[028h 0040  4]                 DSDT Address : CFEF3240[02Ch 0044  1]                        Model : 00[02Dh 0045  1]                   PM Profile : 01 (Desktop)[02Eh 0046  2]                SCI Interrupt : 0009[030h 0048  4]             SMI Command Port : 0000142E[034h 0052  1]            ACPI Enable Value : A1[035h 0053  1]           ACPI Disable Value : A0[036h 0054  1]               S4BIOS Command : 00[037h 0055  1]              P-State Control : 34[038h 0056  4]     PM1A Event Block Address : 00001000[03Ch 0060  4]     PM1B Event Block Address : 00000000[040h 0064  4]   PM1A Control Block Address : 00001004[044h 0068  4]   PM1B Control Block Address : 00000000[048h 0072  4]    PM2 Control Block Address : 0000101C[04Ch 0076  4]       PM Timer Block Address : 00001008[050h 0080  4]           GPE0 Block Address : 00001020[054h 0084  4]           GPE1 Block Address : 000014A0[058h 0088  1]       PM1 Event Block Length : 04[059h 0089  1]     PM1 Control Block Length : 02[05Ah 0090  1]     PM2 Control Block Length : 01[05Bh 0091  1]        PM Timer Block Length : 04[05Ch 0092  1]            GPE0 Block Length : 08[05Dh 0093  1]            GPE1 Block Length : 10[05Eh 0094  1]             GPE1 Base Offset : 20[05Fh 0095  1]                 _CST Support : 00[060h 0096  2]                   C2 Latency : 0065[062h 0098  2]                   C3 Latency : 03E9[064h 0100  2]               CPU Cache Size : 0000[066h 0102  2]           Cache Flush Stride : 0000[068h 0104  1]            Duty Cycle Offset : 01[069h 0105  1]             Duty Cycle Width : 03[06Ah 0106  1]          RTC Day Alarm Index : 7D[06Bh 0107  1]        RTC Month Alarm Index : 7E[06Ch 0108  1]            RTC Century Index : 32[06Dh 0109  2]   Boot Flags (decoded below) : 0000              Legacy Devices Supported (V2) : 0           8042 Present on ports 60/64 (V2) : 0                       VGA Not Present (V4) : 0                     MSI Not Supported (V4) : 0               PCIe ASPM Not Supported (V4) : 0[06Fh 0111  1]                     Reserved : 00[070h 0112  4]        Flags (decoded below) : 000004A5     WBINVD instruction is operational (V1) : 1             WBINVD flushes all caches (V1) : 0                   All CPUs support C1 (V1) : 1                 C2 works on MP system (V1) : 0           Control Method Power Button (V1) : 0           Control Method Sleep Button (V1) : 1       RTC wake not in fixed reg space (V1) : 0           RTC can wake system from S4 (V1) : 1                       32-bit PM Timer (V1) : 0                     Docking Supported (V1) : 0              Reset Register Supported (V2) : 1                           Sealed Case (V3) : 0                   Headless - No Video (V3) : 0       Use native instr after SLP_TYPx (V3) : 0             PCIEXP_WAK Bits Supported (V4) : 0                    Use Platform Timer (V4) : 0              RTC_STS valid on S4 wake (V4) : 0               Remote Power-on capable (V4) : 0                Use APIC Cluster Model (V4) : 0    Use APIC Physical Destination Mode (V4) : 0[074h 0116 12]               Reset Register : [074h 0116  1]                     Space ID : 01 (SystemIO)[075h 0117  1]                    Bit Width : 08[076h 0118  1]                   Bit Offset : 00[077h 0119  1]                 Access Width : 00[078h 0120  8]                      Address : 0000000000000CF9[080h 0128  1]         Value to cause reset : 06[081h 0129  3]                     Reserved : 000000[084h 0132  8]                 FACS Address : 00000000CFEF0000[08Ch 0140  8]                 DSDT Address : 00000000CFEF3240[094h 0148 12]             PM1A Event Block : [094h 0148  1]                     Space ID : 01 (SystemIO)[095h 0149  1]                    Bit Width : 08[096h 0150  1]                   Bit Offset : 00[097h 0151  1]                 Access Width : 00[098h 0152  8]                      Address : 0000000000001000[0A0h 0160 12]             PM1B Event Block : [0A0h 0160  1]                     Space ID : 01 (SystemIO)[0A1h 0161  1]                    Bit Width : 08[0A2h 0162  1]                   Bit Offset : 00[0A3h 0163  1]                 Access Width : 00[0A4h 0164  8]                      Address : 0000000000000000[0ACh 0172 12]           PM1A Control Block : [0ACh 0172  1]                     Space ID : 01 (SystemIO)[0ADh 0173  1]                    Bit Width : 08[0AEh 0174  1]                   Bit Offset : 00[0AFh 0175  1]                 Access Width : 00[0B0h 0176  8]                      Address : 0000000000001004[0B8h 0184 12]           PM1B Control Block : [0B8h 0184  1]                     Space ID : 01 (SystemIO)[0B9h 0185  1]                    Bit Width : 08[0BAh 0186  1]                   Bit Offset : 00[0BBh 0187  1]                 Access Width : 00[0BCh 0188  8]                      Address : 0000000000000000[0C4h 0196 12]            PM2 Control Block : [0C4h 0196  1]                     Space ID : 01 (SystemIO)[0C5h 0197  1]                    Bit Width : 08[0C6h 0198  1]                   Bit Offset : 00[0C7h 0199  1]                 Access Width : 00[0C8h 0200  8]                      Address : 000000000000101C[0D0h 0208 12]               PM Timer Block : [0D0h 0208  1]                     Space ID : 01 (SystemIO)[0D1h 0209  1]                    Bit Width : 08[0D2h 0210  1]                   Bit Offset : 00[0D3h 0211  1]                 Access Width : 00[0D4h 0212  8]                      Address : 0000000000001008[0DCh 0220 12]                   GPE0 Block : [0DCh 0220  1]                     Space ID : 01 (SystemIO)[0DDh 0221  1]                    Bit Width : 08[0DEh 0222  1]                   Bit Offset : 00[0DFh 0223  1]                 Access Width : 00[0E0h 0224  8]                      Address : 0000000000001020[0E8h 0232 12]                   GPE1 Block : [0E8h 0232  1]                     Space ID : 01 (SystemIO)[0E9h 0233  1]                    Bit Width : 08[0EAh 0234  1]                   Bit Offset : 00[0EBh 0235  1]                 Access Width : 00[0ECh 0236  8]                      Address : 00000000000014A0Raw Table Data  0000: 46 41 43 50 F4 00 00 00 03 3D 4E 76 69 64 69 61  FACP.....=Nvidia  0010: 41 53 55 53 41 43 50 49 31 2E 30 42 41 57 52 44  ASUSACPI1.0BAWRD  0020: 00 00 00 00 00 00 EF CF 40 32 EF CF 00 01 09 00  ........@2......  0030: 2E 14 00 00 A1 A0 00 34 00 10 00 00 00 00 00 00  .......4........  0040: 04 10 00 00 00 00 00 00 1C 10 00 00 08 10 00 00  ................  0050: 20 10 00 00 A0 14 00 00 04 02 01 04 08 10 20 00   ............. .  0060: 65 00 E9 03 00 00 00 00 01 03 7D 7E 32 00 00 00  e.........}~2...  0070: A5 04 00 00 01 08 00 00 F9 0C 00 00 00 00 00 00  ................  0080: 06 00 00 00 00 00 EF CF 00 00 00 00 40 32 EF CF  ............@2..  0090: 00 00 00 00 01 08 00 00 00 10 00 00 00 00 00 00  ................  00A0: 01 08 00 00 00 00 00 00 00 00 00 00 01 08 00 00  ................  00B0: 04 10 00 00 00 00 00 00 01 08 00 00 00 00 00 00  ................  00C0: 00 00 00 00 01 08 00 00 1C 10 00 00 00 00 00 00  ................  00D0: 01 08 00 00 08 10 00 00 00 00 00 00 01 08 00 00  ................  00E0: 20 10 00 00 00 00 00 00 01 08 00 00 A0 14 00 00   ...............  00F0: 00 00 00 00                                      ....

so my question is, based on the above information, do I have the possibility of setting up vanilla Speedstep for OS X (Leopard and Snow Leopard) so that I can enable Enhanced C1 (C1E) and Enhanced Intel Speedstep Technology in BIOS to allow their use with Windows/Linux....and hence drop my core temps for all OS's.....?

BTW OS X versions 10.5.7, 10.5.8 and 10.6.0, 10.6.1 will not sleep properly (previous versions from 10.5.1 to 10.5.6 have all had fully functioning sleep)......

When I select Sleep, the display goes black but the PC fans stay on and then the display cannot be woken up.......I need to reboot to get the display back......

#448
Master Chief

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Hi Master Chief, I hope this is not off-topic but on my 650i nForce chipset MOBO with the current BIOS settings (I will get to my specific question at the end)......

<snip />

so my question is, based on the above information, do I have the possibility of setting up vanilla Speedstep for OS X (Leopard and Snow Leopard) so that I can enable Enhanced C1 (C1E) and Enhanced Intel Speedstep Technology in BIOS to allow their use with Windows/Linux....and hence drop my core temps for all OS's.....?

How's this for an answer: I'm quite surprised that you haven't enabled them already. Yes, by all means; do enable them in your BIOS to lower the core temperatures. And I hope that P-State stepping works for you, because all I see is the 6 and 9 multiplier in your screen shot.

BTW OS X versions 10.5.7, 10.5.8 and 10.6.0, 10.6.1 will not sleep properly (previous versions from 10.5.1 to 10.5.6 have all had fully functioning sleep)......

When I select Sleep, the display goes black but the PC fans stay on and then the display cannot be woken up.......I need to reboot to get the display back......

OT: You can fix this by modifying your DSDT with help of the info available in the P5K PRO Snow Leopard thread.

BTW: Your FACP table tells me that your BIOS does not include C-State data and thus you'll have to add it yourself – getting C1 to work should be a piece of a cake.

#449
verdant

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How's this for an answer: I'm quite surprised that you haven't enabled them already. Yes, by all means; do enable them in your BIOS to lower the core temperatures. And I hope that P-State stepping works for you, because all I see is the 6 and 9 multiplier in your screen shot.


OT: You can fix this by modifying your DSDT with help of the info available in the P5K PRO Snow Leopard thread.

BTW: Your FACP table tells me that your BIOS does not include C-State data and thus you'll have to add it yourself �" getting C1 to work should be a piece of a cake.



Thanks for your very helpful answer.......

I had not enabled them previously because with Leopard I have to use the Voodoo 9.5.0 kernel (the Leopard vanilla kernels always cause random KPs....) and CPU-i showed/shows no P-states running the Voodoo kernel.....

With Enhanced C1 (C1E) and Enhanced Intel Speedstep Technology now enabled in BIOS, I get under OS X 10.6.1.....

Attached File  Voodoo_PStates_1.png   31.28KB   57 downloads Attached File  Voodoo_PStates_2.png   28.91KB   47 downloads

versus when disabled......

Attached File  VoodooMonitor2.png   31.18KB   43 downloads Attached File  VoodooMonitor3.png   29.91KB   27 downloads

but no meaningful drop in core temps despite the apparent drop in core frequency, change in multiplier with voltages and temps changing in real time......seems DSDT modding is required......

#450
mm67

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Anyone want to take a look at these dumps. These are from MSI P43-Neo, P-states and C-states work out of the box, USB works out of the box, ICH10 works out of the box(no fixes in dsdt and silver HD icons). Only problem is that shutdown or restart doesn't work anymore after system has gone to sleep even once.Maybe we can learn something from these.
Attached File  ACPI_Tables.zip   13.48KB   10 downloads
Attached File  MSI_P43.ioreg.zip   345.09KB   7 downloads

#451
barnum

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Um...by luck? :D

/edit - removed them - all 8 p-states are still working, idle temp hovers at the same comfy 37-39 degrees.


Hi Beerkex d,

can you post your new DSDT.dsl ?

Regards,
Barnum

#452
Volcacius

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Verdant, I have working c-states on my 790i board. Look at my dsdt Attached File  DSDT.dsl.zip   22.95KB   27 downloads Temps are really low :( Thanks to Master Chief for his great help, this should be the thread of the year.

Attached File  working_c_states.tiff   49.39KB   65 downloads

OT: Master Chief, I can sleep only with legacy usb disabled in bios; do you think I fix it through dsdt without disabling it in bios? I looked for a legacy usb entry in dsdt or similar but I couldn't find anything.

#453
verdant

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Verdant, I have working c-states on my 790i board. Look at my dsdt Attached File  DSDT.dsl.zip   22.95KB   27 downloads Temps are really low :D Thanks to Master Chief for his great help, this should be the thread of the year.

Attached File  working_c_states.tiff   49.39KB   65 downloads

OT: Master Chief, I can sleep only with legacy usb disabled in bios; do you think I fix it through dsdt without disabling it in bios? I looked for a legacy usb entry in dsdt or similar but I couldn't find anything.


Thanks, I will do......it will hopefully save me time......

I would not be surprised if our sleep problem also links back to power management via DSDT as well as active ports e.g. USB etc......I came to this topic primarily with my PC sleep issue in mind because I could see that Master Chief is achieving significant progress in the area of DSDT power management control.....with lower core temps as a bonus.....:(

Cheers
verdant

#454
xopher

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Hm, I think I got all the big quirks (cord stuck in CPU-fan being one of them, eh) sorted out now.

I'm running SL 10.6.1 with the following:

DSDT:
- gfx <- sidenote to MasterChief, I read somewhere that you don't recommend putting gfx in dsdt, why is this? :(
- lan
- sound
- usbehc (built-in high speed fix)
- pwrb
- RTC/DTGP
+ some minor tweaks

I also have vanilla speedstepping working without disabler.kext/nullcpupowerm.kext. Added _PSS tables with p-states, and cst-tables, which I extracted myself, not the macpro3,1 that are floating around. The temps are also fine now - idle at 32-35c, depending on temperature inside.

Kexts I've got loaded atm include:
fakesmc.kext
IOAHCIBlockStorageInjector.kext (might fix it via DSDT soon though)
OpenHaltRestart.kext
PlatformUUID.kext
VoodooMonitor.kext

Now, sleep didn't work last I tried, should, but didn't so I'm still working on that I guess.

I've got a couple of questions though:

1. I can't find more speedsteps for my CPU (Q8400 2.66Ghz) than the three CPUi/VoodooMonitor gives me, reason tells me there should be more? Could someone please help me find them! :D
Attached File  voodoomonitor.png   25.85KB   24 downloads

2. This is another error I get at boot:

kernel ACPI_SMC_PlatformPlugin::start - waitForService(resourceMatching(AppleIntelCPUPowerManagement) timed out


Any thoughts on this?

Thanks!

I've also attached my DSDT.dsl if you're interested, here: Attached File  DSDT_rc3.dsl.txt   216.94KB   19 downloads

#455
Beerkex'd

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can you post your new DSDT.dsl ?

It's been attached here since the post went up:
http://www.insanelym...p...t&p=1297946
(/EDIT - now removed)

Currently loading from /EFI/Extra/Extensions.mkext:

AD2000b.kext
AHCIPortInjector.kext
AppleVIAATA.kext
CPUInjector.kext
EvOreboot.kext
fakesmc.kext
IOAHCIBlockStorageInjector.kext
LegacyACPI_SMC_PP.kext
LegacyAGPM.kext
LegacyAppleYukon2.kext

/EDIT (updated 01/11) kextstat -k and lspci -nn output: Attached File  kextstat_lspci.zip   3.51KB   14 downloads
More information here (the DSDT attached there is outdated) and some info on my other modifications to my DSDT:
http://www.insanelym...p...t&p=1285983

/EDIT - Updated (15/10)
/EDIT - Updated (16/10)
/EDIT - Updated (18/10)
TPM code and OS checks removed, replaced FWH/FWHE with Master Chief's FWHD and did some work on USB. I haven't tested all ports.
/EDIT - Updated (20/10)
Added Embedded Controller - AppleACPIEC.kext now loads. More renaming, correction to MCEH device and some more work on USB.
Attached File  Embedded_Controller.png   77.24KB   145 downloads
/EDIT - Updated again (01/11)
Redundant SATA and P0P3 devices removed, added ports/bays to SATA, replaced LAN device with Master Chief version, removed SIOK, SIOS, SIOW and SIOH (no more PS2 mouse/keyboard support). New CPU scope and PNOT method from Master Chief.

***Do not use this DSDT as is if you don't have a P5Q-E and a Core 2 Duo E8500 CPU***

I've now ripped out basically everything Master Chief has said it's safe to delete, here and in the P5K Pro thread. Luckily, the P5Q-E and P5K Pro DSDT tables are almost identical, it's not difficult to follow his work and make many of the same improvements and modifications.
Attached File  P5QE_2101_Beer.zip   41.98KB   114 downloads
Also included in the archive is an unmodified DSDT dump from the 2101 P5Q-E BIOS so you can compare and track what I'm doing.
If you spot something silly, please let me know.

#456
Master Chief

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Verdant, I have working c-states on my 790i board. Look at my dsdt Attached File  DSDT.dsl.zip   22.95KB   27 downloads Temps are really low :D Thanks to Master Chief for his great help, this should be the thread of the year.

Attached File  working_c_states.tiff   49.39KB   65 downloads

OT: Master Chief, I can sleep only with legacy usb disabled in bios; do you think I fix it through dsdt without disabling it in bios? I looked for a legacy usb entry in dsdt or similar but I couldn't find anything.

Thanks, and yes I fixed this so head over to the P5K PRO Snow Leopard thread and get cracking. Files in post #3. You won't be disappointed :)


...I would not be surprised if our sleep problem also links back to power management via DSDT as well as active ports e.g. USB etc......
Cheers
verdant

Spot on. One single error in DSDT can block sleep and wake up/shutdown after sleep.

OT: Shutdown works here without OpenHaltRestart.kext and I think that warm boot (restarts) can be achieved with a simple DSDT patch because all this kext does, really, is to store 0xfe in the keyboard controller (port 64).

#457
spanakorizo

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my temps are not really low, specially when the system is idle, and this is strange
i have good cooler (thermalright 120) but the case is small, so i can expect like +5C because of this
system is oc from 2.4 => 3.0ghz but in bios vcore is set to 1.270
thing is that even if i remove the pstates from the dsdt.aml, cpui will see pstates, and system will do speedstep (even if i disable it from the bios)
but the voltage will not drop at 1.130V when system is idle (1.9ghz)
cpui is exactly like this one, so i dont post a new attachment: (someone's in this page)
http://www.insanelym...p...st&id=59295
how can that be?does it take automatic pstates from somewhere else? (any bios settings?)
if u have time plz check my dsdt, i would say that the cpu part is correct but maybe i miss something..
thankz
Attached File  DSDT.dsl.zip   28.62KB   6 downloads

#458
Master Chief

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...
DSDT:
- gfx <- sidenote to MasterChief, I read somewhere that you don't recommend putting gfx in dsdt, why is this? :)

Not a PCIe card no. Fixing an on-board chip in the DSDT would be fine by me, because that is part of the main board. My NVIDIA GT9600 however is never going to make it into my DSDT. Simply because it does not belong there.

There's also another advantage which is that replacing the video card is much more fun – simply restore the original com.apple.Boot.plist and fix the graphics card.

2. This is another error I get at boot:
Any thoughts on this?

Thanks!

Are you using my legacy kexts?

p.s. Looking at your DSDT... wow. You have a lot of work to do. Seriously.


I ripped out ASOC and SIOR last night, otherwise there's no difference from DSDT posted earlier:

Another TV show/movie down the drain? Fun hacking isn't it?

#459
xopher

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Are you using my legacy kexts?

I'm not using any legacy kexts no, only the ones I listed in my post. Should I be? ;)

p.s. Looking at your DSDT... wow. You have a lot of work to do. Seriously.


What are you referring to? I know I'm not really an expert in this matter, but I thought I had at least a bit of it figured out, hehe. I'd really appreciate it if you'd decided to help me out, or push me in the right direction.

Thanks for the answer(s) so far!

#460
Master Chief

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I'm not using any legacy kexts no, only the ones I listed in my post. Should I be? :)



What are you referring to? I know I'm not really an expert in this matter, but I thought I had at least a bit of it figured out, hehe. I'd really appreciate it if you'd decided to help me out, or push me in the right direction.

Thanks for the answer(s) so far!

You're welcome. And have a look at post #456 for the link to the P5K PRO Snow Leopard thread, where you'll find the latest DSDT patches (see post #3 there). And yes other people can use that info too!

p.s. I just got my hack to restart without OpenHaltRestart.kext; I found the keyboard command port on the Embedded Controller... stored 0xfe in it and boom. Hello warm boot! Now I have to find a way to get it going without pointing shutdown to it. I guess that this was just the easy part but fun it is :(





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