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VCH888

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  1. After updated to 10.13.4 and nVidia Web driver...30.103 for my Gigabyte GTX 1050 ti, needed to patch AppleHDAController from <de10e90b> to <de10b90f> for getting audio via DP-HDMI adapter <dict> <key>Comment</key> <string>AppleHDAController Patch</string> <key>Disabled</key> <false/> <key>Find</key> <data>3hDpCw==</data> <key>Name</key> <string>AppleHDAController</string> <key>Replace</key> <data>3hC5Dw==</data> </dict> Previously didn't patch anything.
  2. H87M-HD3 & 10.12 DP3 (naming EH01 & EH02 for EHCI ports and XHC for XHCI ports in dsdt) 1. don't need to patch AppleUSBXHCIPCI for adding ports 2. EHCI devices operated by AppleUSBEHCIPCI.kext 3. XHCI devices operated by AppleUSBXHCIPCI.kext
  3. VCH888

    BCM94360CD Suggestion

    It's for bluetooth, connecting data only.
  4. VCH888

    Experimental 6 channel AppleHDA

    @ Rodion2010 Thanks. if multichannel speakers are available in MIDI Setup app, (testing ALC885, EP35-DS3P) case 1: there is SoftwareDSP of 6ch in layout -- the sound's distorted if selecting 6ch. If selecting 2ch, SoftwareDSP's working 6ch. case 2: there is not SoftwareDSP in layout -- the sound's distorted if selecting 2ch or 6ch. P.S. It's hard to get the right combination of DSP functions. If I can find any solution, I will tell you.
  5. VCH888

    Experimental 6 channel AppleHDA

    @ Rodion2010 I tried your SignalProcessing and got sound assertions but it's still working. DSP Sound assertion in DspFuncManager at line 214 DSP Sound assertion in DspFuncManager at line 214 I just was curious how you got 6ch without setting aggregate device.
  6. VCH888

    Experimental 6 channel AppleHDA

    Can you post layout#.xml.zlib that the one you got 6ch option in Midi Setup? Thanks.
  7. VCH888

    Experimental 6 channel AppleHDA

    5.1ch_ALC898.zip This folder is a sample of 5.1ch_ALC898. I made two layouts and SoftwareDSP was based on layout70. They are almost the same except “ParameterInfo of DspFunction2, 3, and 4.” I have no idea how to edit or modify “ParameterInfo” and hope that someone can make it better, especially ParameterInfo. Note: 1) I had to swap channel of orange jack to get sound on Center speaker. (using an additional 3.5 mm jack male to female cable and swapping audio cable) 2) The sound from layout1, w/ ParameterInfo, is better than layout2, w/o ParameterInfo.
  8. VCH888

    [GUIDE] USB Fix El Capitan 10.11

    @ oSxFr33k Let's think. Your X79 has two brand USB controllers, one is Intel's ECHI controllers and other one is Asmedia's XHCI controllers. They are separate. Their physical USB ports should not be linked each controller. So, all USB2.0 should be controlled by Intel's EHCI. All USB3.0 should be controlled by Asmedia's XHCI. Your dsdt and ssdt in post #330 should be fine. Can you change IOPCIClassMatch of AppleUSBXHCIPCI such as from 0x0c033000 to 0x0b033000? Trying not to load AppleUSBXHCIPCI.kext Previously, I suggested you try to use Name (_STA, Zero) to disable device that connects to pic bus is useless. Sorry about this idea.
  9. VCH888

    [GUIDE] USB Fix El Capitan 10.11

    @ oSxFr33k In case of your X79, this chipset supports two EHCI controllers, up to 14 USB2.0/1.1 ports. from ASUS website USB Ports Intel® X79 chipset : 12 x USB 2.0/1.1 port(s) (4 at back panel, black, 8 at mid-board) ASMedia® ASM1042 controller : 8 x USB 3.0/2.0 port(s) (6 at back panel, blue, 2 at mid-board) The first thing is to get EHCI controllers working properly. You may not need any dummy kext if you try to rename Device (EUSB) to Device (EHC1) and Device (USBE) to Device (EHC2) in dsdt. And, can you disable your ASMEDIA via ssdt, such as Scope (ASMX) {Name (_STA, Zero)} without disable USB3 in bios? update: USB 3.0 ports on this board connect to PCI bus, PEX0, PEX1, PEX2. You may need disable PEX0-2 via ssdt.
  10. VCH888

    [GUIDE] USB Fix El Capitan 10.11

    It's working for my old EP35 with MacPro3,1 smbios on OS X 10.10 & 10.11 natively. So, I think it will work with any smbios.
  11. VCH888

    [GUIDE] USB Fix El Capitan 10.11

    like this item that has FL1100 chip. Got to find for the best price. http://www.ebay.com/itm/ORICO-Desktop-PCI-E-USB-3-0-x-4-Port-Express-Card-PME-4P-Free-Shipping-/281663255936?hash=item4194703580
  12. VCH888

    [GUIDE] USB Fix El Capitan 10.11

    @ dqb I would suggest you to do followings: 1. test all USB 3.0 ports with USB 3.0 device and record each port address of physical port, such as <10 00 00 00>, see IORegistryExplorer 2. remove dummy kext and restart the OS X. You should get all USB 2.0 ports and then connect USB 2.0 device and record each port address. See IORefistryExplorer, how many items are in XHC that is maximum. 3. edit info.plist of dummy kext or else that contains ports will be used. Note, physical USB 3.0 ports support both USB 3.0 & USB 2.0, so you need to have both HS## and SSP# in info.plist. or 4. the best way is using dummy kext or else that has 6 SSP# and rehabman's FakePCIID + FakeXHCIMux. The mux kext will force all USB 2.0 controlled by EHCI. ******* Did you have an external USB3.0 hub connect to the back USB 3.0 port? If yes, connect USB 2.0 device to the hub and see IOReg & System Info.
  13. VCH888

    [GUIDE] USB Fix El Capitan 10.11

    @ thebo try this DummyUSBXHCIPCI.kext.zip that has path of SSP1-SSP6. Still need FakePCIID and FakePCI_Mux. see info.plist for detail and compare the old one. I think you don't need DummyUSBEHCIPCI.kext since your smbios is iMac15,1 that has both EHC1 and EHC2 in AppleUSBEHCIPCI.kext's info.plist.
  14. VCH888

    [GUIDE] USB Fix El Capitan 10.11

    @ GhostRaider Now, I got the point. The board with H81 chipset will support only two USB 3.0 and eight USB 2.0. (see http://ark.intel.com/products/75016/Intel-DH82H81-PCH) So, MSI H81M back four USB 3.0 will be hosted by VIA VL805 after I looked at the manual and more information. Therefore, you don't have to do anything about USB 3.0/2.0 that controlled by H81 chipset. Maybe got to wait third party developer to build a generic xhci kext.
  15. VCH888

    [GUIDE] USB Fix El Capitan 10.11

    @ GhostRaider I hope you can understand what I try to tell you these followings. based on your post #205 Cruiser connected to Front USB 3.0 port = Device (HS01) & address = 0x01, sharing port with Device (SSP1) & address = 0x10 Flash drive (Lexar) connected to Back USB 2.0 = Device (HS09) & address = 0x09 Receiver (Logitech) connected to Back USB 2.0 = Device (HS10) & address = 0x0a Flash memory (Toshiba) connected to internal USB 2.0 header = Device (HS07) & address = 0x07 These above devices were controlled by XHCI controller (mostly will be used for Intel 8/9 series). ———————————————— Let’s try to identify which port has Device (name). Front USB 3.0 header provides two USB ports. Device (HS01) + Device (SSP1) Device (HS02) + Device (SSP2), not available due to your front case has one USB 3.0 port. Front USB 2.0 port connected to internal USB 2.0 header. Device (HS07) Device (HS08), not available due to front case has one USB 2.0 port. *** I am guessing on back USB 3.0 ports and I am not sure about Device (HS##). Due to seeing specification of MSI H81M, it uses VIA VL805 to controlled back four USB 3.0. Device (HS03) + Device (SSP3) Device (HS04) + Device (SSP4) Device (HS05) + Device (SSP5) Device (HS06) + Device (SSP6) Back USB 2.0 ports Device (HS09) Device (HS10) So, you should have these following in your dsdt since you would not modify kexts and add third party kexts. Don't do anything about dsdt. Device (HS01) = address 0x01 Device (HS03)* = address 0x03 Device (HS04)* = address 0x04 Device (HS05)* = address 0x05 Device (HS06)* = address 0x06 Device (HS07) = address 0x07 Device (HS09) = address 0x09 Device (HS10) = address 0x0a Device (SSP1) = address 0x10 Device (SSP3) = address 0x12 Device (SSP4) = address 0x13 Device (SSP5) = address 0x14 Device (SSP6) = address 0x15 can add more two Device (name) * need to find out what Device (name) and address exactly is by plugging in USB 2.0 device to back USB 3.0 ports. P.S. HS## is used for USB 2.0 & SSP# is used for USB 3.0 The below is what I was doing my dsdt before I would select which Device (name) will be eliminated. (I will leave this part for such H87 chipset.) Device (RHUB) { Name (_ADR, Zero) Device (HS01) { Name (_ADR, One) Name (_STA, 0x0F) Name (_UPC, Package (0x04) {0xFF, 0x03, Zero, Zero}) Name (_PLD, Package (0x10) { /* 0000 */ 0x01, 0xC6, 0x72, 0x00, 0x00, 0x00, 0x00, 0x00, /* 0008 */ 0x69, 0x0C, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00 }) } Device (HS02) { Name (_ADR, 0x02) Name (_STA, 0x0F) Name (_UPC, Package (0x04) {0xFF, 0x03, Zero, Zero}) Name (_PLD, Package (0x10) { /* 0000 */ 0x01, 0xC6, 0x72, 0x00, 0x00, 0x00, 0x00, 0x00, /* 0008 */ 0x69, 0x0C, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00 }) } Device (HS03) { Name (_ADR, 0x03) Name (_STA, 0x0F) Name (_UPC, Package (0x04) {0xFF, 0x03, Zero, Zero}) Name (_PLD, Package (0x10) { /* 0000 */ 0x01, 0xC6, 0x72, 0x00, 0x00, 0x00, 0x00, 0x00, /* 0008 */ 0x71, 0x0C, 0x80, 0x01, 0x00, 0x00, 0x00, 0x00 }) } Device (HS04) { Name (_ADR, 0x04) Name (_STA, 0x0F) Name (_UPC, Package (0x04) {0xFF, 0x03, Zero, Zero}) Name (_PLD, Package (0x10) { /* 0000 */ 0x01, 0xC6, 0x72, 0x00, 0x00, 0x00, 0x00, 0x00, /* 0008 */ 0x71, 0x0C, 0x00, 0x02, 0x00, 0x00, 0x00, 0x00 }) } Device (HS05) { Name (_ADR, 0x05) Name (_STA, 0x0F) Name (_UPC, Package (0x04) {0xFF, 0x03, Zero, Zero}) Name (_PLD, Package (0x10) { /* 0000 */ 0x01, 0xC6, 0x72, 0x00, 0x00, 0x00, 0x00, 0x00, /* 0008 */ 0x69, 0x0C, 0x80, 0x02, 0x00, 0x00, 0x00, 0x00 }) } Device (HS06) { Name (_ADR, 0x06) Name (_STA, 0x0F) Name (_UPC, Package (0x04) {0xFF, 0x03, Zero, Zero}) Name (_PLD, Package (0x10) { /* 0000 */ 0x81, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 0008 */ 0x69, 0x0C, 0x80, 0x03, 0x00, 0x00, 0x00, 0x00 }) } Device (HS07) { Name (_ADR, 0x07) Name (_STA, 0x0F) Name (_UPC, Package (0x04) {0xFF, 0x03, Zero, Zero}) Name (_PLD, Package (0x10) { /* 0000 */ 0x81, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 0008 */ 0x71, 0x0C, 0x80, 0x03, 0x00, 0x00, 0x00, 0x00 }) } Device (HS08) { Name (_ADR, 0x08) Name (_STA, 0x0F) Name (_UPC, Package (0x04) {0xFF, 0x03, Zero, Zero}) Name (_PLD, Package (0x10) { /* 0000 */ 0x81, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 0008 */ 0x71, 0x0C, 0x00, 0x04, 0x00, 0x00, 0x00, 0x00 }) } Device (HS09) { Name (_ADR, 0x09) Name (_STA, 0x0F) Name (_UPC, Package (0x04) {0xFF, 0x03, Zero, Zero}) Name (_PLD, Package (0x10) { /* 0000 */ 0x81, 0xC6, 0x72, 0x00, 0x00, 0x00, 0x00, 0x00, /* 0008 */ 0x71, 0x0C, 0x80, 0x04, 0x00, 0x00, 0x00, 0x00 }) } Device (HS10) { Name (_ADR, 0x0A) Name (_STA, 0x0F) Name (_UPC, Package (0x04) {0xFF, 0x03, Zero, Zero}) Name (_PLD, Package (0x10) { /* 0000 */ 0x01, 0xC6, 0x72, 0x00, 0x00, 0x00, 0x00, 0x00, /* 0008 */ 0x71, 0x0C, 0x00, 0x05, 0x00, 0x00, 0x00, 0x00 }) } Device (HS11) { Name (_ADR, 0x0B) Name (_STA, 0x0F) Name (_UPC, Package (0x04) {0xFF, 0x03, Zero, Zero}) Name (_PLD, Package (0x10) { /* 0000 */ 0x81, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 0008 */ 0x71, 0x0C, 0x80, 0x05, 0x00, 0x00, 0x00, 0x00 }) } Device (HS12) { Name (_ADR, 0x0C) Name (_STA, 0x0F) Name (_UPC, Package (0x04) {0xFF, 0x03, Zero, Zero}) Name (_PLD, Package (0x10) { /* 0000 */ 0x81, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 0008 */ 0x71, 0x0C, 0x00, 0x06, 0x00, 0x00, 0x00, 0x00 }) } Device (HS13) { Name (_ADR, 0x0D) Name (_STA, 0x0F) Name (_UPC, Package (0x04) {0xFF, 0x03, Zero, Zero}) Name (_PLD, Package (0x10) { /* 0000 */ 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 0008 */ 0x71, 0x0C, 0x80, 0x06, 0x00, 0x00, 0x00, 0x00 }) } Device (HS14) { Name (_ADR, 0x0E) Name (_STA, 0x0F) Name (_UPC, Package (0x04) {0xFF, 0x03, Zero, Zero}) Name (_PLD, Package (0x10) { /* 0000 */ 0x81, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 0008 */ 0x71, 0x0C, 0x00, 0x07, 0x00, 0x00, 0x00, 0x00 }) } Device (HS15) { Name (_ADR, 0x0F) Name (_STA, 0x0F) Name (_UPC, Package (0x04) {0xFF, 0x03, Zero, Zero}) Name (_PLD, Package (0x10) { /* 0000 */ 0x81, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 0008 */ 0x71, 0x0C, 0x80, 0x07, 0x00, 0x00, 0x00, 0x00 }) } Device (SSP1) { Name (_ADR, 0x10) Name (_STA, 0x0F) Name (_UPC, Package (0x04) {0xFF, 0x03, Zero, Zero}) Name (_PLD, Package (0x10) { /* 0000 */ 0x01, 0xC6, 0x72, 0x00, 0x00, 0x00, 0x00, 0x00, /* 0008 */ 0x69, 0x0C, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00 }) } Device (SSP2) { Name (_ADR, 0x11) Name (_STA, 0x0F) Name (_UPC, Package (0x04) {0xFF, 0x03, Zero, Zero}) Name (_PLD, Package (0x10) { /* 0000 */ 0x01, 0xC6, 0x72, 0x00, 0x00, 0x00, 0x00, 0x00, /* 0008 */ 0x69, 0x0C, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00 }) } Device (SSP3) { Name (_ADR, 0x12) Name (_STA, 0x0F) Name (_UPC, Package (0x04) {0xFF, 0x03, Zero, Zero}) Name (_PLD, Package (0x10) { /* 0000 */ 0x01, 0xC6, 0x72, 0x00, 0x00, 0x00, 0x00, 0x00, /* 0008 */ 0x71, 0x0C, 0x80, 0x01, 0x00, 0x00, 0x00, 0x00 }) } Device (SSP4) { Name (_ADR, 0x13) Name (_STA, 0x0F) Name (_UPC, Package (0x04) {0xFF, 0x03, Zero, Zero}) Name (_PLD, Package (0x10) { /* 0000 */ 0x01, 0xC6, 0x72, 0x00, 0x00, 0x00, 0x00, 0x00, /* 0008 */ 0x71, 0x0C, 0x00, 0x02, 0x00, 0x00, 0x00, 0x00 }) } Device (SSP5) { Name (_ADR, 0x14) Name (_STA, 0x0F) Name (_UPC, Package (0x04) {0xFF, 0x03, Zero, Zero}) Name (_PLD, Package (0x10) { /* 0000 */ 0x01, 0xC6, 0x72, 0x00, 0x00, 0x00, 0x00, 0x00, /* 0008 */ 0x71, 0x0C, 0x80, 0x04, 0x00, 0x00, 0x00, 0x00 }) } Device (SSP6) { Name (_ADR, 0x15) Name (_STA, 0x0F) Name (_UPC, Package (0x04) {0xFF, 0x03, Zero, Zero}) Name (_PLD, Package (0x10) { /* 0000 */ 0x01, 0xC6, 0x72, 0x00, 0x00, 0x00, 0x00, 0x00, /* 0008 */ 0x71, 0x0C, 0x00, 0x05, 0x00, 0x00, 0x00, 0x00 }) } } Also, see IORegistryExplorer about data address, like this example of Z77X-UP5 TH. SSP1 address is 0x05. Sorry, I have no idea about PCIe USB 3.0 card, chip VIA. Edited this post because of reading more specification of chipsets which may be different.
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