DSDT - Vanilla Speedstep - Generic Scope (_PR)

[Master Chief]

I did the same thing FKA did, I just inserted all the tables I had that matched up to his, in the same order. I know about the multiple Scope \PRs for each CPU, I will try to merge them later. The solution given to me by ivik had everything under the Scope \PR in the beginning of the DSDT like you say. I just couldn't get that to work initially for whatever reason. I probably overlooked something.

Mostly a style nit, like fixing IASL compiler warnings

 

I'm using stock 2.0 RC3 here.

 

What does Chameleon have to do with clock frequencies? Some EFI voodoo happening?

I do not have this problem with Leopard / ChameleonSM (v1.1.12) where it returns:

 

hw.busfrequency = 1332000000

hw.cpufrequency = 2500000000

hw.tbfrequency = 1000000000

hw.tbfrequency: 1000000000

hw.cpufrequency_max: 2500000000

hw.cpufrequency_min: 2500000000

hw.cpufrequency: 2500000000

hw.busfrequency_max: 1332000000

hw.busfrequency_min: 1332000000

hw.busfrequency: 1332000000

 

Let's do some testing here... Done. I checked com.apple.Boot.plist and there I have this:

 

<key>SMmaximalclock</key>

<string>2500</string>

 

And without this snippet – because ChameleonSM won't work with Snow Leopard – the frequencies are wrong/set to 3800000000 (using an unknown processor requires SMBIOS patching).

[Squirrelf]

Have you recompiled it, or are you just using the distributed copies?

 

I was using distributed copies (the one on the first post)

 

the app compiled fine

but the kext give's me one error :

'ipi_handler_t' does not name a type...

 

would you already have the compiled kext for snow leo, or by chance know how to solve that error, if you went over it already ?

 

thanks

[Master Chief]

I was using distributed copies (the one on the first post)

 

the app compiled fine

but the kext give's me one error :

'ipi_handler_t' does not name a type...

 

would you already have the compiled kext for snow leo, or by chance know how to solve that error, if you went over it already ?

 

thanks

Sure, and you only need to add the following line to IOCPU.h:

};

+typedef void (*ipi_handler_t)(void);

class IOCPUInterruptController;

 

Edit: Anyone else here getting garbled finder windows (I'll attach a screen shot when it happens again) after adding that _CST object? I must be using the wrong registers. Yikes!

[keeza]

dude! the _PSS fix is not gonna magically remove all the other 164 errors in your DSDT! you need to have a "clean" DSDT before you start adding patches! are you using iasl? or some other compiler?

 

Holy Cow!

 

I'm using DSDTSE for compilation. My DSDT compiles with no errors.

 

When I compile with iASLMe I get 164 errors that you refer to!!!

 

So till now I thought I did have a clean DSDT!!

 

So looks as if I got to start all over.......

[Squirrelf]

Sure, and you only need to add the following line to IOCPU.h:

};

+typedef void (*ipi_handler_t)(void);

class IOCPUInterruptController;

 

thanks I was able to compile with no error

however compiled in 86_64 the kext won't load even if it is in S/L/E (and rebuilt the cache)

if I compile it in 32bit, it loads, but I get a KP during boot unless I have some kind of disabler, same problem as the one posted on the first post... so I'm back to square one...

I'm booting in 32bit of course

any ideas? or could you post the kext if you have one for snow leo that doesn't require a disabler ...

 

thanks

 

 

edit: trying different configuation

and realised that loading cpui.kext (with disabler, I can't without) it changes the behavior of cpu speed and multi

my dsdt has ssdt but no cst due to anoying audio/video stuttering... with AppleLPC using dsdt fix to load it...

 

without cpui.kext nor disabler, speed step would work well, vcore would drop too (using msrtools to check)... but temperature is way to hot for me (about +10 as I said earlier), geekbench is normal (7000) meaning that all four cores run at x9 under load...

 

in the two following configuration temperatures are cooler by using disabler:

without cpui.kext just disabler alone, my four cores would run at 3.2Ghz (x9) even idle, geekbentch (7000)

with cpui.kext and disabler, same dsdt, core 1 and 2 would be stuck a x6 : 2136Mhz, other two core would alternate between 9x and 6x depending on load... so since my first two cores are slow even under load, my geekbench drops to 5500, btw vcore stuck at max.

[yeehaa]

Edit: Anyone else here getting garbled finder windows (I'll attach a screen shot when it happens again) after adding that _CST object? I must be using the wrong registers. Yikes!

 

you mean garbled finder toolbar and the "colorless" sort window titles in finder. i get them occasionally! another thing that happens rarely is the graphics glitch when u hover the mouse over a bouncing dock icon. i assumed the problem was graphics related.

[jinnggoff]

Okay, I finally had my breakthrough with this and I'm very excited . I have P-state switching (8 of them!) and I fixed the skipping sound. (...)

Many thanks for this....I will try it later

[Master Chief]

you mean garbled finder toolbar and the "colorless" sort window titles in finder.

Correct (see screen shots).

 

i get them occasionally!

Sure. It might be some graphics related bug, but I can't remember seeing it before I started to work on this.

 

another thing that happens rarely is the graphics glitch when u hover the mouse over a bouncing dock icon. i assumed the problem was graphics related.

I might have missed it, or I simply don't have this problem.

 

thanks I was able to compile with no error

however compiled in 86_64 the kext won't load even if it is in S/L/E (and rebuilt the cache)

if I compile it in 32bit, it loads, but I get a KP during boot unless I have some kind of disabler, same problem as the one posted on the first post... so I'm back to square one...

I'm booting in 32bit of course

any ideas? or could you post the kext if you have one for snow leo that doesn't require a disabler ...

 

thanks

Sounds like your installation has other/unrelated problems, which you should solve first if you need 64 bit mode. I however don't use 64 bit mode, simply because I don't have a need for it with only 4GB of RAM. I can boot my hack in 64 mode with -x64 without any KP but I still fail to see any advantage. You might need fakesmc.kext V2 for 64 bit mode, but fixing this boot problem does not belong here.

 

OT: Anyone here willing to help me solve this sleep problem?

[Squirrelf]

Sounds like your installation has other/unrelated problems, which you should solve first if you need 64 bit mode. I however don't use 64 bit mode, simply because I don't have a need for it with only 4GB of RAM. I can boot my hack in 64 mode with -x64 without any KP but I still fail to see any advantage. You might need fakesmc.kext V2 for 64 bit mode, but fixing this boot problem does not belong here.

 

OT: Anyone here willing to help me solve this sleep problem?

 

without cpui both 32 and 64bit works great, that's not the problem, just cpui KP-ing my system at boot if I don't have a disabler (I can boot fine without a disabler as long as cpui isn't there)

because if I boot with a disabler my speedstep is messed up....

Anyway i'm back to using a disabler (therefore speedstep dosn't work anymore) because temps are too high at idle without a disabler even when speed step is working (according to msrtools)

 

I don't think a kext is interfering with cpuid...

my kext are: fakesmc v2, ioahciblocksttorage (orange icons fix), jmicrontata, legacy hda, openhaltrestart, sleepenabler, platformuuid (don't know is that's really needed, but does no harm), and disabler (low temps, but no speedstep with it)

 

I stay in 32bit mode because I need vmware once and a while, and my wacom tablet doesn't have a 64bit driver yet... otherwise I'd be running in 64bit (8GB of ram)

but most of my "big" programs are 32bit anyway (dreamweaver, photoshop, maya) and will each use a max of 4GB as you probably know, so I don't care for 64bit rightnow...

in 32bit, mac os can still run 64bit apps and manage the 8GB anyway (unlike Windows 32bit )

 

 

about your sleep problem

have you tried sleepenabler.kext ?

SleepEnabler.kext.zip

[keeza]

Holy Cow!

 

I'm using DSDTSE for compilation. My DSDT compiles with no errors.

 

When I compile with iASLMe I get 164 errors that you refer to!!!

 

So till now I thought I did have a clean DSDT!!

 

So looks as if I got to start all over.......

 

 

OK guys, I'm back on track. My DSDT compiles fine now with iASL with the SSDT added.

 

For those interested Speedstep still doesn't work for me.

I have removed disabler kext and my temps running at about 60 degrees idle. Only my max frequency is running under "Status" tab under CPUi.

 

For those who can help, could you please check my DSDT for any obvious things I may have missed.

Alternatively I could stick Voodoo Power back in and leave it till someone posts a guide.

I'm obviously missing a step somewhere.

 

Funny thing I've noticed though.

Having recreated my DSDT from scratch I have full working ethernet and Bonjour without any kext or Lan patch in my DSDT. I've applied the Bonjour fix Bonjour fix but I understand that works with a DSDT patch.

 

Unless I'm mistaken I cant figure that one out.....

My_DSDT.zip

[WinstonAce]

What is your model identifier under system profiler?

[yeehaa]

OK guys, I'm back on track. My DSDT compiles fine now with iASL with the SSDT added.

 

For those interested Speedstep still doesn't work for me.

I have removed disabler kext and my temps running at about 60 degrees idle. Only my max frequency is running under "Status" tab under CPUi.

 

For those who can help, could you please check my DSDT for any obvious things I may have missed.

Alternatively I could stick Voodoo Power back in and leave it till someone posts a guide.

I'm obviously missing a step somewhere.

 

Funny thing I've noticed though.

Having recreated my DSDT from scratch I have full working ethernet and Bonjour without any kext or Lan patch in my DSDT. I've applied the Bonjour fix Bonjour fix but I understand that works with a DSDT patch.

 

Unless I'm mistaken I cant figure that one out.....

 

did you try this?

 

replace your

Scope (\_PR)
  {
	  Processor (CPU0, 0x00, 0x00000410, 0x06) {}
	  Processor (CPU1, 0x01, 0x00000410, 0x06) {}
	  Processor (CPU2, 0x02, 0x00000410, 0x06) {}
	  Processor (CPU3, 0x03, 0x00000410, 0x06) {}
  }

section with the "stuff" in the attached text file and remove the whole SSDT tables from your dsdt.aml. this is the easiest way to test whether speedstep works or not. if it does not, it has to be some problem with the values within the package and there i wont be able to help ya.

keeza.txt

 

 

and you may wanna try the fixes in snow itself. coz snow leopard brings about new problems even if you have a perfect leopard.

[Squirrelf]

remove cpui kext, and disabler, reboot

run MSRtools posted in this thread and check if your cpu is still at max frequency

As I have noticed cpui has an impact on how the cpu runs....

and maybe you'll see that speed step is actually working, if not than never mind ....

 

anyway, you may be able to have speed step but your odle temps will be still high...

idle with speed step I managed to be "only" 5C hotter (still +10C on average use) compared to having disabler( but no speed step)

 

lower temp is the whole point for me, less heat usually mean less power consumption... so I don't care about speed step until someone finds a fix for the temperature (well ssdt + c-states did the trick, super low temps, full benchmark on load, even if my cpu is not supposed to support anything but C1E, which I think is why video and sound was stuttering, which is not an option for me )... you may be able to get nice temps after including c-states to your dsdt, since your cpu support C2/C4 you maybe won't get stuttering like I did...

[keeza]

What is your model identifier under system profiler?

 

 

Please see attached pic form sys profile.

 

did you try this?

 

 

Think I am now getting somewhere. See my reply to Eliade.

 

Thank you for pointing out my DSDT error.

 

 

and you may wanna try the fixes in snow itself. coz snow leopard brings about new problems even if you have a perfect leopard.

 

Yes I did, compiled without error!

OK I agree, plan on getting a copy next week.

 

remove cpui kext, and disabler, reboot

run MSRtools posted in this thread and check if your cpu is still at max frequency

As I have noticed cpui has an impact on how the cpu runs....

and maybe you'll see that speed step is actually working, if not than never mind ....

 

anyway, you may be able to have speed step but your odle temps will be still high...

idle with speed step I managed to be "only" 5C hotter (still +10C on average use) compared to having disabler( but no speed step)

 

lower temp is the whole point for me, less heat usually mean less power consumption... so I don't care about speed step until someone finds a fix for the temperature (well ssdt + c-states did the trick, super low temps, full benchmark on load, even if my cpu is not supposed to support anything but C1E, which I think is why video and sound was stuttering, which is not an option for me )... you may be able to get nice temps after including c-states to your dsdt, since your cpu support C2/C4 you maybe won't get stuttering like I did...

 

 

I removed the CPUi kext as you suggested.

I also ammended my DSDT as Yeehaa suggested.

 

Now I have stepper data - I think this is good.

 

I agree with you that without a temp reduction Speedstepping is of no real use. The way I look at it though is if I can get it working then when a fix comes along I'll be ready!!

 

I think this looks good....

 

My output from MSR shows my CPU at my lowest frequency and voltage.

 

Now I will try adding my full SSDT to my DSDT and see what happens......

[keeza]

Looks like I got it working!!

 

CPUi shows stepping now, I seem to be hovering around the 45-50 degrees.

 

It seems that CPUi possibly interferes with getting speedstepping working as Eliade suggested.

 

I removed CPUi kext. I then re-installed CPUi and now the stepping is showing under the status tab.

 

So its possible that this kext perhaps somehow impedes speedstepping. However, in my case, removing and reinstalling the kext seems to have fixed that.

 

I will keep you posted on what happens from here.

 

Thanks to all that helped, particularly Yeehaa, Eliade, Winston and all the others that have contributed to this board.

[Squirrelf]

your temps are about the same as mine with speed step and no disabler (when my room is cool)...

 

Now that you have speed step, I'd give cstates a shot if I were you, use your cst files if you had any with your acpi dump, otherwise try MP3.1 cst files, there are a bunch of dsdt posted in this thread with cst included, it's very easy... just copy and paste, (4 blocks of code, one big from your cst file and 3 other small ones that you can get from other dsdt with cstates fix in this thread), I'll post my c-ctates version if you need it, let me know...

be sure AppleLPC is loaded when you try cstates (if you have the same ICH10R then use the dsdt fix posted earlier)

just run some music in itunes, or a movie, don't move the mouse, and see if you have stuttering

on my machine moving the mouse wildly made the stuttering go away during that moment.

Temperature were about the same as having disabler and no speed step (maybe slightly lower temps), but with cst added, speed step was still running, under-load benchmark were perfect, I don't really know how to visually check c-states, but as long as temps are low, speedstep working and if you don't get stuttering than your setup will be perfect...

 

however with cstates and appleLPC I lost Sleep, which I use often so that's a second reason why I don't use c-states... just so you know

without c-states, but keeping appleLPC, sleep works for me...

 

which cpui are you using, the one posted, or you recompiled it ?

[mitch_de]

Hi i read this thread with interest.

I have an EP35_DS3 and added already PSTATES by DSDT, which that BIOS didnt habe before (superhai & Co must be configured for thate PSTATES before i put them as SSDT in the DSDT).

 

But whats that C-States compared to P-States for ?

And what can i add to my dsdt whithout risk to damage my CPU. Does P-state dsdt(already done) would interact with new added C-Sates ?

If someone postes his CSTATES dsdt part can i use that, or maybe is that only working on same board/CPU ?!

 

I show you, for that who wants to help my actual DSDT Pstates/SSDT parts

 

And last but not least:

Is ist pissoble to use iMac9,1 =C2D CPU typefor that , because i believe MacProx,y use complete different (XEON) cpu type. So i dont want to use it. Now i have iMac 5,1.

Has someone his iMac9,1 smbios.plist for Chameleon injection ?

 

 

    Scope (_PR)
[size=1]    {
       Processor ([b]CPU0[/b], 0x00, 0x00000410, 0x06)
       {
           Name (_PPC, Zero)
           Name (_PCT, Package (0x02)
           {
               ResourceTemplate ()
               {
                   Register (FFixedHW, 
                       0x10,               // Bit Width
                       0x00,               // Bit Offset
                       0x0000000000000199, // Address
                       ,)
               }, 
               ResourceTemplate ()
               {
                   Register (FFixedHW, 
                       0x10,               // Bit Width
                       0x00,               // Bit Offset
                       0x0000000000000198, // Address
                       ,)
               }
           })
           Name (_PSS, Package (0x04)   // [b][size=2]PSTATES[/size][/b]
           {
               Package (0x06)
               {
                   0x0BB5, 
                   0x00013A97, 
                   0x0A, 
                   0x0A, 
                   0x0921, 
                   0x0921
               }, 
               Package (0x06)
               {
                   0x0A68, 
                   0x00010A18, 
                   0x0A, 
                   0x0A, 
                   0x081D, 
                   0x081D
               }, 
               Package (0x06)
               {
                   0x091B, 
                   0xDCFB, 
                   0x0A, 
                   0x0A, 
                   0x071A, 
                   0x071A
               }, 
               Package (0x06)
               {
                   0x07CE, 
                   0xB341, 
                   0x0A, 
                   0x0A, 
                   0x0616, 
                   0x0616
               }
           })
       }
[/size]....... CPU1 looks same

[size=2]my complete [b]SSDT[/b] part ([b]original[/b], self extracted from [b]my[/b] BIOS)
Whats that CST and IST entries ?[/size]


[size=1]    Scope (\)
   {
       Name ([b]SSDT[/b], Package (0x18)
       {
           "CPU0IST ", 
           0xDFEE7F00, 
           0x026C, 
           "CPU1IST ", 
           0xDFEE83C0, 
           0x0152, 
           "CPU0[b]CST[/b] ",  [b] /// ????[/b]
           Zero, 
           0xF000E816, 
           "CPU1CST ", 
           Zero, 
           0xF000E816, 
           "CPU2IST ", 
           Zero, 
           0xF000E816, 
           "CPU3IST ", 
           Zero, 
           0xF000E816, 
           "CPU2CST ", 
           Zero, 
           0xF000E816, 
           "CPU3CST ", 
           Zero, 
           0xF000E816
       })
       Name (CFGD, 0x02030302)
       Name (PDC0, 0x80000000)
       Name (PDC1, 0x80000000)
       Name (PDC2, 0x80000000)
       Name (PDC3, 0x80000000)
   }
   Scope (_PR.CPU0)
   {
       Name (HI0, Zero)
       Name (HC0, Zero)
       Name (TLD0, Zero)
       Method (_PDC, 1, NotSerialized)
       {
           CreateDWordField (Arg0, 0x08, CAP0)
           Store (CAP0, PDC0)
           If (LEqual (TLD0, Zero))
           {
               If (LEqual (And (PDC0, 0x0A), 0x0A))
               {
                   If (And (CFGD, 0x02))
                   {
                       OperationRegion (IST0, SystemMemory, DerefOf (Index (SSDT, One)), DerefOf (Index (SSDT, 0x02
                           )))
                       Load (IST0, HI0)
                   }

                   If (And (CFGD, 0x10))
                   {
                       OperationRegion ([b]CST0[/b], SystemMemory, DerefOf (Index (SSDT, 0x07)), DerefOf (Index (SSDT, 0x08 [b]  //????[/b]
                           )))
                       Load (CST0, HC0)
                   }

                   Store (One, TLD0)
               }
           }
      }
   }[/size]

[size=2].......CPU1..CPU3 looks same[/size]
[/size]

[Master Chief]

The following if statement is not true and thus your table won't even load:

If (And (CFGD, 0x10))
{
OperationRegion (CST0, SystemMemory, DerefOf (Index (SSDT, 0x07)), DerefOf (Index (SSDT, 0x08 //????
)))
Load (CST0, HC0)
}

For that you need to change CFGD to 0x2030312 (now 0x02030302). I am however more interested about the stuff written in post #224 as in do you see the tables, yes or no?

 

N.b. loading tables like this works for Windows, but I still question this whole table loading stuff under OS X.

[WinstonAce]

Looks like I got it working!!

For me it doesn't work with model MacPro2,1

I ned to use smbios.plist in order to change it to MacPro3,1

[keeza]

your temps are about the same as mine with speed step and no disabler (when my room is cool)...

 

Now that you have speed step, I'd give cstates a shot if I were you, use your cst files if you had any with your acpi dump, otherwise try MP3.1 cst files, there are a bunch of dsdt posted in this thread with cst included, it's very easy... just copy and paste, (4 blocks of code, one big from your cst file and 3 other small ones that you can get from other dsdt with cstates fix in this thread), I'll post my c-ctates version if you need it, let me know...

be sure AppleLPC is loaded when you try cstates (if you have the same ICH10R then use the dsdt fix posted earlier)

just run some music in itunes, or a movie, don't move the mouse, and see if you have stuttering

on my machine moving the mouse wildly made the stuttering go away during that moment.

Temperature were about the same as having disabler and no speed step (maybe slightly lower temps), but with cst added, speed step was still running, under-load benchmark were perfect, I don't really know how to visually check c-states, but as long as temps are low, speedstep working and if you don't get stuttering than your setup will be perfect...

 

however with cstates and appleLPC I lost Sleep, which I use often so that's a second reason why I don't use c-states... just so you know

without c-states, but keeping appleLPC, sleep works for me...

 

which cpui are you using, the one posted, or you recompiled it ?

 

OK, I'll give CStates a go.

Do you mind posting your version of CStates. Is CState values specific to your hardware though? I didn't get a CST dump from Everest.

 

Yes I do have ICH10R, standard on the UD3P.

 

Re: Apple LPC loading, are you referring to the Device LCP fix mentioned earlier? If so, I don't have any reference to that in my DSDT so I assume its a new addition? And does it go anywhere specific?

 

I'll try to get CStates going. I'll let you know about the stuttering issue.

 

My version of CPUi is 1.0.3 (1.0.3b1). I didnt compile it, just downloaded from a link provided in a previous post.

 

Just ran a Geekbench test, scored 6093.

I ran it some time ago and got around 7200.

 

When my highest frequency gets used, in my case 2831mhz, the voltage (1.196v) doesn't seem to match the voltage listed in the P-State tab of CPUi (should be 1.308). Is that something to be concerned about?

 

Any ideas on the Geekbench score?

[WinstonAce]

This is my dsdt with cst, we have almost the same board (ep45-ud3r)

I've put all the "SSDT stuff" in the beginning of the dsdt

dsdt.aml.zip

[keeza]

For me it doesn't work with model MacPro2,1

I ned to use smbios.plist in order to change it to MacPro3,1

 

Thats odd, there were other posts earlier on that said you had to change info Plist located in AppleSMC in Platform.Kext.

Then there was another post saying not to change it from 3,1 to 4,1 as it KP's. So I left it as is.

 

However, when it was pointed out to me that my DSDT had compiling errors when in fact it compiled with no errors using DSDTSE; led me to create a new DSDT from scratch using Everest. I believe I got a better DSDT from Everest than from DSDTSE.

I then meticulously made the changes to it and compared mine to numerous others (including yours) and left as much of the original intact as possible.

 

Maybe that explains why it works with 2,1.

Maybe that also explains why my ethernet works (internet and network) without a kext and DSDT patch.

 

This is my dsdt with cst, we have almost the same board (ep45-ud3r)

I've put all the "SSDT stuff" in the beginning of the dsdt

 

Thank you.

 

I'm giving myself a night away from my computer tonight as I'm starting to grow roots trying to get P-States working. Its 6.30pm in Sydney Oz.

 

But I will try for CStates.

 

BTW, is there a way to visually know if its working?

 

And a Noob question, where is Symbios.plist located?

[WinstonAce]

extra folder (beside the dsdt.aml and com.apple.boot.plist id used)

[mitch_de]

The following if statement is not true and thus your table won't even load, for that you need to change CFGD to 0x2030312 (now 0x02030302). I am however more interested about the stuff written in post #224 as in do you see the tables, yes or no?

N.b. loading tables like this works for Windows, but I still question this whole table loading stuff under OS X.

Thanks i will change that.

Here my IOREGISTRY output (before i changed that CFGD part) , PeformanceStates are loaded/used if i use superhais speedstep.

Or what did you meaned with "do you see the tables" ?

Pic shows situation with no AppleINTELCPU and no speedstep loaded+active. CPU runs cool, even without speedstep loaded (MSR shows that it runs always at max speed). less than 40 Celsius idle, 55 Celsius CPU load OC from 2.66 to 3.0 GHZ.

 

How can i see if Cstates are found , where do they listed in the IOREGISTRY ?

[FKA]

OK, I'll give CStates a go.

Do you mind posting your version of CStates. Is CState values specific to your hardware though? I didn't get a CST dump from Everest.

 

Having looked through quite a few cst tables from various sources the only value in the table that seems to vary is latency and of course the memory address the table is loaded to.

 

If it is possible to get c-states to work on a MB that previously did not support them - then my main sticking point so far for me is that I cant find the cst table listed under dmesg when booting voodoo using kprintf=1 in order to see where the table has ACTUALLY been loaded to so that I can amend that address accordingly.

 

D.

 

Thanks i will change that.

 

Here my IOREGISTRY output (before i changed that CFGD part) , PeformanceStates are loaded/used if i use superhais speedstep.

Or what did you meaned with "do you see the tables" ?

Pic shows situation with no AppleINTELCPU and no speedstep loaded+active.

 

How can i see if Cstates are found , where do they listed in the IOREGISTRY ?

 

I would say it looks like your 4 c-states are loaded 0 , 1, 2, 3

 

here's my screen grab. note im using c-states from mac-pro3,1 that only has c0, 1 and 2

NB they may be listed in IOREG and loaded but they dont function!