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Sandy/Ivy should be the same. Haswell and skylake should be separate.

See post 14353

 

Edit: Slice made the value customizable via confit.plist. That would make it easier to experiment.

Thank you for this information. The problem is when a user set this boolean key without paying attention just like me setting this boolean value on XPS 13..

 

IMHO, it's better to initialized LevelMaxW correctly, otherwise let users to set LevelMaxW.

 

syscl

  • Like 1

Thank you for this information. The problem is when a user set this boolean key without paying attention just like me setting this boolean value on XPS 13..

 

IMHO, it's better to initialized LevelMaxW correctly, otherwise let users to set LevelMaxW.

 

syscl

My proposed code only was only for Sandy/Ivy (as stated in Clover Changes thread).

Update your code using values from 14353 and try it out.

 

EDIT: Here's a quick fix.

 

--- rEFIt_UEFI/Platform/Settings.c    (revision 4195)

+++ rEFIt_UEFI/Platform/Settings.c    (working copy)

@@ -6603,7 +6603,35 @@

(Pci.Hdr.ClassCode[1] == PCI_CLASS_DISPLAY_OTHER))) {

 

UINT32 LevelW = 0xC0000000;

- UINT32 LevelMaxW = 0x07100000;

+ // syscl: set PWMMax base on platform

+ // 10: Sandy/Ivy 0x710

+ // 11: Haswell/Broadwell 0xad9

+ // 12: Skylake/KabyLake 0x56c (and some Haswell, example 0xa2e0008)

+ // 99: Other

+ UINT32 LevelMaxW = 0;

+ switch (gCPUStructure.Model) {

+ case CPU_MODEL_SANDY_BRIDGE:

+ case CPU_MODEL_IVY_BRIDGE:

+ LevelMaxW = 0x07100000;

+ break;

+

+ case CPU_MODEL_HASWELL:

+ case CPU_MODEL_HASWELL_ULT:

+ case CPU_MODEL_HASWELL_U5:

+ case CPU_MODEL_CRYSTALWELL:

+ case CPU_MODEL_BROADWELL_HQ:

+ LevelMaxW = 0xad900000;

+ break;

+

+ case CPU_MODEL_SKYLAKE_U:

+ case CPU_MODEL_KABYLAKE1:

+ case CPU_MODEL_KABYLAKE2:

+ LevelMaxW = 0x56c00000;

+ break;

+

+ default:

+ break;

+ }

UINT32 IntelDisable = 0x03;

 

// gGraphics.DeviceID = Pci.Hdr.DeviceId;

 

My proposed code only was only for Sandy/Ivy (as stated in Clover Changes thread).

Update your code using values from 14353 and try it out.

 

EDIT: Here's a quick fix.

--- rEFIt_UEFI/Platform/Settings.c    (revision 4195)
+++ rEFIt_UEFI/Platform/Settings.c    (working copy)
@@ -6603,7 +6603,35 @@
(Pci.Hdr.ClassCode[1] == PCI_CLASS_DISPLAY_OTHER))) {+ case CPU_MODEL_HASWELL:+ case CPU_MODEL_HASWELL_ULT:
+ case CPU_MODEL_HASWELL_U5:
+ case CPU_MODEL_CRYSTALWELL:
+ case CPU_MODEL_BROADWELL_HQ:UINT32 LevelW = 0xC0000000;
- UINT32 LevelMaxW = 0x07100000;
+ // syscl: set PWMMax base on platform
+ // 10: Sandy/Ivy 0x710
+ // 11: Haswell/Broadwell 0xad9
+ // 12: Skylake/KabyLake 0x56c (and some Haswell, example 0xa2e0008)
+ // 99: Other
+ UINT32 LevelMaxW = 0;
+ switch (gCPUStructure.Model) {
+ case CPU_MODEL_SANDY_BRIDGE:
+ case CPU_MODEL_IVY_BRIDGE:
+ LevelMaxW = 0x07100000;
+ break;
+ 
+ case CPU_MODEL_HASWELL:
+ case CPU_MODEL_HASWELL_ULT:
+ case CPU_MODEL_HASWELL_U5:
+ case CPU_MODEL_CRYSTALWELL:
+ case CPU_MODEL_BROADWELL_HQ:
+ LevelMaxW = 0xad900000;
+ break;
+ 
+ case CPU_MODEL_SKYLAKE_U:
+ case CPU_MODEL_KABYLAKE1:
+ case CPU_MODEL_KABYLAKE2:
+ LevelMaxW = 0x56c00000;
+ break;
+ 
+ default:
+ break;
+ }
UINT32 IntelDisable = 0x03;

// gGraphics.DeviceID = Pci.Hdr.DeviceId;

CPU Model is still not enough because some Haswell(ig-platform-id) still need 0x56c00000(same as Skylake/Kabylake). I will post another fix.

 

syscl

  • Like 1

Here's how to use the new custom value: #73

 

BTW, I think SetIntelBacklight should be deprecated/removed now that we have this.

Index: rEFIt_UEFI/Platform/Settings.c
===================================================================
--- rEFIt_UEFI/Platform/Settings.c	(revision 4197)
+++ rEFIt_UEFI/Platform/Settings.c	(working copy)
@@ -6606,7 +6606,36 @@
              (Pci.Hdr.ClassCode[1] == PCI_CLASS_DISPLAY_OTHER))) {
 
               UINT32 LevelW = 0xC0000000;
-              UINT32 LevelMaxW = 0x07100000;
+              // syscl: set PWMMax base on platform
+              // 10: Sandy/Ivy 0x710
+              // 11: Haswell/Broadwell 0xad9
+              // 12: Skylake/KabyLake 0x56c (and some Haswell, example 0xa2e0008)
+              // 99: Other
+              UINT32 LevelMaxW = 0;
+                
+              switch (gCPUStructure.Model) {
+                  case CPU_MODEL_SANDY_BRIDGE:
+                      LevelMaxW = 0x07100000;
+                      case CPU_MODEL_IVY_BRIDGE:
+                      break;
+                      
+                  case CPU_MODEL_HASWELL:
+                  case CPU_MODEL_HASWELL_ULT:
+                  case CPU_MODEL_HASWELL_U5:
+                  case CPU_MODEL_CRYSTALWELL:
+                  case CPU_MODEL_BROADWELL_HQ:
+                      LevelMaxW = gSettings.IgPlatform != (UINT32)0x0a2e0008 ? 0xad900000 : 0x56c00000;
+                      break;
+                      
+                  case CPU_MODEL_SKYLAKE_U:
+                  case CPU_MODEL_KABYLAKE1:
+                  case CPU_MODEL_KABYLAKE2:
+                      LevelMaxW = 0x56c00000;
+                      break;
+                      
+                  default:
+                      break;
+              }
               UINT32 IntelDisable = 0x03;
 
               //        gGraphics.DeviceID = Pci.Hdr.DeviceId;

Now the fix will add one more check on ig-platform-id == 0x0a2e0008.

 

syscl

  • Like 2
Index: rEFIt_UEFI/Platform/Settings.c
===================================================================
--- rEFIt_UEFI/Platform/Settings.c	(revision 4197)
+++ rEFIt_UEFI/Platform/Settings.c	(working copy)
@@ -6606,7 +6606,36 @@
              (Pci.Hdr.ClassCode[1] == PCI_CLASS_DISPLAY_OTHER))) {
 
               UINT32 LevelW = 0xC0000000;
-              UINT32 LevelMaxW = 0x07100000;
+              // syscl: set PWMMax base on platform
+              // 10: Sandy/Ivy 0x710
+              // 11: Haswell/Broadwell 0xad9
+              // 12: Skylake/KabyLake 0x56c (and some Haswell, example 0xa2e0008)
+              // 99: Other
+              UINT32 LevelMaxW = 0;
+                
+              switch (gCPUStructure.Model) {
+                  case CPU_MODEL_SANDY_BRIDGE:
+                      LevelMaxW = 0x07100000;
+                      case CPU_MODEL_IVY_BRIDGE:
+                      break;
+                      
+                  case CPU_MODEL_HASWELL:
+                  case CPU_MODEL_HASWELL_ULT:
+                  case CPU_MODEL_HASWELL_U5:
+                  case CPU_MODEL_CRYSTALWELL:
+                  case CPU_MODEL_BROADWELL_HQ:
+                      LevelMaxW = gSettings.IgPlatform != (UINT32)0x0a2e0008 ? 0xad900000 : 0x56c00000;
+                      break;
+                      
+                  case CPU_MODEL_SKYLAKE_U:
+                  case CPU_MODEL_KABYLAKE1:
+                  case CPU_MODEL_KABYLAKE2:
+                      LevelMaxW = 0x56c00000;
+                      break;
+                      
+                  default:
+                      break;
+              }
               UINT32 IntelDisable = 0x03;
 
               //        gGraphics.DeviceID = Pci.Hdr.DeviceId;

Now the fix will add one more check on ig-platform-id == 0x0a2e0008.

 

syscl

 

I think you can commit this.

  • Like 2

Is it a clover issue with the memory tab missing in about this mac on my laptop in both Sierra and High Sierra or did apple remove it and i not notice til now?

Try to use 0xFFFF in PlatformFeature at config.plist

 

Clover followed vanilla PlatformFeature values on each smbios models.

 

Need to move clover general thread.

 

나의 LG-F800S 의 Tapatalk에서 보냄

Try to use 0xFFFF in PlatformFeature at config.plist

 

Clover followed vanilla PlatformFeature values on each smbios models.

 

Need to move clover general thread.

 

나의 LG-F800S 의 Tapatalk에서 보냄

Thanks, that worked.

Apologies for wrong thread.

  • Like 1

Hi. Whats the value to fully enable sip? 0x0 shows me :

 

System Integrity Protection status: enabled (Custom Configuration).

Configuration:
    Apple Internal: disabled
    Kext Signing: disabled
    Filesystem Protections: disabled
    Debugging Restrictions: disabled
    DTrace Restrictions: disabled
    NVRAM Protections: disabled
    BaseSystem Verification: disabled

 

@ 10.13 Beta 17A360a

Hi. Whats the value to fully enable sip? 0x0 shows me :

 

System Integrity Protection status: enabled (Custom Configuration).

 

Configuration:

    Apple Internal: disabled

    Kext Signing: disabled

    Filesystem Protections: disabled

    Debugging Restrictions: disabled

    DTrace Restrictions: disabled

    NVRAM Protections: disabled

    BaseSystem Verification: disabled

 

@ 10.13 Beta 17A360a

Try 0x67 instead of 0x0. Why full enable sip? But if you want: try csrutil enable in Terminal on Recovery HD.

  • Like 1

Try 0x67 instead of 0x0. Why full enable sip? But if you want: try csrutil enable in Terminal on Recovery HD.

Thanks. Because i want to have Filesystem Protection etc. It alway worked after post-installations when the system was running fine and since i got it 0x0 i could fix an issue with a usb-device (which sounds strange i know) I will try to enable it in Recovery HD.

Thanks. Because i want to have Filesystem Protection etc. It alway worked after post-installations when the system was running fine and since i got it 0x0 i could fix an issue with a usb-device (which sounds strange i know) I will try to enable it in Recovery HD.

0x0 can't use other kext ex. Manual dummy applehda. At least, i recommend to use 0x67 for hack. Or if you dont need to add any kext in S/L/E. You can use more less values. Maybe need to find best value for your enviroment

 

나의 LG-F800S 의 Tapatalk에서 보냄

Index: rEFIt_UEFI/Platform/Settings.c
===================================================================
--- rEFIt_UEFI/Platform/Settings.c	(revision 4197)
+++ rEFIt_UEFI/Platform/Settings.c	(working copy)
@@ -6606,7 +6606,36 @@
              (Pci.Hdr.ClassCode[1] == PCI_CLASS_DISPLAY_OTHER))) {
 
               UINT32 LevelW = 0xC0000000;
-              UINT32 LevelMaxW = 0x07100000;
+              // syscl: set PWMMax base on platform
+              // 10: Sandy/Ivy 0x710
+              // 11: Haswell/Broadwell 0xad9
+              // 12: Skylake/KabyLake 0x56c (and some Haswell, example 0xa2e0008)
+              // 99: Other
+              UINT32 LevelMaxW = 0;
+                
+              switch (gCPUStructure.Model) {
+                  case CPU_MODEL_SANDY_BRIDGE:
+                      LevelMaxW = 0x07100000;
+                      case CPU_MODEL_IVY_BRIDGE:
+                      break;
+                      
+                  case CPU_MODEL_HASWELL:
+                  case CPU_MODEL_HASWELL_ULT:
+                  case CPU_MODEL_HASWELL_U5:
+                  case CPU_MODEL_CRYSTALWELL:
+                  case CPU_MODEL_BROADWELL_HQ:
+                      LevelMaxW = gSettings.IgPlatform != (UINT32)0x0a2e0008 ? 0xad900000 : 0x56c00000;
+                      break;
+                      
+                  case CPU_MODEL_SKYLAKE_U:
+                  case CPU_MODEL_KABYLAKE1:
+                  case CPU_MODEL_KABYLAKE2:
+                      LevelMaxW = 0x56c00000;
+                      break;
+                      
+                  default:
+                      break;
+              }
               UINT32 IntelDisable = 0x03;
 
               //        gGraphics.DeviceID = Pci.Hdr.DeviceId;

Now the fix will add one more check on ig-platform-id == 0x0a2e0008.

 

syscl

 

r4198 Bug! The screen flickers! HD4000 laptop.

r4197 all OK.

Index: rEFIt_UEFI/Platform/Settings.c
===================================================================
--- rEFIt_UEFI/Platform/Settings.c	(revision 4197)
+++ rEFIt_UEFI/Platform/Settings.c	(working copy)
@@ -6606,7 +6606,36 @@
              (Pci.Hdr.ClassCode[1] == PCI_CLASS_DISPLAY_OTHER))) {
 
               UINT32 LevelW = 0xC0000000;
-              UINT32 LevelMaxW = 0x07100000;
+              // syscl: set PWMMax base on platform
+              // 10: Sandy/Ivy 0x710
+              // 11: Haswell/Broadwell 0xad9
+              // 12: Skylake/KabyLake 0x56c (and some Haswell, example 0xa2e0008)
+              // 99: Other
+              UINT32 LevelMaxW = 0;
+                
+              switch (gCPUStructure.Model) {
+                  case CPU_MODEL_SANDY_BRIDGE:
+                      LevelMaxW = 0x07100000;
+                      case CPU_MODEL_IVY_BRIDGE:
+                      break;
+                      
+                  case CPU_MODEL_HASWELL:
+                  case CPU_MODEL_HASWELL_ULT:
+                  case CPU_MODEL_HASWELL_U5:
+                  case CPU_MODEL_CRYSTALWELL:
+                  case CPU_MODEL_BROADWELL_HQ:
+                      LevelMaxW = gSettings.IgPlatform != (UINT32)0x0a2e0008 ? 0xad900000 : 0x56c00000;
+                      break;
+                      
+                  case CPU_MODEL_SKYLAKE_U:
+                  case CPU_MODEL_KABYLAKE1:
+                  case CPU_MODEL_KABYLAKE2:
+                      LevelMaxW = 0x56c00000;
+                      break;
+                      
+                  default:
+                      break;
+              }
               UINT32 IntelDisable = 0x03;
 
               //        gGraphics.DeviceID = Pci.Hdr.DeviceId;

Now the fix will add one more check on ig-platform-id == 0x0a2e0008.

 

syscl

 

                  case CPU_MODEL_SANDY_BRIDGE:
                      LevelMaxW = 0x07100000;
                      case CPU_MODEL_IVY_BRIDGE:
                      break;

This case is broken, no?

  • Like 2

Hmm might be pointless to ask but any chance of building intel mausi and both Realtek next work kexts into clover since they are the most used or isn’t it possible

 

 

Sent from my iPhone using Tapatalk

  • Like 1

0x0 can't use other kext ex. Manual dummy applehda. At least, i recommend to use 0x67 for hack. Or if you dont need to add any kext in S/L/E. You can use more less values. Maybe need to find best value for your enviroment

 

나의 LG-F800S 의 Tapatalk에서 보냄

The Default value in config.plist Clover Package is

<key>CsrActiveConfig</key>
<string>0x3E7</string>
Good or not?

The Default value in config.plist Clover Package is

<key>CsrActiveConfig</key>

<string>0x3E7</string>

Good or not?

Users preference. If you want to disable all csr flags, use 0x3FF. 0x3E7 has some enabled csr flags. At least need 0x67 or over for hack.

 

My case, use 0x67, i dont need to disable all csr flags. It means miniminzed 0x67 for hack. I tested Sierra/High Sierra.

 

EDIT1.

Ofc, According to users system, can use more less csrconfigactive values than 0x67.

 

EDIT2.

Clover used 0x67 in yos/elc/sie. There was problem before.

Actually to disabled all csr flags on each osx

Yos/ElC 0xFF <--- not remember correctly whether both or not. i dont have time to check this. Im in mobile.

Sie 0x1FF

HS 0x3FF

 

 

나의 LG-F800S 의 Tapatalk에서 보냄

  • Like 1

Hmm might be pointless to ask but any chance of building intel mausi and both Realtek next work kexts into clover since they are the most used or isn’t it possible

 

 

Sent from my iPhone using Tapatalk

Compare byte sizes of Clover and of these kexts.

  • Like 1

Users preference. If you want to disable all csr flags, use 0x3FF. 0x3E7 has some enabled csr flags. At least need 0x67 or over for hack.

 

My case, use 0x67, i dont need to disable all csr flags. It means miniminzed 0x67 for hack. I tested Sierra/High Sierra.

 

EDIT1.

Ofc, According to users system, can use more less csrconfigactive values than 0x67.

 

EDIT2.

Clover used 0x67 in yos/elc/sie. There was problem before.

Actually to disabled all csr flags on each osx

Yos/ElC 0xFF <--- not remember correctly whether both or not. i dont have time to check this. Im in mobile.

Sie 0x1FF

HS 0x3FF

 

 

나의 LG-F800S 의 Tapatalk에서 보냄

There's no complete SIP in place with Yosemite. (But yes, there had been some related restrictions inside AppleEFINVRAM since 10.10.4 IIRC.)

Apple has started using 0x77 as "disabled SIP" since certain beta version of 10.11.1.

(I suggest Clover set 0x77 by default to follow Apple's change, although "Apple Internal" is currently still somehow "doing nothing"...)

 

Also take a glance on my previous reply: http://www.insanelymac.com/forum/topic/284656-clover-general-discussion/page-690?do=findComment&comment=2466799

Edited by PMheart
  • Like 1

Compare byte sizes of Clover and of these kexts.

132kb for intelMausi and some reason 456kb for realtek rtl8111 didnt know they where so small 

<script> </script>

Updated to Clover 4200, all working perfectly. Full backlight range, save/restore across reboots -- working natively with stock Apple kexts :D

 

Thanks Slice, syscl, and everyone else.

  • Like 1

Users preference. If you want to disable all csr flags, use 0x3FF. 0x3E7 has some enabled csr flags. At least need 0x67 or over for hack.

 

My case, use 0x67, i dont need to disable all csr flags. It means miniminzed 0x67 for hack. I tested Sierra/High Sierra.

 

EDIT1.

Ofc, According to users system, can use more less csrconfigactive values than 0x67.

 

EDIT2.

Clover used 0x67 in yos/elc/sie. There was problem before.

Actually to disabled all csr flags on each osx

Yos/ElC 0xFF

Sie 0x1FF

HS 0x3FF

 

 

나의 LG-F800S 의 Tapatalk에서 보냄

Those keys are not magic. Just take XNU sources and found how they used.

CSR_ALLOW_APPLE_INTERNAL is used only for debugging kernel by dtrace. No other usage.

	if (csr_check(CSR_ALLOW_KERNEL_DEBUGGER) != 0 &&
	    csr_check(CSR_ALLOW_APPLE_INTERNAL) != 0) {
		if (debug_flags)
			*debug_flags = 0;
		return FALSE;
	}

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