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DSDT fixes for Gigabyte boards


iSoprano
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Now with mark-i it's easy to see why going to C4 doesn't seem to drop temps very much. I have my cpu cooler set to auto mode in bios, so as soon as cpu enters C4 cooler's RPM drops from 1500 to 1400. So it's more like temps drop a little and noise level drops a little.

 

Not for me. My FANs without self-control. I have no problems with audio/video :) C4 is switched on and a low voltage work. During playback, the voltage does not fall below 1,072.

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Someone explain me, why should I remove these values?

 

Scope (\)
{
   OperationRegion (WIN1, SystemIO, 0x2E, 0x02)
   Field (WIN1, ByteAcc, NoLock, Preserve)
   {
       INDP,   8, 
       DATP,   8
   }

   OperationRegion (GPIO, SystemIO, 0x0800, 0x06)
   Field (GPIO, ByteAcc, NoLock, Preserve)
   {
       GP9,    1,
       GO01,   8, 
       GO02,   8, 
       GO03,   8, 
       GO04,   8, 
       GO05,   8
   }

   IndexField (INDP, DATP, ByteAcc, NoLock, Preserve)
   {
               Offset (0x02), 
       CFG,    8, 
               Offset (0x07), 
       LDN,    8, 
               Offset (0x20), 
       IDHI,   8, 
       IDLO,   8, 
       POWC,   8, 
               Offset (0x30), 
       ACTR,   8, 
               Offset (0x60), 
       IOAH,   8, 
       IOAL,   8, 
       IO2H,   8, 
       IO2L,   8, 
               Offset (0x70), 
       INTR,   8, 
               Offset (0x72), 
       INT1,   8, 
               Offset (0x74), 
       DMCH,   8, 
               Offset (0xC0), 
       GP40,   8, 
               Offset (0xF0), 
       OPT1,   8, 
       OPT2,   8, 
       OPT3,   8, 
       OPT4,   8
   }

   Method (ENFG, 0, NotSerialized)
   {
       Store (0x87, INDP)
       Store (One, INDP)
       Store (0x55, INDP)
       Store (0x55, INDP)
   }

   Method (EXFG, 0, NotSerialized)
   {
       Store (0x02, CFG)
   }

   Method (GSRG, 1, NotSerialized)
   {
       Store (Arg0, INDP)
       Return (DATP)
   }

   Method (SSRG, 2, NotSerialized)
   {
       Store (Arg0, INDP)
       Store (Arg1, DATP)
   }
}

 

I checked the ICH9 datasheet, but I don't understand much. Thanks!

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Someone explain me, why should I remove these values?

 

Scope (\)
{
   OperationRegion (WIN1, SystemIO, 0x2E, 0x02)
   Field (WIN1, ByteAcc, NoLock, Preserve)
   {
       INDP,   8, 
       DATP,   8
   }

   OperationRegion (GPIO, SystemIO, 0x0800, 0x06)
   Field (GPIO, ByteAcc, NoLock, Preserve)
   {
       GP9,    1,
       GO01,   8, 
       GO02,   8, 
       GO03,   8, 
       GO04,   8, 
       GO05,   8
   }

   IndexField (INDP, DATP, ByteAcc, NoLock, Preserve)
   {
               Offset (0x02), 
       CFG,    8, 
               Offset (0x07), 
       LDN,    8, 
               Offset (0x20), 
       IDHI,   8, 
       IDLO,   8, 
       POWC,   8, 
               Offset (0x30), 
       ACTR,   8, 
               Offset (0x60), 
       IOAH,   8, 
       IOAL,   8, 
       IO2H,   8, 
       IO2L,   8, 
               Offset (0x70), 
       INTR,   8, 
               Offset (0x72), 
       INT1,   8, 
               Offset (0x74), 
       DMCH,   8, 
               Offset (0xC0), 
       GP40,   8, 
               Offset (0xF0), 
       OPT1,   8, 
       OPT2,   8, 
       OPT3,   8, 
       OPT4,   8
   }

   Method (ENFG, 0, NotSerialized)
   {
       Store (0x87, INDP)
       Store (One, INDP)
       Store (0x55, INDP)
       Store (0x55, INDP)
   }

   Method (EXFG, 0, NotSerialized)
   {
       Store (0x02, CFG)
   }

   Method (GSRG, 1, NotSerialized)
   {
       Store (Arg0, INDP)
       Return (DATP)
   }

   Method (SSRG, 2, NotSerialized)
   {
       Store (Arg0, INDP)
       Store (Arg1, DATP)
   }
}

 

I checked the ICH9 datasheet, but I don't understand much. Thanks!

 

That code is used to communicate with Super-I/O chip when setting up floppy disc, LPT port or serial port. If you don't use those then you have no need for this piece of code.

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ok this one add also UUID fix, but with some little differences, the random UUID fix is not by default, since i prefer use the platformuuid.kext:

 

so if u want to use the rekursor's system id fix just add that to ur boot.plist file:

 

<key>SystemID</key> 
 <string>your ID</string>

 

if you want to activate the random id add this key (make sure that no SystemID key is present otherwise the system id fix will be used):

 

<key>RandomID</key> 
 <string>Yes</string>

 

 

and if you want to use a kext like platformUUID.kext (like me :thumbsup_anim: ), you just have to delete the 2 keys above, of course w/o one of those 3 solutions you will get a beautiful Error 35 ;)

 

all previous additions are still present

 

 

pc_efi 10.5 + restartfix + uuidfix and many others things:

Could I please ask you, either provide those of us not with your knowledge and experience a Readme file, enumerating all the entries that are supported with this version and their values?

Or if such a document already exists include it in your package. Since you are improving on Chamelon capabilities, I wonder if you are in Synch with them or your enhancements are not included in their official releases. The multiplicity of boot versions is really making life difficult for an average user.

Thanks for your understanding.

Artimess

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Could I please ask you, either provide those of us not with your knowledge and experience a Readme file, enumerating all the entries that are supported with this version and their values?

Or if such a document already exists include it in your package. Since you are improving on Chamelon capabilities, I wonder if you are in Synch with them or your enhancements are not included in their official releases. The multiplicity of boot versions is really making life difficult for an average user.

Thanks for your understanding.

Artimess

 

i want to clarify something, those new options are not all mine enhancements, it's just a merge of multiple usefull patch

 

ps: for a chameleon RC4 version please be patient :D

 

boothelp for this version

 

In addition of the current official pc_efi 10.5 options, this version add:

 RandomID=Yes               Enable automatic UUID fix (disabled by default).

 SystemID=<Your ID here>   Manually set the desired system uuid 

 RestartFix=Yes             Enable the restart fix (disabled by default).

 DropSSDT=Yes              Skip the SSDT tables while relocating the ACPI

 DropHPET=Yes              Skip the HPET tables while relocating the ACPI

 DropSLIC=Yes              Skip the SLIC tables while relocating the ACPI

 DropSBST=Yes              Skip the SBST tables while relocating the ACPI

 DropECDT=Yes              Skip the ECDT tables while relocating the ACPI

 DropASFT=Yes              Skip the ASFT tables while relocating the ACPI

 DropDMAR=Yes              Skip the DMAR tables while relocating the ACPI

 SSDT=<file>               Use an alternate SSDT.aml file(s) 
                             (default path: /SSDT.aml /Extra/SSDT.aml)

 HPET=<file>               Use an alternate DSDT.aml file 
                             (default path: /DSDT.aml /Extra/DSDT.aml)

 SLIC=<file>               Use an alternate SLIC.aml file 
                             (default path: /SLIC.aml /Extra/SLIC.aml)

 SBST=<file>               Use an alternate SBST.aml file 
                             (default path: /SBST.aml /Extra/SBST.aml)

 ECDT=<file>               Use an alternate ECDT.aml file 
                             (default path: /ECDT.aml /Extra/ECDT.aml)

 ASFT=<file>               Use an alternate ASFT.aml file 
                             (default path: /ASFT.aml /Extra/ASFT.aml)

 DMAR=<file>               Use an alternate DMAR.aml file 
                             (default path: /DMAR.aml /Extra/DMAR.aml)

oemDSDT=Yes             Use oem DSDT table

oemSSDT=Yes             Use oem SSDT table

oemHPET=Yes             Use oem HPET table

oemSBST=Yes             Use oem SBST table (if available)

oemECDT=Yes             Use oem ECDT table (if available)

oemASFT=Yes             Use oem ASFT table (if available)

oemDMAR=Yes             Use oem DMAR table (if available)

oemFADT=Yes             Use oem FADT table

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i want to clarify something, those new options are not all mine enhancements, it's just a merge of multiple usefull patch

 

ps: for a chameleon RC4 version please be patient ;)

 

boothelp for this version

 

In addition of the current official pc_efi 10.5 options, this version add:

 RandomID=Yes               Enable automatic UUID fix (disabled by default).

 SystemID=<Your ID here>   Manually set the desired system uuid 

 RestartFix=Yes             Enable the restart fix (disabled by default).

 DropSSDT=Yes              Skip the SSDT tables while relocating the ACPI

 DropHPET=Yes              Skip the HPET tables while relocating the ACPI

 DropSLIC=Yes              Skip the SLIC tables while relocating the ACPI

 DropSBST=Yes              Skip the SBST tables while relocating the ACPI

 DropECDT=Yes              Skip the ECDT tables while relocating the ACPI

 DropASFT=Yes              Skip the ASFT tables while relocating the ACPI

 DropDMAR=Yes              Skip the DMAR tables while relocating the ACPI

 SSDT=<file>               Use an alternate SSDT.aml file(s) 
                             (default path: /SSDT.aml /Extra/SSDT.aml)

 HPET=<file>               Use an alternate DSDT.aml file 
                             (default path: /DSDT.aml /Extra/DSDT.aml)

 SLIC=<file>               Use an alternate SLIC.aml file 
                             (default path: /SLIC.aml /Extra/SLIC.aml)

 SBST=<file>               Use an alternate SBST.aml file 
                             (default path: /SBST.aml /Extra/SBST.aml)

 ECDT=<file>               Use an alternate ECDT.aml file 
                             (default path: /ECDT.aml /Extra/ECDT.aml)

 ASFT=<file>               Use an alternate ASFT.aml file 
                             (default path: /ASFT.aml /Extra/ASFT.aml)

 DMAR=<file>               Use an alternate DMAR.aml file 
                             (default path: /DMAR.aml /Extra/DMAR.aml)

oemDSDT=Yes             Use oem DSDT table

oemSSDT=Yes             Use oem SSDT table

oemHPET=Yes             Use oem HPET table

oemSBST=Yes             Use oem SBST table (if available)

oemECDT=Yes             Use oem ECDT table (if available)

oemASFT=Yes             Use oem ASFT table (if available)

oemDMAR=Yes             Use oem DMAR table (if available)

oemFADT=Yes             Use oem FADT table

 

Yes, wonderful, this is at least what I needed.

Many thanks,

Artimess

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Does CPU-X work correctly in 10.6.2? Does it show only the speed at its own startup, or does it just not work correctly.

I'm having doubts: cpu-X_lies_and_voodoomonitor_tells_truth.jpg

 

It looks like VoodooMonitor shows the cpu stepping through its speeds from idle to full, but CPU-X seems like a static reading.

 

???

 

Does the voodoomonitor.kext actually enable speedstepping? Or does it just enable correct cpu speed measure/display/detection by voodoomonitor?

 

If it doesn't actually enable speedstepping by itself, and is just for reading the values, then I've got speedstepping working w/ my patched dsdt.

 

???

 

I guess another way to ask this is : What tool/app in 10.6.2 can we use to measure the cpu speed realtime, and actually see speedstepping - without a kext?

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i want to clarify something, those new options are not all mine enhancements, it's just a merge of multiple usefull patch

 

ps: for a chameleon RC4 version please be patient :D

 

boothelp for this version

 

In addition of the current official pc_efi 10.5 options, this version add:

 RandomID=Yes               Enable automatic UUID fix (disabled by default).

 SystemID=<Your ID here>   Manually set the desired system uuid 

 RestartFix=Yes             Enable the restart fix (disabled by default).

 DropSSDT=Yes              Skip the SSDT tables while relocating the ACPI

 DropHPET=Yes              Skip the HPET tables while relocating the ACPI

 DropSLIC=Yes              Skip the SLIC tables while relocating the ACPI

 DropSBST=Yes              Skip the SBST tables while relocating the ACPI

 DropECDT=Yes              Skip the ECDT tables while relocating the ACPI

 DropASFT=Yes              Skip the ASFT tables while relocating the ACPI

 DropDMAR=Yes              Skip the DMAR tables while relocating the ACPI

 SSDT=<file>               Use an alternate SSDT.aml file(s) 
                             (default path: /SSDT.aml /Extra/SSDT.aml)

 HPET=<file>               Use an alternate DSDT.aml file 
                             (default path: /DSDT.aml /Extra/DSDT.aml)

 SLIC=<file>               Use an alternate SLIC.aml file 
                             (default path: /SLIC.aml /Extra/SLIC.aml)

 SBST=<file>               Use an alternate SBST.aml file 
                             (default path: /SBST.aml /Extra/SBST.aml)

 ECDT=<file>               Use an alternate ECDT.aml file 
                             (default path: /ECDT.aml /Extra/ECDT.aml)

 ASFT=<file>               Use an alternate ASFT.aml file 
                             (default path: /ASFT.aml /Extra/ASFT.aml)

 DMAR=<file>               Use an alternate DMAR.aml file 
                             (default path: /DMAR.aml /Extra/DMAR.aml)

oemDSDT=Yes             Use oem DSDT table

oemSSDT=Yes             Use oem SSDT table

oemHPET=Yes             Use oem HPET table

oemSBST=Yes             Use oem SBST table (if available)

oemECDT=Yes             Use oem ECDT table (if available)

oemASFT=Yes             Use oem ASFT table (if available)

oemDMAR=Yes             Use oem DMAR table (if available)

oemFADT=Yes             Use oem FADT table

 

But SSDT override isn't working for me. I used dumpacpitbls utility and a got default motherboard's SSDT. I have put SSDT.aml into /Extra/ folder.

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But SSDT override isn't working for me. I used dumpacpitbls utility and a got default motherboard's SSDT. I have put SSDT.aml into /Extra/ folder.

 

hi, thank for this report

 

what's happen if you rename your first SSDT file to SSDT-1.aml, second SSDT (if you have one) to SSDT-2.aml, etc....... ??

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OK for those using iStat. It seems iStat is fine with auto-sleep as long as you don't enable "Monitor S.M.A.R.T drive temps". As soon as I disabled this auto-sleep started working again.

 

I've also all the other menu extras disabled so I can't yet say what else may disable sleep. All I have running is just CPU temperatures for my four cores.

 

post-16858-1262867188_thumb.jpg

 

FYI, For those OC'ers I've attached my BIOS setting in my signature.

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kdawg, BOOTLOADER: Chameleon RC4/UUID patch/Restart patch

 

there's a few modded pc-efi 10.5's floating around with the uuid/restart patch, but they're all based on RC3, where did you get the patched RC4? (i know there's a uuid patch for rc4, afaik it doesn't have restart fix?)

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kdawg, BOOTLOADER: Chameleon RC4/UUID patch/Restart patch

 

there's a few modded pc-efi 10.5's floating around with the uuid/restart patch, but they're all based on RC3, where did you get the patched RC4? (i know there's a uuid patch for rc4, afaik it doesn't have restart fix?)

Have a look here http://www.insanelymac.com/forum/index.php...t&p=1369210

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hi, thank for this report

 

what's happen if you rename your first SSDT file to SSDT-1.aml, second SSDT (if you have one) to SSDT-2.aml, etc....... ??

 

I renamed but without success. Also I tried options SSDT=<file> - not working. I hope that I can move all CPU and PCI card definitions from DSDT to SSDT :D It would be very useful. We can get generic patched DSDT for motherboard, and make changes only in SSDT. I hope it could be done, how do you think?

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Thanks blackosx! no clue how i missed that, been following this thread since page 1 haha

 

 

btw, kdawg, i noticed in your bios.txt, you have:

Quick Boot.................................: [Disabled] <-- This does not play nice with OS X!!

 

do you know what the side effects of having it enabled would be?

just switched it to disabled, been getting hard lockups, wondering if that could have anything to do with it =)

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That's the one!

 

btw, kdawg, i noticed in your bios.txt, you have:

Quick Boot.................................: [Disabled] <-- This does not play nice with OS X!!

 

do you know what the side effects of having it enabled would be?

just switched it to disabled, been getting hard lockups, wondering if that could have anything to do with it =)

I was getting some weird memory errors. I was able to boot but the OS was acting very wonky.
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hi, thank for this report

 

what's happen if you rename your first SSDT file to SSDT-1.aml, second SSDT (if you have one) to SSDT-2.aml, etc....... ??

 

Yeh, I've checked your boot sources and found that SSDT table filenames starting with 0, not 1. I've renamed my SSDT-1.aml to SSDT-0.aml and it's works now! I perfectly moved all my airport, graphics and other periferal PCI devices into SSDT-1.aml. Also I have SSDT-0.aml with CPU methods like _CST, _PDC and _PSS. Now I have generic DSDT and separated SSDTs for all my specific devices.

 

Good job man I say! Thank you for your work.

 

DSDT.dsl.zip

SSDT_0.dsl.zip

SSDT_1.dsl.zip

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I'm almost ready with my dsdt, but I'm not really sure about:

 

Device (PEX3.JMB0)
{
   Name (_ADR, Zero)
   Name (PIOT, Package (0x05)
   {
       0x0258, 
       0x0186, 
       0x014A, 
       0xB4, 
       0x78
   })
   Name (MDMA, Package (0x03)
   {
       0x01E0, 
       0x96, 
       0x78
   })
   Name (UDMA, Package (0x07)
   {
       0x78, 
       0x50, 
       0x3C, 
       0x28, 
       0x1E, 
       0x14, 
       0x0F
   })
   OperationRegion (CF40, PCI_Config, 0x40, 0x04)
   Field (CF40, ByteAcc, NoLock, Preserve)
   {
           ,   3, 
       CAB0,   1, 
           ,   18, 
       SWAP,   1, 
       CHN0,   1, 
               Offset (0x04)
   }

   OperationRegion (CF80, PCI_Config, 0x80, 0x04)
   Field (CF80, ByteAcc, NoLock, Preserve)
   {
           ,   19, 
       CAB1,   1, 
               Offset (0x03), 
       CHN1,   1, 
               Offset (0x04)
   }

   Name (IDEB, Buffer (0x14) {})
   CreateDWordField (IDEB, Zero, GTM0)
   CreateDWordField (IDEB, 0x04, GTM1)
   CreateDWordField (IDEB, 0x08, GTM2)
   CreateDWordField (IDEB, 0x0C, GTM3)
   CreateDWordField (IDEB, 0x10, GTM4)
   Name (PMIO, 0x04)
   Name (PMDM, 0x06)
   Name (PSIO, 0x04)
   Name (PSDM, 0x06)
   Name (SMIO, 0x04)
   Name (SMDM, 0x06)
   Name (SSIO, 0x04)
   Name (SSDM, 0x06)
   Name (MODP, 0x05)
   Name (MODS, 0x05)
   Device (SDE0)
   {
       Name (_ADR, Zero)

       Method (_STM, 3, NotSerialized)
       {
           Store (Arg0, IDEB)
           Store (GTM0, Local0)
           Store (GTM1, Local1)
           Store (GTM2, Local2)
           Store (GTM3, Local3)
           Store (GTM4, Local4)
           If (LAnd (LNotEqual (Local0, Ones), LNotEqual (Local0, Zero)))
           {
               Store (Match (PIOT, MEQ, Local0, MTR, Zero, Zero), PMIO)
           }

           If (LAnd (LNotEqual (Local1, Ones), LNotEqual (Local1, Zero)))
           {
               If (LAnd (Local4, One))
               {
                   Store (Match (UDMA, MEQ, Local1, MTR, Zero, Zero), PMDM)
               }
               Else
               {
                   Store (Match (MDMA, MEQ, Local1, MTR, Zero, Zero), PMDM)
               }
           }

           If (LAnd (LNotEqual (Local2, Ones), LNotEqual (Local2, Zero)))
           {
               Store (Match (PIOT, MEQ, Local2, MTR, Zero, Zero), PSIO)
           }

           If (LAnd (LNotEqual (Local3, Ones), LNotEqual (Local3, Zero)))
           {
               If (LAnd (Local4, 0x04))
               {
                   Store (Match (UDMA, MEQ, Local3, MTR, Zero, Zero), PSDM)
               }
               Else
               {
                   Store (Match (MDMA, MEQ, Local3, MTR, Zero, Zero), PSDM)
               }
           }

           Store (Local4, MODP)
       }
   }

   Device (SDE1)
   {
       Name (_ADR, One)

       Method (_STM, 3, NotSerialized)
       {
           Store (Arg0, IDEB)
           Store (GTM0, Local0)
           Store (GTM1, Local1)
           Store (GTM2, Local2)
           Store (GTM3, Local3)
           Store (GTM4, Local4)
           If (LAnd (LNotEqual (Local0, Ones), LNotEqual (Local0, Zero)))
           {
               Store (Match (PIOT, MEQ, Local0, MTR, Zero, Zero), SMIO)
           }

           If (LAnd (LNotEqual (Local1, Ones), LNotEqual (Local1, Zero)))
           {
               If (LAnd (Local4, One))
               {
                   Store (Match (UDMA, MEQ, Local1, MTR, Zero, Zero), SMDM)
               }
               Else
               {
                   Store (Match (MDMA, MEQ, Local1, MTR, Zero, Zero), SMDM)
               }
           }

           If (LAnd (LNotEqual (Local2, Ones), LNotEqual (Local2, Zero)))
           {
               Store (Match (PIOT, MEQ, Local2, MTR, Zero, Zero), SSIO)
           }

           If (LAnd (LNotEqual (Local3, Ones), LNotEqual (Local3, Zero)))
           {
               If (LAnd (Local4, 0x04))
               {
                   Store (Match (UDMA, MEQ, Local3, MTR, Zero, Zero), SSDM)
               }
               Else
               {
                   Store (Match (MDMA, MEQ, Local3, MTR, Zero, Zero), SSDM)
               }
           }

           Store (Local4, MODS)
       }
   }
}

Device (PEX3.JMB1)
{
   Name (_ADR, One)
   Name (PIOT, Package (0x05)
   {
       0x0258, 
       0x0186, 
       0x014A, 
       0xB4, 
       0x78
   })
   Name (MDMA, Package (0x03)
   {
       0x01E0, 
       0x96, 
       0x78
   })
   Name (UDMA, Package (0x07)
   {
       0x78, 
       0x50, 
       0x3C, 
       0x28, 
       0x1E, 
       0x14, 
       0x0F
   })
   OperationRegion (CF40, PCI_Config, 0x40, 0x04)
   Field (CF40, ByteAcc, NoLock, Preserve)
   {
           ,   3, 
       CAB0,   1, 
           ,   18, 
       SWAP,   1, 
       CHN0,   1, 
               Offset (0x04)
   }

   OperationRegion (CF80, PCI_Config, 0x80, 0x04)
   Field (CF80, ByteAcc, NoLock, Preserve)
   {
           ,   19, 
       CAB1,   1, 
               Offset (0x03), 
       CHN1,   1, 
               Offset (0x04)
   }

   Name (IDEB, Buffer (0x14) {})
   CreateDWordField (IDEB, Zero, GTM0)
   CreateDWordField (IDEB, 0x04, GTM1)
   CreateDWordField (IDEB, 0x08, GTM2)
   CreateDWordField (IDEB, 0x0C, GTM3)
   CreateDWordField (IDEB, 0x10, GTM4)
   Name (PMIO, 0x04)
   Name (PMDM, 0x06)
   Name (PSIO, 0x04)
   Name (PSDM, 0x06)
   Name (SMIO, 0x04)
   Name (SMDM, 0x06)
   Name (SSIO, 0x04)
   Name (SSDM, 0x06)
   Name (MODP, 0x05)
   Name (MODS, 0x05)
   Device (SDE0)
   {
       Name (_ADR, Zero)
   }

   Device (SDE1)
   {
       Name (_ADR, One)
   }
}

 

Are PEX3.JMB0 and PEX3.JMB1, IDE related stuff? I don't have any IDE drive. Can I remove these devices? Thanks!

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I'm almost ready with my dsdt, but I'm not really sure about:

 

Device (PEX3.JMB0)
{
   Name (_ADR, Zero)
   Name (PIOT, Package (0x05)
   {
       0x0258, 
       0x0186, 
       0x014A, 
       0xB4, 
       0x78
   })
   Name (MDMA, Package (0x03)
   {
       0x01E0, 
       0x96, 
       0x78
   })
   Name (UDMA, Package (0x07)
   {
       0x78, 
       0x50, 
       0x3C, 
       0x28, 
       0x1E, 
       0x14, 
       0x0F
   })
   OperationRegion (CF40, PCI_Config, 0x40, 0x04)
   Field (CF40, ByteAcc, NoLock, Preserve)
   {
           ,   3, 
       CAB0,   1, 
           ,   18, 
       SWAP,   1, 
       CHN0,   1, 
               Offset (0x04)
   }

   OperationRegion (CF80, PCI_Config, 0x80, 0x04)
   Field (CF80, ByteAcc, NoLock, Preserve)
   {
           ,   19, 
       CAB1,   1, 
               Offset (0x03), 
       CHN1,   1, 
               Offset (0x04)
   }

   Name (IDEB, Buffer (0x14) {})
   CreateDWordField (IDEB, Zero, GTM0)
   CreateDWordField (IDEB, 0x04, GTM1)
   CreateDWordField (IDEB, 0x08, GTM2)
   CreateDWordField (IDEB, 0x0C, GTM3)
   CreateDWordField (IDEB, 0x10, GTM4)
   Name (PMIO, 0x04)
   Name (PMDM, 0x06)
   Name (PSIO, 0x04)
   Name (PSDM, 0x06)
   Name (SMIO, 0x04)
   Name (SMDM, 0x06)
   Name (SSIO, 0x04)
   Name (SSDM, 0x06)
   Name (MODP, 0x05)
   Name (MODS, 0x05)
   Device (SDE0)
   {
       Name (_ADR, Zero)

       Method (_STM, 3, NotSerialized)
       {
           Store (Arg0, IDEB)
           Store (GTM0, Local0)
           Store (GTM1, Local1)
           Store (GTM2, Local2)
           Store (GTM3, Local3)
           Store (GTM4, Local4)
           If (LAnd (LNotEqual (Local0, Ones), LNotEqual (Local0, Zero)))
           {
               Store (Match (PIOT, MEQ, Local0, MTR, Zero, Zero), PMIO)
           }

           If (LAnd (LNotEqual (Local1, Ones), LNotEqual (Local1, Zero)))
           {
               If (LAnd (Local4, One))
               {
                   Store (Match (UDMA, MEQ, Local1, MTR, Zero, Zero), PMDM)
               }
               Else
               {
                   Store (Match (MDMA, MEQ, Local1, MTR, Zero, Zero), PMDM)
               }
           }

           If (LAnd (LNotEqual (Local2, Ones), LNotEqual (Local2, Zero)))
           {
               Store (Match (PIOT, MEQ, Local2, MTR, Zero, Zero), PSIO)
           }

           If (LAnd (LNotEqual (Local3, Ones), LNotEqual (Local3, Zero)))
           {
               If (LAnd (Local4, 0x04))
               {
                   Store (Match (UDMA, MEQ, Local3, MTR, Zero, Zero), PSDM)
               }
               Else
               {
                   Store (Match (MDMA, MEQ, Local3, MTR, Zero, Zero), PSDM)
               }
           }

           Store (Local4, MODP)
       }
   }

   Device (SDE1)
   {
       Name (_ADR, One)

       Method (_STM, 3, NotSerialized)
       {
           Store (Arg0, IDEB)
           Store (GTM0, Local0)
           Store (GTM1, Local1)
           Store (GTM2, Local2)
           Store (GTM3, Local3)
           Store (GTM4, Local4)
           If (LAnd (LNotEqual (Local0, Ones), LNotEqual (Local0, Zero)))
           {
               Store (Match (PIOT, MEQ, Local0, MTR, Zero, Zero), SMIO)
           }

           If (LAnd (LNotEqual (Local1, Ones), LNotEqual (Local1, Zero)))
           {
               If (LAnd (Local4, One))
               {
                   Store (Match (UDMA, MEQ, Local1, MTR, Zero, Zero), SMDM)
               }
               Else
               {
                   Store (Match (MDMA, MEQ, Local1, MTR, Zero, Zero), SMDM)
               }
           }

           If (LAnd (LNotEqual (Local2, Ones), LNotEqual (Local2, Zero)))
           {
               Store (Match (PIOT, MEQ, Local2, MTR, Zero, Zero), SSIO)
           }

           If (LAnd (LNotEqual (Local3, Ones), LNotEqual (Local3, Zero)))
           {
               If (LAnd (Local4, 0x04))
               {
                   Store (Match (UDMA, MEQ, Local3, MTR, Zero, Zero), SSDM)
               }
               Else
               {
                   Store (Match (MDMA, MEQ, Local3, MTR, Zero, Zero), SSDM)
               }
           }

           Store (Local4, MODS)
       }
   }
}

Device (PEX3.JMB1)
{
   Name (_ADR, One)
   Name (PIOT, Package (0x05)
   {
       0x0258, 
       0x0186, 
       0x014A, 
       0xB4, 
       0x78
   })
   Name (MDMA, Package (0x03)
   {
       0x01E0, 
       0x96, 
       0x78
   })
   Name (UDMA, Package (0x07)
   {
       0x78, 
       0x50, 
       0x3C, 
       0x28, 
       0x1E, 
       0x14, 
       0x0F
   })
   OperationRegion (CF40, PCI_Config, 0x40, 0x04)
   Field (CF40, ByteAcc, NoLock, Preserve)
   {
           ,   3, 
       CAB0,   1, 
           ,   18, 
       SWAP,   1, 
       CHN0,   1, 
               Offset (0x04)
   }

   OperationRegion (CF80, PCI_Config, 0x80, 0x04)
   Field (CF80, ByteAcc, NoLock, Preserve)
   {
           ,   19, 
       CAB1,   1, 
               Offset (0x03), 
       CHN1,   1, 
               Offset (0x04)
   }

   Name (IDEB, Buffer (0x14) {})
   CreateDWordField (IDEB, Zero, GTM0)
   CreateDWordField (IDEB, 0x04, GTM1)
   CreateDWordField (IDEB, 0x08, GTM2)
   CreateDWordField (IDEB, 0x0C, GTM3)
   CreateDWordField (IDEB, 0x10, GTM4)
   Name (PMIO, 0x04)
   Name (PMDM, 0x06)
   Name (PSIO, 0x04)
   Name (PSDM, 0x06)
   Name (SMIO, 0x04)
   Name (SMDM, 0x06)
   Name (SSIO, 0x04)
   Name (SSDM, 0x06)
   Name (MODP, 0x05)
   Name (MODS, 0x05)
   Device (SDE0)
   {
       Name (_ADR, Zero)
   }

   Device (SDE1)
   {
       Name (_ADR, One)
   }
}

 

Are PEX3.JMB0 and PEX3.JMB1, IDE related stuff? I don't have any IDE drive. Can I remove these devices? Thanks!

Yes. They're the JMicron IDE ports. Take them out.

 

 

That's the one!

 

I was getting some weird memory errors. I was able to boot but the OS was acting very wonky.

Quick Boot is supposed to bypass memory checking on startup. Very appealing as it would help speed the boot process by at least 3-4 seconds for me. But like I said OS X acts very strange.
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In my IORegistery, when I check for speedstep I see "CState Override True". This happens only when I use MB3,1 profile, otherwise, it is zero!

 

Could someone please explain to me what is the ramification of this situation? Does that mean OSX will be using its own CState definitions? or what?

 

If I run "setpci -s 0:1f.0 0xa6.b" in this case I get 07? What does that mean?

Where should I look to find the meanings of these returned values?

 

Other question is related to getting CStates to work, we started playing with CFG values at the begining, now that I look at minimalist DSDTs, and the fact that none of them has any reference to CFG I wonder how you are able to get CStates working. Does that mean all the work in interpretation of CFG did not really matter, except for learning experience?

And could you please tell me if you still use dropSSDT=yes flag or that is not anymore needed.

If not if I understand it correctly, then the SSDT tables will be loaded, does than mean OSX will ignor them because of additions for pstate and cstates that we are adding to DSDT!

 

And finally, could one of you please give me the link to mm67 latest DSDT and his original one.

Thanks,

Artimess

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Thanks, kdawg :)

One more thing... My on-board LAN is broken (disabled in BIOS)... How can I obtain the on-board LAN address ? I would like to remove the on-board LAN from DSDT.

 

I have a separate Netgear GA311 PCI Adapter.

I don't think they were defined as devices in the original DSDTs. I had to manually add them by hand. So I would say you don't have to do anything.
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On my system C4 seems to be directly connected to overclocking, if I have working C4 in dsdt then I can't even boot to OS X using anything higher than 8.5 * 375. Right now I have C4 commented out in dsdt and I am running at 8.5 * 450 with no problems. Nice Geekbench result : http://browse.geekbench.ca/geekbench2/view/202586

 

 

On my system C4 in dsdt (code from mm67) appears to be working with CPU over-clocked to 375; Vcore is 0.880.

 

rayap.tiff

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