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Tracing back the AMD GPU wakeup issue to its origin

Mieze

By Mieze,
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Gigamaxx
Gigamaxx
Posted
Posted

How is this a bad idea? Having a repo of different SSDT/DSDT settings for different types of AMD GPUs is exactly what is needed. The GPU section of both are generally the same.

I see his point if it includes CPU, Audio, Ethernet, WiFi or other fixes that are mobo or CPU dependent and for a specific user. But if they are only simple graphics, graphics audio, and or graphics Framebuffer related they should work for most systems, I would think. As long as they are listed for specific models of cards, and porting is specified if applicable they could help a lot of people out.

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Mork vom Ork
Mork vom Ork
Posted
Posted

To make things a little bit more clear for those of us, which are "non coders" in real live: take a look at "slice"s example SSDT:

 

 

 

/*
* Intel ACPI Component Architecture
* AML/ASL+ Disassembler version 20161210-64(RM)
* Copyright (c) 2000 - 2016 Intel Corporation
*
* Disassembling to non-symbolic legacy ASL operators
*
* Disassembly of iASLXjEc7P.aml, Thu Nov 9 19:20:22 2017
*
* Original Table Header:
* Signature "SSDT"
* Length 0x00000123 (291)
* Revision 0x02
* Checksum 0x24
* OEM ID "Apple"
* OEM Table ID "Radeon"
* OEM Revision 0x00003000 (12288)
* Compiler ID "INTL"
* Compiler Version 0x20170929 (538380585)
*/
DefinitionBlock ("", "SSDT", 2, "Apple", "Radeon", 0x00003000)
{
External (_SB_.PCI0.PEG0.PEGP, DeviceObj) // (from opcode)

Scope (\_SB.PCI0.PEG0.PEGP)
{
OperationRegion (PCIB, PCI_Config, Zero, 0x0100)
Field (PCIB, AnyAcc, NoLock, Preserve)
{
Offset (0x10),
BAR0, 32,
BAR1, 32,
BAR2, 64,
BAR4, 32,
BAR5, 32
}

Method (_INI, 0, NotSerialized) // _INI: Initialize
{
If (LEqual (BAR5, Zero))
{
Store (BAR2, Local0)
}
Else
{
Store (BAR5, Local0)
}

OperationRegion (GREG, SystemMemory, And (Local0, 0xFFFFFFFFFFFFFFF0), 0x8000)
Field (GREG, AnyAcc, NoLock, Preserve)
{
Offset (0x6800),
GENA, 32,
GCTL, 32,
LTBC, 32,
Offset (0x6810),
PSBL, 32,
SSBL, 32,
PTCH, 32,
PSBH, 32,
SSBH, 32,
Offset (0x6848),
FCTL, 32,
Offset (0x6EF8),
MUMD, 32
}

Store (Zero, FCTL)
Store (Zero, PSBH)
Store (Zero, SSBH)
Store (Zero, LTBC)
Store (One, GENA)
Store (Zero, MUMD)
}
}
}

 

 

 

Now take alook at this specific part of the code:

DefinitionBlock ("", "SSDT", 2, "Apple", "Radeon", 0x00003000)
{
    External (_SB_.PCI0.PEG0.PEGP, DeviceObj)    // (from opcode)

    Scope (\_SB.PCI0.PEG0.PEGP)
    {

This part is ALLWAYS DSDT-specific, cause you need to know, where in your DSDT your SSDT-related hardware needs to be injected.

 

For another example lets take a look at my RX580-realted SSDT:

DefinitionBlock ("", "SSDT", 2, "MvO_2", "PegSsdt", 0x00001000)
{
    External (_SB_.GGOV, MethodObj)    // 1 Arguments (from opcode)
    External (_SB_.ISME, MethodObj)    // 1 Arguments (from opcode)
    External (_SB_.PCI0, DeviceObj)    // (from opcode)
    External (_SB_.PCI0.PEG0, DeviceObj)    // (from opcode)
    External (_SB_.PCI0.PEG0.PEGP, DeviceObj)    // (from opcode)
    External (_SB_.PCI0.PEG1, DeviceObj)    // (from opcode)
    External (_SB_.PCI0.PEG1.PEGP, DeviceObj)    // (from opcode)
    External (_SB_.PCI0.PEG2, DeviceObj)    // (from opcode)
    External (_SB_.PCI0.PEG2.PEGP, DeviceObj)    // (from opcode)
.
.
.
.

    If (CondRefOf (\_SB.PCI0.PEG0.PEGP))
    {
        Scope (\_SB.PCI0.PEG0.PEGP)
        {
            Device (AMD0)
            {
                Name (_ADR, 0x00080000)  // _ADR: Address
                Device (GFX0)
                {
                   Name (_ADR, Zero)  // _ADR: Address

As you can see here, my GPU normally would be injected under "_SB.PCI0.PEG0.PEGP.pci-bridge@8.pci-bridge@0" which i have renamed to "_SB.PCI0.PEG0.PEGP.AMD0.GFX0".

And exactly THIS is always specific to the users DSDT.

 

What than follows, is only related to the users used GFX-Model and could be configured with specific values as part of the users used gfx-card.

And it is adviced to, after you know your correct path of your used gfx-card, to insert directly Miezes code first, so it would look like this:

        Scope (\_SB.PCI0.PEG0.PEGP)
        {
            Device (AMD0)
            {
                Name (_ADR, 0x00080000)  // _ADR: Address
                Device (GFX0)
                {
                    Name (_ADR, Zero)  // _ADR: Address
                    OperationRegion (PCIB, PCI_Config, Zero, 0x0100)
                    Field (PCIB, AnyAcc, NoLock, Preserve)
                    {
                        Offset (0x10), 
                        BAR0,   32, 
                        BAR1,   32, 
                        BAR2,   64, 
                        BAR4,   32, 
                        BAR5,   32
                    }

                    Method (_INI, 0, NotSerialized)  // _INI: Initialize
                    {
                        If (LEqual (BAR5, Zero))
                        {
                            Store (BAR2, Local0)
                        }
                        Else
                        {
                            Store (BAR5, Local0)
                        }

                        OperationRegion (GREG, SystemMemory, And (Local0, 0xFFFFFFFFFFFFFFF0), 0x8000)
                        Field (GREG, AnyAcc, NoLock, Preserve)
                        {
                            Offset (0x6800), 
                            GENA,   32, 
                            GCTL,   32, 
                            LTBC,   32, 
                            Offset (0x6810), 
                            PSBL,   32, 
                            SSBL,   32, 
                            PTCH,   32, 
                            PSBH,   32, 
                            SSBH,   32, 
                            Offset (0x6848), 
                            FCTL,   32, 
                            Offset (0x6EF8), 
                            MUMD,   32
                        }

                        Store (Zero, FCTL)
                        Store (Zero, PSBH)
                        Store (Zero, SSBH)
                        Store (Zero, LTBC)
                        Store (One, GENA)
                        Store (Zero, MUMD)
                    }

followed by your card-specific values like Device-ID, VendorID, Subsystem-ID, Slot-name, Model name, used Frambuffer etc. Example again:

Method (_DSM, 4, NotSerialized)  // _DSM: Device-Specific Method
                    {
                        Store (Package (0x06)
                            {
                                "@0,name", 
                                Buffer (0x0C)
                                {
                                    "ATY,Orinoco"
                                }, 

                                "AAPL,slot-name", 
                                Buffer (0x08)
                                {
                                    "PCIe #1"
                                }, 

                                "hda-gfx", 
                                Buffer (0x0A)
                                {
                                    "onboard-1"
                                }
                            }, Local0)
                        DTGP (Arg0, Arg1, Arg2, Arg3, RefOf (Local0))
                        Return (Local0)
                    }

So to stay with the example of MY specific implementation of MY specific RX480, the complete Code would look like this:

 /*
 * Intel ACPI Component Architecture
 * AML/ASL+ Disassembler version 20161210-64(RM)
 * Copyright (c) 2000 - 2016 Intel Corporation
 * 
 * Disassembling to non-symbolic legacy ASL operators
 *
 * Disassembly of iASLneKcV3.aml, Thu Nov  9 19:45:36 2017
 *
 * Original Table Header:
 *     Signature        "SSDT"
 *     Length           0x000026B7 (9911)
 *     Revision         0x02
 *     Checksum         0xD4
 *     OEM ID           "MvO_2"
 *     OEM Table ID     "PegSsdt"
 *     OEM Revision     0x00001000 (4096)
 *     Compiler ID      "INTL"
 *     Compiler Version 0x20161210 (538317328)
 */
DefinitionBlock ("", "SSDT", 2, "MvO_2", "PegSsdt", 0x00001000)
{
    External (_SB_.GGOV, MethodObj)    // 1 Arguments (from opcode)
    External (_SB_.ISME, MethodObj)    // 1 Arguments (from opcode)
    External (_SB_.PCI0, DeviceObj)    // (from opcode)
    External (_SB_.PCI0.PEG0, DeviceObj)    // (from opcode)
    External (_SB_.PCI0.PEG0.PEGP, DeviceObj)    // (from opcode)
    External (_SB_.PCI0.PEG1, DeviceObj)    // (from opcode)
    External (_SB_.PCI0.PEG1.PEGP, DeviceObj)    // (from opcode)
    External (_SB_.PCI0.PEG2, DeviceObj)    // (from opcode)
    External (_SB_.PCI0.PEG2.PEGP, DeviceObj)    // (from opcode)
    External (_SB_.SGOV, MethodObj)    // 2 Arguments (from opcode)
    External (_SB_.SHPO, MethodObj)    // 2 Arguments (from opcode)

   If (CondRefOf (\_SB.PCI0.PEG0.PEGP))
    {
        Scope (\_SB.PCI0.PEG0.PEGP)
        {
            Device (AMD0)
            {
                Name (_ADR, 0x00080000)  // _ADR: Address
                Device (GFX0)
                {
                    Name (_ADR, Zero)  // _ADR: Address
                    OperationRegion (PCIB, PCI_Config, Zero, 0x0100) // <--- from here...
                    Field (PCIB, AnyAcc, NoLock, Preserve)
                    {
                        Offset (0x10), 
                        BAR0,   32, 
                        BAR1,   32, 
                        BAR2,   64, 
                        BAR4,   32, 
                        BAR5,   32
                    }

                    Method (_INI, 0, NotSerialized)  // _INI: Initialize
                    {
                        If (LEqual (BAR5, Zero))
                        {
                            Store (BAR2, Local0)
                        }
                        Else
                        {
                            Store (BAR5, Local0)
                        }

                        OperationRegion (GREG, SystemMemory, And (Local0, 0xFFFFFFFFFFFFFFF0), 0x8000)
                        Field (GREG, AnyAcc, NoLock, Preserve)
                        {
                            Offset (0x6800), 
                            GENA,   32, 
                            GCTL,   32, 
                            LTBC,   32, 
                            Offset (0x6810), 
                            PSBL,   32, 
                            SSBL,   32, 
                            PTCH,   32, 
                            PSBH,   32, 
                            SSBH,   32, 
                            Offset (0x6848), 
                            FCTL,   32, 
                            Offset (0x6EF8), 
                            MUMD,   32
                        }

                        Store (Zero, FCTL)
                        Store (Zero, PSBH)
                        Store (Zero, SSBH)
                        Store (Zero, LTBC)
                        Store (One, GENA)
                        Store (Zero, MUMD)
                    } // <--- to here is MIEZEs code to get it work w/o LILU and WhatEverGreen

                    Method (_DSM, 4, NotSerialized)  // _DSM: Device-Specific Method  // <--- from here...
                    {
                        Store (Package (0x06)
                            {
                                "@0,name", 
                                Buffer (0x0C)
                                {
                                    "ATY,Orinoco"
                                }, 

                                "AAPL,slot-name", 
                                Buffer (0x08)
                                {
                                    "PCIe #1"
                                }, 

                                "hda-gfx", 
                                Buffer (0x0A)
                                {
                                    "onboard-1"
                                }
                            }, Local0)
                        DTGP (Arg0, Arg1, Arg2, Arg3, RefOf (Local0))
                        Return (Local0)
                    }
                }

                Device (HDAU)
                {
                    Name (_ADR, One)  // _ADR: Address
                    Method (_DSM, 4, NotSerialized)  // _DSM: Device-Specific Method
                    {
                        If (LEqual (Arg2, Zero))
                        {
                            Return (Buffer (One)
                            {
                                 0x03                                           
                            })
                        }

                        Return (Package (0x04)
                        {
                            "layout-id", 
                            Buffer (0x04)
                            {
                                 0x01, 0x00, 0x00, 0x00                         
                            }, 

                            "hda-gfx", 
                            Buffer (0x0A)
                            {
                                "onboard-1"
                            }
                        })
                    }
                }
            } // <--- to here your specific GFX-Card values to be used

            Method (DTGP, 5, NotSerialized)
            {
                If (LEqual (Arg0, ToUUID ("a0b5b7c6-1318-441c-b0c9-fe695eaf949b")))
                {
                    If (LEqual (Arg1, One))
                    {
                        If (LEqual (Arg2, Zero))
                        {
                            Store (Buffer (One)
                                {
                                     0x03                                           
                                }, Arg4)
                            Return (One)
                        }

                        If (LEqual (Arg2, One))
                        {
                            Return (One)
                        }
                    }
                }

                Store (Buffer (One)
                    {
                         0x00                                           
                    }, Arg4)
                Return (Zero)
            }

            Name (LTRE, Zero)
            OperationRegion (PCIS, PCI_Config, Zero, 0x0100)
            Field (PCIS, AnyAcc, NoLock, Preserve)
            {
                PVID,   16, 
                PDID,   16
            }

            Method (_PRW, 0, NotSerialized)  // _PRW: Power Resources for Wake
            {
                Return (GPRW (0x69, 0x04))
            }
        }
    }
}
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Mork vom Ork
Mork vom Ork
Posted
Posted

I included this patch in Clover 4296 so you need no more patch DSDT or separate SSDT.

See explanation here    #87   

Could confirm it working.

Just tick "inject ATI = true" and "RadeonDeInit = true" makes my Sapphire RX480 NITRO work as when using selfmade SSDT for it. Thank you SLICE.

BUT: i still need my SSDT for working HDMI-audio. but if you only need to make your RADEON work, you could use this method.

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Slice
Slice
Posted
Posted

it's mean we don't need SSDT-AMD.aml anymore?

 

@Pabloesc

I'm using this patched for my HD 7790: 

48442038 787878 to 48442037 373930

but why still shown HD 8xxx ?

 

thanks for advanced

 

hi slice..thank you for your great work....this method is much easier than ssdt-amd.aml...but it can display the correct amd card model?? thanks

 

This is only trick against wake into black screen.

But those  recommendations      [HOW TO] Make Radeon {Desktop or Mobility} be working by using Clover     are still on the march.

 

I will think about the model name. If you don't use Inject->ATI=YES then the model chosen automatically.

There is a trick to rename HD6xxx -> "your name" 

			<dict>
				<key>Comment</key>
				<string>ATI name HD xxxx - HD6450</string>
				<key>Disabled</key>
				<false/>
				<key>Find</key>
				<data>
				SEQgNnh4eA==
				</data>
				<key>MatchOS</key>
				<string>10.12,10.13</string>
				<key>Name</key>
				<string>AMD6000Controller</string>
				<key>Replace</key>
				<data>
				SEQgNjQ1MA==
				</data>
			</dict>

But it is not  easy to reproduce.

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Slice
Slice
Posted
Posted

tested on RX480, working great except HDMI audio. Can CLOVER fix this too in feature update? Or we need to use SSDT for audio over HDMI?

No problem to use SSDT with this new trick.

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Picasso
Picasso
Posted
Posted

Not working Amd 390X Asus Strix, tried al combination possible in Bios and Ati Inject Yes and No. 

 

- Connectors problem?

- If someone wants to cooperate and need a compiled Darwin or sth like that just tell me and I will add the file.

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Gigamaxx
Gigamaxx
Posted
Posted

Not working Amd 390X Asus Strix, tried al combination possible in Bios and Ati Inject Yes and No. 

 

- Connectors problem?

- If someone wants to cooperate and need a compiled Darwin or sth like that just tell me and I will add the file.

Does it have the 9300controllerkext ID 0x73001002? They dedicated a whole controllerkext but there is no matching ID in the accelerator kexts. If Apple assigned a whole controllerkext to that card only hopefully they are going to add a 5150kext or something just for that card very soon. We tried adding the ID to the 5000kexts, the 4150, 4250, 4000 etc. nothing takes.

@mork nice explanation, I'm just wondering how to inject a custom SSDT for GPU? what I did so far is copy and replace the code in DSDT.aml generated by clover and saved it into /EFI/acpi/patched...

 

but what to do with the SSDT-AMD.aml. How would you inject just this file? Does clover automatically scan the ACPI/patched folder or?

Slice added it to clover 4296 so it’s automatic if selected in options, before we were adding the SSDZt to Clover ACPI/Pathced folder.

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Gigamaxx
Gigamaxx
Posted
Posted

@Gigamaxx

I don´t understand what are you saying.

If I have to force a kext, or you know the apple devs and you are waiting for an Id.

 

I think 390x is the same as 290x, and maybe is to add something into the ssdt.

I tried to help someone with their Fury card with ID 0x73001002.    Is this the same card you have with HBM memory?    There is a AMD9300Controllerkext with only 0x73001002 ID  and no other IDs in that kext.   However no matter which accelerator kext we used ie.. AMD5000kext, AMD4250kext, AMD4150kext, AMD4000kext by adding an ID 0x73001002 to info.plist the card never worked.    I noticed that the AMD5000kext has Vega IDs and also there is one more Kext with the IDs in the info.plist.    So the Vega branch of graphics drivers contain 3 kexts with the Vega device IDs.    Most OSX graphics supported cards (AMD) use only 2 kexts.     If the Fury card 0x73001002 is to work with the AMD5000kext then you have to add the 0x73001002 to 2 kexts in the 5000 bundle.   The AMDX5000HWServiceskext.    You could try to add that ID to both the AMD5000kext and the HWServiceskext to see if the AMD9300Controllerkext will link with it.   The user I tried to assist may not have added the info.plist edits correctly so it may work.   It may be worth trying, but if you have that card ID you cannot currently use the card because the ID is missing from the existing kexts.  I think they will add a AMD5150kext or something similar like the did with Polaris cards in Sierra.    In Sierra we were able to use Polaris cards by adding these IDs in the various kexts.

post-1753549-0-35946400-1510419483_thumb.png

post-1753549-0-48335100-1510419698_thumb.png

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Gigamaxx
Gigamaxx
Posted
Posted

@Gigamaxx

 

Amd 390X/290X

 

DeviceID 0x67B11002

AMD8000Controller and AMDX4000

Hawaii

Baladi framebuffer

 

Sorry, I thought it was fury card.    Did you check for IDs in the 4000kext?

@Gigamaxx

 

Amd 390X/290X

 

DeviceID 0x67B11002

AMD8000Controller and AMDX4000

Hawaii

Baladi framebuffer?    Here are edited kexts, save extra originals, install these and then use kext wizard before reboot.

 

Try these edited kexts for 0x67B11002 use kext wizard before reboot.

AMD 0x67B11002 kexts.zip

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Tusskan
Tusskan
Posted
Posted

Sorry, I thought it was fury card.    Did you check for IDs in the 4000kext?

 

 

Try these edited kexts for 0x67B11002 use kext wizard before reboot.

 

@Gigamaxx

 

Amd 390X/290X

 

DeviceID 0x67B11002

AMD8000Controller and AMDX4000

Hawaii

Baladi framebuffer

 

 

Sorry, I thought it was fury card.    Did you check for IDs in the 4000kext?

 

 

Try these edited kexts for 0x67B11002 use kext wizard before reboot.

 

DeviceID 0x67B11002

 

That's the Device ID for R9 290 non X

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MattsCreative
MattsCreative
Posted
Posted

For the 290X proper naming patch it's 

AMD8000Controller

Find: 414d4420 52616465 6f6e2048 44203878 7878

replace: 41 4d 44 20 52 61 64 65 6f 6e 20 52 39 20 32 39 30 58

 

For 390x replace: 41 4d 44 20 52 61 64 65 6f 6e 20 52 39 20 33 39 30 58

 

if you want 490x for kicks well Replace : 41 4d 44 20 52 61 64 65 6f 6e 20 52 39 20 34 39 30 58

 

for newest 10.13.2 beta find:414d4420 52616465 6f6e2048 44203878 7878 

replace: 41 4d 44 20 52 61 64 65 6f 6e 20 52 39 20 32 39 30 58

Clover Patch Works Thanks 

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Cyberdevs
Cyberdevs
Posted
Posted

For the 290X proper naming patch it's 

AMD8000Controller

Find: 414d4420 52616465 6f6e2048 44203878 7878

replace: 41 4d 44 20 52 61 64 65 6f 6e 20 52 39 20 32 39 30 58

 

Clover Patch Works Thanks 

Did you test the SSDT? Does it work?

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