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DSDT - Vanilla Speedstep - Generic Scope (_PR)


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#501
FKA

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Also very interesting kdawg -

Thanks both for the food for thought !


OK - I have ran various tests last night.

Setting all voltages to AUTO in BIOS with CPU clocked/ unclocked. And with varying formats of Scope (PR) in DSDT - being:

- With my origional cst and ist additions to DSDT,
- With my copy of M Chief's Scope (_PR ) section of DSDT from his v2.8 (with and without Legacy SMC and AGPM kexts.)
- With my adaptation of mm67's Scope (PR) with and without Legacy AGPM and SMC
- Copying the format MC has created for Matthew L ( I did not expect this to work. No offence Mathew but we have differant MB's which will have different memory addresses for CPUPM and I still don't know where MC got this value from > OperationRegion (PMBL, SystemMemory, 0x7FEE85A0, 0x03AB) )

CPU Clocked with voltages in AUTO i get some hidious temperature (around 68+ .C @ idle)
this happens with all the above DSDT variants.

Unclocked with voltages in AUTO i get 42.C @ idle with all DSDT variants

Clocked (420 x 8 ) with voltages set (vCore 1.25v) - i get 43.C @ idle with all DSDT variants

There is no evidence with any scenario that my CPU enters a state more idle than my lowest p-state multi (C1 or C2).

Conclusion - there is clearly more than one way to skin a cat! :)

#502
Master Chief

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...
I still don't know where MC got this value from > OperationRegion (PMBL, SystemMemory, 0x7FEE85A0, 0x03AB) )

Hello? I of course got this value from MatthewL who I presume either used Everest on Windows or used a Linux ACPIdump to get this address... which you should do also :(

#503
Matthew L.

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Hello? I of course got this value from MatthewL who I presume either used Everest on Windows or used a Linux ACPIdump to get this address... which you should do also :D


Exactly.

For example, in everest: right clicky on the bottom of the everest window, select ACPI tool, then in the window that opened click save table, then check which SSDT table is the CpuPm table, then use its hex address, which is written on the button after SSDT (in the save table menu), this will be your address, and get the length either by checking the dumped SSDT CpuPm table's BIN's size in bytes or decompile it then read it from the top of the decompiled table (dsl), it's in the Original Table Header section.

Good luck!

P.S: Master Chief, how frequently should states change? Isn't it harmful to the CPU if voltages change too often?

#504
FKA

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Exactly.

For example, in everest: right clicky on the bottom of the everest window, select ACPI tool, then in the window that opened click save table, then check which SSDT table is the CpuPm table, then use its hex address, which is written on the button after SSDT (in the save table menu), this will be your address, and get the length either by checking the dumped SSDT CpuPm table's BIN's size in bytes or decompile it then read it from the top of the decompiled table (dsl), it's in the Original Table Header section.

Good luck!

P.S: Master Chief, how frequently should states change? Isn't it harmful to the CPU if voltages change too often?


I'll try it later and report :D

#505
Matthew L.

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I'll try it later and report :D


Okay, and if you couldn't understand something what I've said, just send a PM or write in the thread, my english may be bad, but I will help you understand what I say. :star_smile: (Even with some screenshots, if you need 'em.)

#506
FKA

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Okay, and if you couldn't understand something what I've said, just send a PM or write in the thread, my english may be bad, but I will help you understand what I say. :D (Even with some screenshots, if you need 'em.)


no thats cool I've already got the lenght [ * Length 0x000003AB (939) ] -
I didn't know you could find the table address with everest like this.

Cheers
D.

#507
Master Chief

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<snip />

P.S: Master Chief, how frequently should states change? Isn't it harmful to the CPU if voltages change too often?

No, but make sure you don't over power it. At least not when there's no need for it (without OC). That is far more important for the CPU's lifespan.

#508
jinnggoff

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Many thanks Master Chief your new method is better :)
Finally I can see my cpu voltages are up and down by msr tool :)
And for voltages value can work, I used cpuz.exe for see voltage and cpu speed when idle or when full task. And calculated by P-stated Calculator for Pss code
Here is my dsdt
Attached File  dsdt.dsl.zip   12.5KB   37 downloads

#509
FKA

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no thats cool I've already got the lenght [ * Length 0x000003AB (939) ] -
I didn't know you could find the table address with everest like this.

Cheers
D.


reet !

using this Scope (PR) as per Matthew L's
Scope (_PR)    {        Processor (CPU0, 0x00, 0x00000410, 0x06)        {            OperationRegion (PMBL, SystemMemory, 0xDFEE87E0, 0x03AB)             Name (PDC0, 0x80000000)             Name (HNDL, 0x80000000)             Name (TBLD, 0x00000080)             Method (_INI, 0, NotSerialized)             {                If (LNot (And (TBLD, One)))                {                    Or (TBLD, One, TBLD)                    Load (PMBL, HNDL)                }            }            Name (_PSS, Package (0x03)            {                Package (0x06)                {                    0x0D20,                     0x000124F8,                     0x0A,                     0x0A,                     0x0820,                     0x0820                },                 Package (0x06)                {                    0x0B7C,                     0xFDE8,                     0x0A,                     0x0A,                     0x071C,                     0x071C                },                 Package (0x06)                {                    0x09D8,                     0xEA60,                     0x0A,                     0x0A,                     0x061A,                     0x061A                }            })            Method (_CST, 0, NotSerialized)             {                If (And (PDC0, 0x18))                 {                     Return (\_PR.CPU1._CST())                 }                Else                {                    Return (Package (0x02)                    {                        One,                         Package (0x04)                        {                            ResourceTemplate ()                            {                                Register (FFixedHW,                                 0x00,               // Bit Width                                0x00,               // Bit Offset                                0x0000000000000000, // Address                                ,)                            },                             One,                             0x9D,                             0x03E8                         }                    })                }            }        }        Processor (CPU1, 0x01, 0x00000410, 0x06)        {            Method (_CST, 0, NotSerialized)             {                    Return (Package (0x04)                    {                        0x03,                         Package (0x04)                        {                            ResourceTemplate ()                            {                                Register (FFixedHW,                                     0x01,               // Bit Width                                    0x02,               // Bit Offset                                    0x0000000000000000, // Address                                    0x01,               // Access Size                                    )                            },                            One,                             One,                             0x03E8                        },                         Package (0x04)                        {                            ResourceTemplate ()                            {                                Register (SystemIO,                                     0x08,               // Bit Width                                    0x00,               // Bit Offset                                    0x0000000000000814, // Address                                    ,)                            },                            0x02,                            One,                            0x01F4                        },                         Package (0x04)                        {                            ResourceTemplate ()                            {                                Register (SystemIO,                                     0x08,               // Bit Width                                    0x00,               // Bit Offset                                    0x0000000000000815, // Address                                    ,)                            },                            0x03,                            0x11,                            0xFA                        }                    })            }        }        Processor (CPU2, 0x02, 0x00000410, 0x06)        {            Method (_CST, 0, NotSerialized)            {                Return (\_PR.CPU1._CST())            }        }        Processor (CPU3, 0x03, 0x00000410, 0x06)        {            Method (_CST, 0, NotSerialized)            {                Return (\_PR.CPU1._CST())            }        }    }

I get exactly the same the same result, not too surprising, especially as my previous incarnation of MC's v2.8 DSDT called to each of my ist tables (i have no native cst.) and this incarnation just calls to the CPUPM as a whole ! - Via Roma !

Attached File  Screen_shot_2009_10_19_at_21.23.53.png   27.18KB   91 downloads

In Windows7 Everest states only C1 is available to me. With the level my CPU is OC'd I think this is the best idle temp I can expect.

I'm done with this -

I'll have a pop at SBUS. Can anybody tell me what's been achieved so far by adding SBUS to DSDT?

I see reports on the P5K Pro thread that adding this data has apparently reduced system performance (according to geek bench.)??

D.

#510
Matthew L.

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No, but make sure you don't over power it. At least not when there's no need for it (without OC). That is far more important for the CPU's lifespan.


Hmm, okay, thanks, but isn't it strange that the multiplier sits at it's lowest (and sometimes a click higher then falling back again), then in the meantime voltages go from the highest state's to the 2nd lowest and the lowest, and all these in 1 freakin' second? (Sorry for being a jerk, but I'm afraid of having to buy a CPU...they are quite expensive here.)

(...) In Windows7 Everest states only C1 is available to me. With the level my CPU is OC'd I think this is the best idle temp I can expect. (...)

D.


In Windows I think this is the case everywhere, I have speedstepping like this with my rig, too. (Only 2 states.)
About the temps, are you using some badass cooler that you're expecting lower temperatures? Because if not, and you are using the stock intel cooler noisemaker, IMO they are pretty good! And what about correct TJMax values?

#511
FKA

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In Windows I think this is the case everywhere, I have speedstepping like this with my rig, too. (Only 2 states.)
About the temps, are you using some badass cooler that you're expecting lower temperatures? Because if not, and you are using the stock intel cooler noisemaker, IMO they are pretty good! And what about correct TJMax values?


I have a middle of the road Akasa
http://www.overclock...rodid=HS-066-AK

TJMax 71.4 @ 95W

D.

#512
Master Chief

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Have you tried the stock speed/voltage settings? Mid 30's then?

With SBUS/EC your hack gets closer to a real Mac, and it won't load all CPU kexts anymore. Certain hacks can also be removed, but there's more good news to come in the near future.

#513
FKA

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Have you tried the stock speed/voltage settings? Mid 30's then?


I have, it's still around 40.C +
I'm running @ stock voltage (1.25v) OC'd @ 420 x 8

Running GigaByte 'Dynamic Energy Saver' SW and setting power management in Windows 7 to lowest possible, it also idles at 40.C +

My biggest 'noise' ATM is my PSU, fans running at 2500rpm constantly under Windows and OS X.
It's only 450W and as the beast has grown (adding HDD's etc .. ) I think I'd be advised to upgrade to a quieter more powerful PSU.

With SBUS/EC your hack gets closer to a real Mac, and it won't load all CPU kexts anymore. Certain hacks can also be removed, but there's more good news to come in the near future.


I look forward to it :blink:
D.

#514
Master Chief

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I have, it's still around 40.C +
I'm running @ stock voltage (1.25v) OC'd @ 420 x 8

Running GigaByte 'Dynamic Energy Saver' SW and setting power management in Windows 7 to lowest possible, it also idles at 40.C +

My biggest 'noise' ATM is my PSU, fans running at 2500rpm constantly under Windows and OS X.
It's only 450W and as the beast has grown (adding HDD's etc .. ) I think I'd be advised to upgrade to a quieter more powerful PSU.

Either that or disconnect power hungry hardware. Also, even the best PSU gets instable when hammered too much for too long, but it might be as simple as a bad cable/connection or a broken FAN (dust can change fan resistance).

#515
Matthew L.

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My biggest 'noise' ATM is my PSU, fans running at 2500rpm constantly under Windows and OS X.
It's only 450W and as the beast has grown (adding HDD's etc .. ) I think I'd be advised to upgrade to a quieter more powerful PSU.

D.


Let me add a bit of off-topic: I was suffering from my PSU, too, but about a month ago I've bought an Enermax Modu82+, and it's dead silent!

BTW, think about it, if you run a stress test on your PC (which of course gets you a situation which never ever happens in real usage), it shouldn't be using more wattage than 200, so any good 400-425-450W PSU should be enough for you. (Considering the Q9450's 95W TDP and the 9500GT's 50W TDP.) If you plan upgrading (to 2 5870X2's and an i7 965 - or equivalient in terms of power consumption), or the PC in question is not the one you've provided in your signature, then just forget everything I've said in this post.

#516
FKA

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Either that or disconnect power hungry hardware. Also, even the best PSU gets instable when hammered too much for too long, but it might be as simple as a bad cable/connection or a broken FAN (dust can change fan resistance).


To be honest the PSU has been handed down from a previous build and is well overdue a replacement, you really shouldn't scrimp on these things!
Dust - I always have a trusty can of air duster - I'm a tidy sod + an engineer, just not software ;)

, or the PC in question is not the one you've provided in your signature, then just forget everything I've said in this post.


It is the PC in question :)

anywho's enough OT ...

#517
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Native speedstepping (8 p-states and 37 degrees idle temp) with Core 2 Duo E8500 using Master Chief's method from the P5K Pro thread.

Scope (_PR)    {        Name (NCPU, 0x02)        Name (CFGD, 0x0020BCF2)        Processor (CPU0, 0x01, 0x00000810, 0x06)        {            OperationRegion (STBL, SystemMemory, 0x7FF7E0D0, 0x0277)            Name (TYPE, 0x80000000)            Name (HNDL, 0x80000000)            Name (TBLD, 0x80)            Method (_PDC, 1, NotSerialized)            {                Store (SizeOf (Arg0), Local0)                Store (Subtract (Local0, 0x08), Local1)                CreateField (Arg0, 0x40, Multiply (Local1, 0x08), TEMP)                Concatenate (Buffer (0x04)                    {                        0x00, 0x00, 0x00, 0x00                    }, TEMP, Local2)                _OSC (Buffer (Zero) {}, One, Zero, Local2)            }            Method (_OSC, 4, NotSerialized)            {                CreateDWordField (Arg3, 0x04, CAP0)                Or (And (TYPE, 0x7FFFFFFF), CAP0, TYPE)                If (LAnd (LEqual (And (TYPE, 0x09), 0x09), LNot (And (                    TBLD, One))))                {                    Or (TBLD, One, TBLD)                    Load (STBL, HNDL)                }                Return (Arg3)            }            Name (_PSS, Package (0x08)            {                Package (0x06)                {                    0x0C5E,                     0x40,                     0x0A,                     0x0A,                     0x04922,                     0x04922                },                 Package (0x06)                {                    0x0BB5,                     0x3B,                     0x0A,                     0x0A,                     0x0920,                     0x0920                },                 Package (0x06)                {                    0x0B0F,                     0x37,                     0x0A,                     0x0A,                     0x0481F,                     0x0481F                },                 Package (0x06)                {                    0x0A68,                     0x32,                     0x0A,                     0x0A,                     0x081D,                     0x081D                },                 Package (0x06)                {                    0x09C2,                     0x2E,                     0x0A,                     0x0A,                     0x0471C,                     0x0471C                },                 Package (0x06)                {                    0x091B,                     0x2A,                     0x0A,                     0x0A,                     0x071A,                     0x071A                },                 Package (0x06)                {                    0x0875,                     0x26,                     0x0A,                     0x0A,                     0x04618,                     0x04618                },                 Package (0x06)                {                    0x07CE,                     0x22,                     0x0A,                     0x0A,                     0x0616,                     0x0616                }            })            Method (_CST, 0, NotSerialized)            {                If (And (TYPE, 0x18))                {                    Return (^^CPU1._CST ())                }                Else                {                    Return (Package (0x02)                    {                        One,                         Package (0x04)                        {                            ResourceTemplate ()                            {                                Register (FFixedHW,                                     0x00,               // Bit Width                                    0x00,               // Bit Offset                                    0x0000000000000000, // Address                                    ,)                            },                             One,                             0x9D,                             0x03E8                        }                    })                }            }        }        Processor (CPU1, 0x02, 0x00000810, 0x06)        {            OperationRegion (STBL, SystemMemory, 0x7FF7E350, 0x0277)            Name (TYPE, 0x80000000)            Name (HNDL, 0x80000000)            Name (TBLD, 0x80)            Method (_PDC, 1, NotSerialized)            {                Store (SizeOf (Arg0), Local0)                Store (Subtract (Local0, 0x08), Local1)                CreateField (Arg0, 0x40, Multiply (Local1, 0x08), TEMP)                Concatenate (Buffer (0x04)                    {                        0x00, 0x00, 0x00, 0x00                    }, TEMP, Local2)                _OSC (Buffer (Zero) {}, One, Zero, Local2)            }            Method (_OSC, 4, NotSerialized)            {                CreateDWordField (Arg3, 0x04, CAP1)                Or (And (TYPE, 0x7FFFFFFF), CAP1, TYPE)                If (LAnd (LEqual (And (TYPE, 0x09), 0x09), LNot (And (                    TBLD, One))))                {                    Or (TBLD, 0x03, TBLD)                    Load (STBL, HNDL)                }                Return (Arg3)            }            Method (_CST, 0, NotSerialized)            {                Return (Package (0x04)                {                    0x03,                     Package (0x04)                    {                        ResourceTemplate ()                        {                            Register (FFixedHW,                                 0x01,               // Bit Width                                0x02,               // Bit Offset                                0x0000000000000000, // Address                                0x01,               // Access Size                                )                        },                         One,                         One,                         0x03E8                    },                     Package (0x04)                    {                        ResourceTemplate ()                        {                            Register (SystemIO,                                 0x08,               // Bit Width                                0x00,               // Bit Offset                                0x0000000000000814, // Address                                ,)                        },                         0x02,                         One,                         0x01F4                    },                     Package (0x04)                    {                        ResourceTemplate ()                        {                            Register (SystemIO,                                 0x08,               // Bit Width                                0x00,               // Bit Offset                                0x0000000000000815, // Address                                ,)                        },                         0x03,                         0x11,                         0xFA                    }                })            }        }    }

I think I may be missing a Method (_CST, 0, NotSerialized) and Return (\_PR.CPU1._CST()) at the end here, not sure where to put it and got compiling errors trying, so in the end I just removed it!

The memory locations were taken from the full ACPI dump I posted earlier:
http://www.insanelym...p...t&p=1258828

And at the end:

Alias (\_PR.CPU0.TYPE, PDC0)    Alias (\_PR.CPU1.TYPE, PDC1)    Method (PNOT, 0, Serialized)    {        If (And (PDC0, 0x08))        {            Notify (\_PR.CPU0, 0x80)            If (And (PDC0, 0x18))            {                Sleep (0x64)                Notify (\_PR.CPU0, 0x81)            }        }        If (MPEN)        {            If (And (PDC1, 0x08))            {                Notify (\_PR.CPU1, 0x80)                If (And (PDC1, 0x18))                {                    Sleep (0x64)                    Notify (\_PR.CPU1, 0x81)                }            }        }    }}

Here's the whole DSDT, it has most of the modifications and fixes (EC, SBUS, FWHD, many devices removed and renamed) from Master Chief's P5K Pro DSDT thread.

If you're going to use this DSDT on a system with PS2 keyboard and/or mouse, you'll have to add those devices back in!

[attachment removed, see link at the bottom]

See here for more info (and DSDT with older Speedstepping code)
http://www.insanelym...p...1631&st=454
http://www.insanelym...p...88292&st=10

/EDIT..lol

Help, what have I done!!

Unlike my previous method, this is not working right.. VoodooMonitor shows all 8 p-states, shows the CPU running at the lowest and jumping to the highest on load - voltage never changes though! And in MSRTools it just keeps jumping back and forth between 3.09 and 3.17GHz.
And what's with the Multipliers in MSRTools...??
Attached File  MSR_Voodoo.png   65.47KB   77 downloads
On the flipside, enabling manual throttle in VoodooMonitor registers in MSRTools and when throttling a 1084p video I had running started breaking up, so at least throttle is 100% working.

/EDIT....*cries*

Went back to my previous method and it's doing exactly the same, it was never working!

Then I tried ripping out everything - Manual throttling still worked, VoodooMonitor still showed 8 P-states and CPU ran at full speed.

I also tried completely removing the P-States, and only adding the four P-States from my ACPI dump. Same result, VoodooMonitor shows the same 8 P-states regardless.

/EDIT 01/11 - fixed using Master Chief's latest CPU scope (edited for 2 cores) and PNOT. DSDT attached here:
http://www.insanelym...p;#entry1299409

#518
likefeel

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HOW TO MOD P5QL PRO

Learning and Thank!

#519
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Read the whole thread.

1. Make sure ACPI 2.0 and all CPU features (except CPUID Limit) are enabled in the BIOS
2. Extract your ACPI tables using a Linux Live CD or Everest Corporate Edition under Windows
3. Make sure AppleLPC.kext is loaded
4. Insert the relevant data in the DSDT you use on your Hackintosh.

Detailed instructions for all the above steps are available in this thread and the links given in it.

Additional reading material:
http://www.insanelym...p...t&p=1280888
http://www.insanelym...showtopic=19251

#520
ffbadkill

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After the modification, I cannot compile it

NPSS is not found which is needed but all SSDT do not have it

I cannot simply use SPSS as NPSS
Although CPU-I can detect all p-state, the cpu still run at full speed ^_^

Who can help me :wub:

Sorry for using .txt format :(

Attached Files

  • Attached File  dsdt.zip   17.14KB   4 downloads






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