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DSDT - Vanilla Speedstep - Generic Scope (_PR)


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#461
Beerkex'd

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Another TV show/movie down the drain? Fun hacking isn't it?


I prefer spelunking in the DSDT tables to watching TV any day. There's a limit to how many times I can watch Van Helsing and re-runs of House.

I want to ask you about the Firmware hub device you've added. My DSDT already has this device (two of them) but I don't know if it's actually doing anything as far as OS X is concerned. Both appear in ioreg but with nothing showing but IODeviceMemory and Name (INT0800 and PNP0C02).
Here is the whole section, the two devices are not referenced anywhere else in the DSDT:

Device (FWH)
				{
					Name (_HID, EisaId ("INT0800"))
					Name (CRS, ResourceTemplate ()
					{
						Memory32Fixed (ReadOnly,
							0x00000000,		 // Address Base
							0x00000000,		 // Address Length
							_Y0B)
						Memory32Fixed (ReadOnly,
							0x00000000,		 // Address Base
							0x00000000,		 // Address Length
							_Y0C)
					})
					CreateDWordField (CRS, \_SB.PCI0.LPCB.FWH._Y0B._BAS, BS00)
					CreateDWordField (CRS, \_SB.PCI0.LPCB.FWH._Y0B._LEN, BL00)
					CreateDWordField (CRS, \_SB.PCI0.LPCB.FWH._Y0C._BAS, BS10)
					CreateDWordField (CRS, \_SB.PCI0.LPCB.FWH._Y0C._LEN, BL10)
					Method (_CRS, 0, NotSerialized)
					{
						Store (0xFF800000, Local0)
						FindSetRightBit (FHD0, Local1)
						Decrement (Local1)
						If (Local1)
						{
							Multiply (Local1, 0x00080000, Local1)
						}

						Add (Local0, Local1, Local2)
						Store (Local2, BS00)
						Add (BS00, 0x00400000, BS10)
						Subtract (Zero, BS10, BL00)
						Store (BL00, BL10)
						Return (CRS)
					}
				}

				Device (FWHE)
				{
					Name (_HID, EisaId ("PNP0C02"))
					Name (_UID, 0x03)
					Name (CRS, ResourceTemplate ()
					{
						Memory32Fixed (ReadOnly,
							0x00000000,		 // Address Base
							0x00000000,		 // Address Length
							_Y0D)
					})
					Method (_CRS, 0, NotSerialized)
					{
						CreateDWordField (CRS, \_SB.PCI0.LPCB.FWHE._Y0D._BAS, BS00)
						CreateDWordField (CRS, \_SB.PCI0.LPCB.FWHE._Y0D._LEN, BL00)
						If (LEqual (^^FWH.BS00, Zero))
						{
							^^FWH._CRS ()
						}

						Add (^^FWH.BS00, ^^FWH.BL00, BS00)
						Subtract (^^FWH.BS10, BS00, BL00)
						Return (CRS)
					}
				}

				OperationRegion (FHR0, PCI_Config, 0xD8, 0x02)
				Field (FHR0, ByteAcc, NoLock, Preserve)
				{
					FHD1,   4, 
							Offset (0x01), 
					FHD0,   8
				}

Can I do anything with this?
(sorry about the non-specific question :D )

#462
xopher

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You're welcome. And have a look at post #456 for the link to the P5K PRO Snow Leopard thread, where you'll find the latest DSDT patches (see post #3 there). And yes other people can use that info too!

p.s. I just got my hack to restart without OpenHaltRestart.kext; I found the keyboard command port on the Embedded Controller... stored 0xfe in it and boom. Hello warm boot! Now I have to find a way to get it going without pointing shutdown to it. I guess that this was just the easy part but fun it is :(


I read through the whole thread, and downloaded your DSDT v2.8. The whole layout of it is different from mine it seems :angel: Could you be a bit more specific in what needs work in my DSDT? The layout too, to optimize things, or just add fixes/delete obsolete things? By the way, if I remove eg. FDC, the device, how much do I remove - all the way to the next device, or just to the Method right below?

Hope I don't sound too ignorant, but I want to learn to be able to teach! There's a thread similar to the P5K PRO, for the ep45-ud3r, and I'm hoping we'll get some kind of 'universal' DSDT done for this board as well.

*bowing humbly, sipping ice cold coke at the same time*

Edit: This is totally offtopic, but I was wondering, could we get iStat menus to recognize the cpu-temperature by editing the DSDT?

#463
iSoprano

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I wanted to share with you guys my dilemma...I have 2 different set of DSDT's which gives me speedsteeping for my GA-EP35-DS3L board.
The first DSDT gives me low temp speedstep in the range of 35C but I lose sleep. Also I've the CST info in IO Register.



The Second DSDT gives me high temp speedstep in the range of 45C and I have sleep but there is no CST info in IO Register.

Both the DSDT's have different CST and PCT info. I haven't taken these from my board but have copied from this forum. I know wrong values would have fried my CPU or MB but no guts no glory.

My question now is obviously I would like to keep low temp speedstep but how do i make sleep work? could anyone please help me out here.

Appreciate any help.

cheers

p.s. i uploaded the file in aml extension in hurry...sorry I am using PC so unable to upload in dsl format

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#464
Master Chief

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I prefer spelunking in the DSDT tables to watching TV any day. There's a limit to how many times I can watch Van Helsing and re-runs of House.

Great. Me likes House but I'm not a fan of horror. LOL I have enough horror working on my hack :)

I want to ask you about the Firmware hub device you've added. My DSDT already has this device (two of them) but I don't know if it's actually doing anything as far as OS X is concerned. Both appear in ioreg but with nothing showing but IODeviceMemory and Name (INT0800 and PNP0C02).
Here is the whole section, the two devices are not referenced anywhere else in the DSDT:

<snip />

Can I do anything with this? (sorry about the non-specific question :P )

Yes... remove them and at mine. Apple (LPC) want that address so let's give it to them.


I read through the whole thread, and downloaded your DSDT v2.8. The whole layout of it is different from mine it seems :P Could you be a bit more specific in what needs work in my DSDT? The layout too, to optimize things, or just add fixes/delete obsolete things?

Start by renaming the Devices, then rip out parts, and keep rebooting – to see if it still works – until you get sick of it.

By the way, if I remove eg. FDC, the device, how much do I remove - all the way to the next device, or just to the Method right below?

Totally off-tipic again of course... but start with Device (FDC) up until the } at the same column.

Hope I don't sound too ignorant, but I want to learn to be able to teach! There's a thread similar to the P5K PRO, for the ep45-ud3r, and I'm hoping we'll get some kind of 'universal' DSDT done for this board as well.

That would be nice for fellow ep45-ud3r board owners, but make sure that you don't re-invent the wheel :D

Edit: This is totally offtopic, but I was wondering, could we get iStat menus to recognize the cpu-temperature by editing the DSDT?

No idea. I'm not much of a fan of it. I am personally waiting for i-mark to open up, or I'll have to write my own tool one day soon. Should be a days work top.

#465
oldnapalm

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Edit: This is totally offtopic, but I was wondering, could we get iStat menus to recognize the cpu-temperature by editing the DSDT?


What about adding "TC0D" key to FakeSMC using code from CPU-i kext?
iStat reads this 2 bytes key from SMC. I tested adding it to Info.plist with value <33 00> and iStat shows "CPU temp = 51ºC", so it should work.
Is it a bad idea for system performance?

#466
barnum

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I've now ripped out ASOC, SIOR, SMRG, SCMD, SBYT, WBYT, WWRD, RSBT, RBYT, RWRD, RBLK, WBLK, RAMW, IOB2, ISMI, GNVS, SNVS, GMAX, GMDX, GCAX, GCDX - and PPC, _PCT, _PSD, _PSS, SPSS and NPSS from the SSDT section at the bottom.


So now we don't need the _PSS, SPPS and NPSS to enter P-States ?
There are calculated automaticaly ?

Barnum

#467
Master Chief

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So now we don't need the _PSS, SPPS and NPSS to enter P-States ?
There are calculated automaticaly ?

Barnum

See post #443


What about adding "TC0D" key to FakeSMC using code from CPU-i kext?
iStat reads this 2 bytes key from SMC. I tested adding it to Info.plist with value <33 00> and iStat shows "CPU temp = 51ºC", so it should work.
Is it a bad idea for system performance?

Oh yeah. Like I said: FakeSMS sucks (it's far to limited). And please share what you did with the rest of the peeps here. I tell you this: Experimenting is good – and you showed it – even if it makes your head spin!

p.s. There's a small hit yes, but who cares if you care about these values.

#468
iSoprano

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Hi, could anyone help me pls....I have speedstep with low temps but sleep is not working. Could anyone take a look at my DSDT or offer suggestion. Mine is a GA-EP-35DS3L board. I have everything working except sleep :) and mine too

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#469
Master Chief

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Hi, could anyone help me pls....I have speedstep with low temps but sleep is not working. Could anyone take a look at my DSDT or offer suggestion. Mine is a GA-EP-35DS3L board. I have everything working except sleep :) and mine too

Let me be perfectly clear to you:
1) Do not attach TXT files because they are worthless (at least to me).
2) The topic at hand is not about sleep (please read the title).

Note: <sensitive_topic>You seem to be using a PC-EFI module – at least when I am reading your signature right – which uses other peoples work without permission, not to mention the license breach, so go there and ask them for help. And yes please quote me! </sensitive_topic> But if you are "just" using Netkas's PC EFI then by all means, change that file first and open a new topic about fixing sleep!

#470
iSoprano

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Let me be perfectly clear to you:
1) Do not attach TXT files because they are worthless (at least to me).
2) The topic at hand is not about sleep (please read the title).

p.s. You seem to be using a PC-EFI module – at least when I am reading your signature right – which uses other peoples work without permission, not to mention the license breach, so go there and ask them for help. And yes please quote me!



Master Chief, what kind of file do you expect one to attach? that's a DSL file with txt appended as per the first post.
I do know that this thread is not about sleep but on speedsteping. The reason I brought about it here caz adding cst and pct info into my DSDT broke my sleep...I'm not that familiar with all DSDT coding.

ALso excuse my ignorance, I am not using any PC-EFI module...was supposed to type PC EFI by Netkas...in my enthusiasm I did my signature..and didn't notice the difference until you mentioned

#471
Beerkex'd

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what kind of file do you expect one to attach? that's a DSL file with txt appended as per the first post.


Look again, it says "Please Post DSDT.dsl.zip files ".

#472
FKA

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So now we don't need the _PSS, SPPS and NPSS to enter P-States ?
There are calculated automaticaly ?

Barnum



See post #443


Please be aware - until a GigaByte user manages to catch up with Master Chief's work, most of us still need the _PSS entry for speedsteping.

I'm trying but time isn't on my side ATM :huh:

#473
kdawg

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Please be aware - until a GigaByte user manages to catch up with Master Chief's work, most of us still need the _PSS entry for speedsteping.

I'm trying but time isn't on my side ATM :(



After a long hiatus I'm back on it. Got a little burn't out so I needed a break. Let's see how far I get on my GA-EP45-UD3P.

@ FormerlyKnowsAs
What kind of progress have you made on your board?

#474
Master Chief

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Master Chief, what kind of file do you expect one to attach? that's a DSL file with txt appended as per the first post.

What Beerke'ed said. And the reason for this is simple; text files are known to add invisible characters, making it impossible to compile without fixing the errors first. Now help others to help you. Start by attaching a correctly formatted ZIP file and who know what might happen tonight :(

Light bulb:
I am going to help some of you GB users. Not here of course, so feel free to open a new topic and let's get cracking. A one time only offer of course!

#475
spanakorizo

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Anyone getting errors like this?
PM kernel (name of process) (map: 0x7010c2c) triggered DYLD shared region unnest for map: 0x7010c2c, region 0x7fff82800000->0x7fff82a00000. While not abnormal for debuggers, this increases system memory footprint until the target exits.
there is also a discussion in apple's forums
http://discussions.a...t...15&tstart=0

#476
Matthew L.

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At first, thanks for working on the vanilla speedstepping so hard, thanks for the ton of collected info!

I've jumped into making my system speedstep-capable too, but I've hit some walls (or not). Let me tell everything about the process.

I have tried to append my SSDT tables to my DSDT, but while I was doing it, I noticed that everything I have in my IST and PM tables aren't supposed to be used. (The post #443.) Then I've noticed some using VoodooMonitor and I've tried the app, well, why not. I was surprised: I've had 4 P-States and speedstepping (but no voltage changing) w/o any work on the DSDT. Okay, then I've tried to use the AppleIntelCPUPM kext, but I've got some errors about missing _CST. I've re-read the instructions, appended the MacPro3,1 _CST tables to my CPU's + the CFGD and PDC0 addresses in DSDT, and done, no _CST errors at boot, but in VoodooMonitor I get jumping voltages of 1.212V and 1.116V, with 1.212V dominating at a fixed, 6x multiplier, which is strange (and temperature is low, 30 and 32-33C idle). Is it normal, or is there something wrong in my DSDT? (If this is relevant: I have EIST and C1E enabled in BIOS.)

Thanks in advance!
(And sorry for the not-so-shiny-language-knowledge. :) )

EDIT: About the 1.116V: there is no 1.116V, but 1.132 at the lowest P-State...weird.

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#477
Master Chief

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At first, thanks for working on the vanilla speedstepping so hard, thanks for the ton of collected info!

I've jumped into making my system speedstep-capable too, but I've hit some walls (or not). Let me tell everything about the process.

I have tried to append my SSDT tables to my DSDT, but while I was doing it, I noticed that everything I have in my IST and PM tables aren't supposed to be used. (The post #443.)...

The attached archive contains only four files, but your SSDT shows 4 IST and 4 CST tables. Please include all files in a new archive. Now. I take it that you had something like this in your original DSDT:
Processor (CPU0, 0x00, 0x00000410, 0x06 {}
		Processor (CPU1, 0x01, 0x00000410, 0x06 {}
		Processor (CPU2, 0x02, 0x00000410, 0x06 {}
		Processor (CPU3, 0x03, 0x00000410, 0x06 {}
If yes, then please also include your original/unmodified DSDT so that I can look into loading your CPUPM table – which is responsible for loading your IST/CST tables and without this table... there is no support for Intel SpeedStep Technology.

You may want to try something like this to remedy it:
0x00000000, 0x0000)
Name (HNDL, 0x80000000)
Name (TBLD, 0x80)

Method (_INI, 0, NotSerialized)
{
if (LNot (And (TBLD, One)))
{
Or (TBLD, One, TBLD)
Load (PMBL, HNDL)
}
}
}
Processor (CPU1, 0x01, 0x00000410, 0x06) {}
Processor (CPU2, 0x02, 0x00000410, 0x06) {}
Processor (CPU3, 0x03, 0x00000410, 0x06) {}
..... _linenums:0'>Scope (_PR) { Processor (CPU0, 0x00, 0x00000410, 0x06) { OperationRegion (PMBL, SystemMemory, <strong class='bbc'>0x00000000</strong>, <strong class='bbc'>0x0000</strong>) Name (HNDL, 0x80000000) Name (TBLD, 0x80) Method (_INI, 0, NotSerialized) { if (LNot (And (TBLD, One))) { Or (TBLD, One, TBLD) Load (PMBL, HNDL) } } } Processor (CPU1, 0x01, 0x00000410, 0x06) {} Processor (CPU2, 0x02, 0x00000410, 0x06) {} Processor (CPU3, 0x03, 0x00000410, 0x06) {}.....
But don't forget to fill in the correct address and table length (both in red) because this stub will not initialize properly without the right address and length specified!

This way you only need to add a customized _PSS() Method – your motherboard already includes a _CST method – with data for say an OC'ed Intel CPU or when the P-States are not what you want them to be. Have fun now :D

p.s. You only need to add this new method when that table isn't loading, which I can't tell now since I don't have access to all the required information/data.

#478
Matthew L.

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I'll attach everything about my DSDT-patching project in this post.
I promise, these were the only related SSDT tables that I could rip through Everest, just like FormerlyKnownAs with his mobo I couldn't get any CST tables. About the number of 4, I'm sure this is because of the max. supported cores, because as I've stated earlier, no other ACPI tables were available for dump, and at the time of writing the post, I've double-checked with the newest version of Everest.
BTW, at the time of seeing p-states and speedstepping w/o voltage changes I was using the dsdt_fix_f8d.dsl.
About the archive: the dsdt with appended MP3,1 _CST tables is the one with the _mp31 ending, and the dsdt_f8d is the virgin, untouched, straight-from-bios DSDT table, and the one with the _fix_ is without any speedstep-related modifications. (From koalala's ACPI patcher v0.2 b5 IIRC.)
About the maybe-fix, which table's address should I provide there? ;)

n' of course, thanks for helping a newbie! :)

By looking at the VoodooMonitor the p-states for me seem correct, it looks exactly like what it should do (reflects the Windows-stepping, with proper voltages), so I don't have to add a _PSS table, right? And which table should your code load for me?
'bout data, I've provided everything I could get from my PC, for sure, so I'll wait your answer, because I'm curious about what can be missing.

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#479
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@ Master Chief

I have yet to patch my DSDT with C-state objects, as I am still uncertain about determining/calculating my exact P-states data for Name (_PSS, Package () given the difference of opinion between yourself and FormerlyKnownAs.....I do not want to damage my CPU by using any incorrect values.....

However, I wanted to report that my current DSDT is only fixed for RTC (for CMOS reset fix) and HDEF (for audio with AD1988b legacy kext) and find that without OpenHaltRestart.kext in /Extra, I can cold start and shutdown without any problem but selecting Restart (warm boot) in the Apple menu gives me the same result selecting Sleep.....i.e. the display goes black but the PC fans stay on and then the display cannot be woken up.......I need to reboot to get the display back.......I find this interesting......

FYI in /S/L/E I have no additional kexts (Legacy or other non-Apple 10.6.x kexts) and in /Extra I only have:

VoodooMonitor.kext
nForceIOATAFamily.kext
AppleNForceATA.kext
AD1988bFix.kext
lspcidrv.kext

with optionally OpenHaltRestart.kext for warm boot (Restart) capability......I used to have PlatformUUID too.....but have encountered no problems so far in not using it......but I can always drop it back in if I do......

I would like to test your "I think that warm boot (restarts) can be achieved with a simple DSDT patch because all this kext does, really, is to store 0xfe in the keyboard controller (port 64)" idea by modding my DSDT.aml as you suggest......to see if it has any effect on Sleep as well.....

I do not want to take this thread off-topic, so please PM me about it......

Cheers
verdant

#480
Master Chief

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I'll attach everything about my DSDT-patching project in this post.
I promise, these were the only related SSDT tables that I've ripped through Everest, just like FormerlyKnownAs states in the thread's first post, I couldn't get any CST tables. About the number of 4, I'm sure this is because of the max. supported cores, because as I've stated earlier, no other ACPI tables were available for dump, and at the time of writing the post, I've double-checked with the newest version of Everest.

Never mind. My error. I need glasses. Or I shouldn't try to do two different things, when also a power failure hits the building. Actually the guard was unaware of my presence (I never left the building) when the maintenance crew started to work on the grid. Leaving me in the dark. I'll be good for another 12-24 hours on battery power though.

About the maybe-fix, which table's address should I provide there? :D

The address and length of the CpuPm table.

n' of course, thanks for helping a newbie! :)

Right, but next time hopefully better I hope.

The P-states for me seem correct, it looks exactly like what it should do (reflects the Windows-stepping, with proper voltages and no jumping around), so I don't have to add a _PSS table, right? And which table should your code load for me?

When P-State stepping works... none. But your _PSS Method has only two states in SPSS/NPSS in cpu0ist; one for 3.2GHz and one for 2.4GHz so how many do you get in CPU-i / VoodooMonitor (or whatever you are using).





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