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[AMD] Yosemite Kernel Testing (for help use the Help Topic)


Duran Keeley
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Some errors during boot:

attachicon.gifImageUploadedByTapatalk1422192577.567012.jpg

 

And grey screen at the end(

I'm trying a fix.

Right now I modded the SSEPlus_base.h

I'm currently rebuilding the kernel so hang tight ;)

EDIT: Fix done, test please and report...

BSA_YOS_R7B.zip

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New kernel to test.

It is again based on SSEPlus.

Big thanks to Bronzovka for providing the fixes mentioned above.

Test please, and report.

 

Hi AnV Your OPEMU FIX

 

line 912 & 913 Restore

    unsigned int num_src = *ModRM & 0x7;
    unsigned int num_dst = (*ModRM >> 3) & 0x7;

ssse3_run opcode

 

0x00 - 0x0F

 

m128

               case 0x00:                    //pshufb128(&xmmsrc,&xmmdst,&xmmres);
                    xmmres.i = ssp_shuffle_epi8_REF(xmmdst.i, xmmsrc.i);
                    break;


                case 0x01:
                    //phaddw128(&xmmsrc,&xmmdst,&xmmres);
                    xmmres.i = ssp_hadd_epi16_REF(xmmdst.i, xmmsrc.i);
                    break;


                case 0x02:
                    //phaddd128(&xmmsrc,&xmmdst,&xmmres);
                    xmmres.i = ssp_hadd_epi32_REF(xmmdst.i, xmmsrc.i);
                    break;


                case 0x03:
                    //phaddsw128(&xmmsrc,&xmmdst,&xmmres);
                    xmmres.i = ssp_hadds_epi16_REF(xmmdst.i, xmmsrc.i);
                    break;


                case 0x04:
                    //pmaddubsw128(&xmmsrc,&xmmdst,&xmmres);
                    xmmres.i = ssp_maddubs_epi16_REF(xmmdst.i, xmmsrc.i);
                    break;


                case 0x05:
                    //phsubw128(&xmmsrc,&xmmdst,&xmmres);
                    xmmres.i = ssp_hsub_epi16_REF(xmmdst.i, xmmsrc.i);
                    break;


                case 0x06:
                    //phsubd128(&xmmsrc,&xmmdst,&xmmres);
                    xmmres.i = ssp_hsub_epi32_REF(xmmdst.i, xmmsrc.i);
                    break;


                case 0x07:
                    //phsubsw128(&xmmsrc,&xmmdst,&xmmres);
                    xmmres.i = ssp_hsubs_epi16_REF(xmmdst.i, xmmsrc.i);
                    break;


                case 0x08:
                    //psignb128(&xmmsrc,&xmmdst,&xmmres);
                    xmmres.i = ssp_sign_epi8_REF(xmmdst.i, xmmsrc.i);
                    break;


                case 0x09:
                    //psignw128(&xmmsrc,&xmmdst,&xmmres);
                    xmmres.i = ssp_sign_epi16_REF(xmmdst.i, xmmsrc.i);
                    break;


                case 0x0A:
                    //psignd128(&xmmsrc,&xmmdst,&xmmres);
                    xmmres.i = ssp_sign_epi32_REF(xmmdst.i, xmmsrc.i);
                    break;


                case 0x0B:
                    //pmulhrsw128(&xmmsrc,&xmmdst,&xmmres);
                    xmmres.i = ssp_mulhrs_epi16_REF(xmmdst.i, xmmsrc.i);
                    break;


                case 0x0F:
                    //palignr128(&xmmsrc,&xmmdst,&xmmres,(const int)operand);
                    xmmres.i = ssp_alignr_epi8_REF(xmmdst.i, xmmsrc.i, (const int)operand);
                    ins_size++;
                    break;

m64

               case 0x00:                    //pshufb64(&mmsrc,&mmdst,&mmres);
                    mmres.m64 = ssp_shuffle_pi8_REF(mmdst.m64, mmsrc.m64);
                    break;


                case 0x01:
                    //phaddw64(&mmsrc,&mmdst,&mmres);
                    mmres.m64 = ssp_hadd_pi16_REF(mmdst.m64, mmsrc.m64);
                    break;


                case 0x02:
                    //phaddd64(&mmsrc,&mmdst,&mmres);
                    mmres.m64 = ssp_hadd_pi32_REF(mmdst.m64, mmsrc.m64);
                    break;


                case 0x03:
                    //phaddsw64(&mmsrc,&mmdst,&mmres);
                    mmres.m64 = ssp_hadds_pi16_REF(mmdst.m64, mmsrc.m64);
                    break;


                case 0x04:
                    //pmaddubsw64(&mmsrc,&mmdst,&mmres);
                    mmres.m64 = ssp_maddubs_pi16_REF(mmdst.m64, mmsrc.m64);
                    break;


                case 0x05:
                    //phsubw64(&mmsrc,&mmdst,&mmres);
                    mmres.m64 = ssp_hsub_pi16_REF(mmdst.m64, mmsrc.m64);
                    break;


                case 0x06:
                    //phsubd64(&mmsrc,&mmdst,&mmres);
                    mmres.m64 = ssp_hsub_pi32_REF(mmdst.m64, mmsrc.m64);
                    break;


                case 0x07:
                    //phsubsw64(&mmsrc,&mmdst,&mmres);
                    mmres.m64 = ssp_hsubs_pi16_REF(mmdst.m64, mmsrc.m64);
                    break;


                case 0x08:
                    //psignb64(&mmsrc,&mmdst,&mmres);
                    mmres.m64 = ssp_sign_pi8_REF(mmdst.m64, mmsrc.m64);
                    break;


                case 0x09:
                    //psignw64(&mmsrc,&mmdst,&mmres);
                    mmres.m64 = ssp_sign_pi16_REF(mmdst.m64, mmsrc.m64);
                    break;


                case 0x0A:
                    //psignd64(&mmsrc,&mmdst,&mmres);
                    mmres.m64 = ssp_sign_pi32_REF(mmdst.m64, mmsrc.m64);
                    break;


                case 0x0B:
                    //pmulhrsw64(&mmsrc,&mmdst,&mmres);
                    mmres.m64 = ssp_mulhrs_pi16_REF(mmdst.m64, mmsrc.m64);
                    break;


                case 0x0F:
                    //palignr64(&mmsrc,&mmdst,&mmres, (const int)operand);
                    mmres.m64 = ssp_alignr_pi8_REF(mmdst.m64, mmsrc.m64, (const int)operand);
                    ins_size++;
                    break;
Because in SSEPlus
A = dst
B = src

 

 

 

but  Issue Still No solution

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Hi AnV Your OPEMU FIX

 

line 912 & 913 Restore

    unsigned int num_src = *ModRM & 0x7;
    unsigned int num_dst = (*ModRM >> 3) & 0x7;

ssse3_run opcode

 

0x00 - 0x0F

 

m128

               case 0x00:                    //pshufb128(&xmmsrc,&xmmdst,&xmmres);
                    xmmres.i = ssp_shuffle_epi8_REF(xmmdst.i, xmmsrc.i);
                    break;


                case 0x01:
                    //phaddw128(&xmmsrc,&xmmdst,&xmmres);
                    xmmres.i = ssp_hadd_epi16_REF(xmmdst.i, xmmsrc.i);
                    break;


                case 0x02:
                    //phaddd128(&xmmsrc,&xmmdst,&xmmres);
                    xmmres.i = ssp_hadd_epi32_REF(xmmdst.i, xmmsrc.i);
                    break;


                case 0x03:
                    //phaddsw128(&xmmsrc,&xmmdst,&xmmres);
                    xmmres.i = ssp_hadds_epi16_REF(xmmdst.i, xmmsrc.i);
                    break;


                case 0x04:
                    //pmaddubsw128(&xmmsrc,&xmmdst,&xmmres);
                    xmmres.i = ssp_maddubs_epi16_REF(xmmdst.i, xmmsrc.i);
                    break;


                case 0x05:
                    //phsubw128(&xmmsrc,&xmmdst,&xmmres);
                    xmmres.i = ssp_hsub_epi16_REF(xmmdst.i, xmmsrc.i);
                    break;


                case 0x06:
                    //phsubd128(&xmmsrc,&xmmdst,&xmmres);
                    xmmres.i = ssp_hsub_epi32_REF(xmmdst.i, xmmsrc.i);
                    break;


                case 0x07:
                    //phsubsw128(&xmmsrc,&xmmdst,&xmmres);
                    xmmres.i = ssp_hsubs_epi16_REF(xmmdst.i, xmmsrc.i);
                    break;


                case 0x08:
                    //psignb128(&xmmsrc,&xmmdst,&xmmres);
                    xmmres.i = ssp_sign_epi8_REF(xmmdst.i, xmmsrc.i);
                    break;


                case 0x09:
                    //psignw128(&xmmsrc,&xmmdst,&xmmres);
                    xmmres.i = ssp_sign_epi16_REF(xmmdst.i, xmmsrc.i);
                    break;


                case 0x0A:
                    //psignd128(&xmmsrc,&xmmdst,&xmmres);
                    xmmres.i = ssp_sign_epi32_REF(xmmdst.i, xmmsrc.i);
                    break;


                case 0x0B:
                    //pmulhrsw128(&xmmsrc,&xmmdst,&xmmres);
                    xmmres.i = ssp_mulhrs_epi16_REF(xmmdst.i, xmmsrc.i);
                    break;


                case 0x0F:
                    //palignr128(&xmmsrc,&xmmdst,&xmmres,(const int)operand);
                    xmmres.i = ssp_alignr_epi8_REF(xmmdst.i, xmmsrc.i, (const int)operand);
                    ins_size++;
                    break;

m64

               case 0x00:                    //pshufb64(&mmsrc,&mmdst,&mmres);
                    mmres.m64 = ssp_shuffle_pi8_REF(mmdst.m64, mmsrc.m64);
                    break;


                case 0x01:
                    //phaddw64(&mmsrc,&mmdst,&mmres);
                    mmres.m64 = ssp_hadd_pi16_REF(mmdst.m64, mmsrc.m64);
                    break;


                case 0x02:
                    //phaddd64(&mmsrc,&mmdst,&mmres);
                    mmres.m64 = ssp_hadd_pi32_REF(mmdst.m64, mmsrc.m64);
                    break;


                case 0x03:
                    //phaddsw64(&mmsrc,&mmdst,&mmres);
                    mmres.m64 = ssp_hadds_pi16_REF(mmdst.m64, mmsrc.m64);
                    break;


                case 0x04:
                    //pmaddubsw64(&mmsrc,&mmdst,&mmres);
                    mmres.m64 = ssp_maddubs_pi16_REF(mmdst.m64, mmsrc.m64);
                    break;


                case 0x05:
                    //phsubw64(&mmsrc,&mmdst,&mmres);
                    mmres.m64 = ssp_hsub_pi16_REF(mmdst.m64, mmsrc.m64);
                    break;


                case 0x06:
                    //phsubd64(&mmsrc,&mmdst,&mmres);
                    mmres.m64 = ssp_hsub_pi32_REF(mmdst.m64, mmsrc.m64);
                    break;


                case 0x07:
                    //phsubsw64(&mmsrc,&mmdst,&mmres);
                    mmres.m64 = ssp_hsubs_pi16_REF(mmdst.m64, mmsrc.m64);
                    break;


                case 0x08:
                    //psignb64(&mmsrc,&mmdst,&mmres);
                    mmres.m64 = ssp_sign_pi8_REF(mmdst.m64, mmsrc.m64);
                    break;


                case 0x09:
                    //psignw64(&mmsrc,&mmdst,&mmres);
                    mmres.m64 = ssp_sign_pi16_REF(mmdst.m64, mmsrc.m64);
                    break;


                case 0x0A:
                    //psignd64(&mmsrc,&mmdst,&mmres);
                    mmres.m64 = ssp_sign_pi32_REF(mmdst.m64, mmsrc.m64);
                    break;


                case 0x0B:
                    //pmulhrsw64(&mmsrc,&mmdst,&mmres);
                    mmres.m64 = ssp_mulhrs_pi16_REF(mmdst.m64, mmsrc.m64);
                    break;


                case 0x0F:
                    //palignr64(&mmsrc,&mmdst,&mmres, (const int)operand);
                    mmres.m64 = ssp_alignr_pi8_REF(mmdst.m64, mmsrc.m64, (const int)operand);
                    ins_size++;
                    break;
Because in SSEPlus
A = dst
B = src

 

 

 

but  Issue Still No solution

Ok, swap done, wait for build R7C

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Hi AnV

 

SSSE3 Comparison of error

 

pshufb128 in old opemu

 



void pshufb128(ssp_m128 *src, ssp_m128 *dst, ssp_m128 *res)
{
    int i;
    
    for (i = 0; i < 16; ++i)
    {
        if ((src->s8[i]) & 0x80)
            res->s8[i] = 0;
        else
            res->s8[i] = dst->s8[src->s8[i] & 0xf];
    }
}


expansion

 



B.s8[0]  = (MSK.s8[0]  & 0x80) ? 0 : A.s8[(MSK.s8[0]  & 0xf)];
B.s8[1]  = (MSK.s8[1]  & 0x80) ? 0 : A.s8[(MSK.s8[1]  & 0xf)];
B.s8[2]  = (MSK.s8[2]  & 0x80) ? 0 : A.s8[(MSK.s8[2]  & 0xf)];
B.s8[3]  = (MSK.s8[3]  & 0x80) ? 0 : A.s8[(MSK.s8[3]  & 0xf)];
B.s8[4]  = (MSK.s8[4]  & 0x80) ? 0 : A.s8[(MSK.s8[4]  & 0xf)];
B.s8[5]  = (MSK.s8[5]  & 0x80) ? 0 : A.s8[(MSK.s8[5]  & 0xf)];
B.s8[6]  = (MSK.s8[6]  & 0x80) ? 0 : A.s8[(MSK.s8[6]  & 0xf)];
B.s8[7]  = (MSK.s8[7]  & 0x80) ? 0 : A.s8[(MSK.s8[7]  & 0xf)];
B.s8[8]  = (MSK.s8[8]  & 0x80) ? 0 : A.s8[(MSK.s8[8]  & 0xf)];
B.s8[9]  = (MSK.s8[9]  & 0x80) ? 0 : A.s8[(MSK.s8[9]  & 0xf)];
B.s8[10] = (MSK.s8[10] & 0x80) ? 0 : A.s8[(MSK.s8[10] & 0xf)];
B.s8[11] = (MSK.s8[11] & 0x80) ? 0 : A.s8[(MSK.s8[11] & 0xf)];
B.s8[12] = (MSK.s8[12] & 0x80) ? 0 : A.s8[(MSK.s8[12] & 0xf)];
B.s8[13] = (MSK.s8[13] & 0x80) ? 0 : A.s8[(MSK.s8[13] & 0xf)];
B.s8[14] = (MSK.s8[14] & 0x80) ? 0 : A.s8[(MSK.s8[14] & 0xf)];
B.s8[15] = (MSK.s8[15] & 0x80) ? 0 : A.s8[(MSK.s8[15] & 0xf)];


 

 

in MS MSDN data


 

Return value

 



r0 = (mask0 & 0x80) ? 0 : SELECT(a, mask0 & 0x0f)
r1 = (mask1 & 0x80) ? 0 : SELECT(a, mask1 & 0x0f)
...
r15 = (mask15 & 0x80) ? 0 : SELECT(a, mask15 & 0x0f)


 

rx = res

maskx = src

a= dst

 

MSDN

i8[x] - i64[x] in SSEplus = s8[x] - s64[x]

 



    __m128i a, mask;


    a.m128i_i8[0] = 1;
    a.m128i_i8[1] = 2;
    a.m128i_i8[2] = 4;
    a.m128i_i8[3] = 8;
    a.m128i_i8[4] = 16;
    a.m128i_i8[5] = 32;
    a.m128i_i8[6] = 64;
    a.m128i_i8[7] = 127;
    a.m128i_i8[8] = -2;
    a.m128i_i8[9] = -4;
    a.m128i_i8[10] = -8;
    a.m128i_i8[11] = -16;
    a.m128i_i8[12] = -32;
    a.m128i_i8[13] = -64;
    a.m128i_i8[14] = -128;
    a.m128i_i8[15] = -1;


    mask.m128i_u8[0] = 0x8F;
    mask.m128i_u8[1] = 0x0E;
    mask.m128i_u8[2] = 0x8D;
    mask.m128i_u8[3] = 0x0C;
    mask.m128i_u8[4] = 0x8B;
    mask.m128i_u8[5] = 0x0A;
    mask.m128i_u8[6] = 0x89;
    mask.m128i_u8[7] = 0x08;
    mask.m128i_u8[8] = 0x87;
    mask.m128i_u8[9] = 0x06;
    mask.m128i_u8[10] = 0x85;
    mask.m128i_u8[11] = 0x04;
    mask.m128i_u8[12] = 0x83;
    mask.m128i_u8[13] = 0x02;
    mask.m128i_u8[14] = 0x81;
    mask.m128i_u8[15] = 0x00;


 

MS  dst is s8  src is u8

 

SSEplus dst & src all s8

 

I dont know which one is right
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I've also got a new way for testing.

With VMWare it is possible to alter cpuid mask.

This little C program gets the features of the CPU and clears the SSSE3 supported bit:

#include <stdint.h>
#include <stdio.h>

#define _Bit(n)			(1U << n)
#define CPUID_FEATURE_SSSE3     _Bit(9)  /* Supplemental SSE3 instructions */

static inline void
do_cpuid(uint32_t selector, uint32_t *data)
{
	__asm__ volatile ("cpuid"
		: "=a" (data[0]),
		  "=b" (data[1]),
		  "=c" (data[2]),
		  "=d" (data[3])
		: "a"(selector),
		  "b" (0),
		  "c" (0),
		  "d" (0));
}

int main(void)
{
	uint32_t reg[4];
	do_cpuid(1, reg);
    printf("With SSSE3:\n");
	printf("ECX: 0x%X\n", reg[2]);
	printf("EDX: 0x%X\n", reg[3]);
    printf("\n");
    printf("Without SSSE3:\n");
    printf("ECX: 0x%X\n", reg[2]);
    printf("EDX: 0x%X\n", (reg[3] & ~CPUID_FEATURE_SSSE3));
	return 0;
}

In the VMX file add thus:

cpuid.1.edx = "1011:1111:1110:1011:1111:1001:1111:1111"

With SSSE3:
ECX: 0x8E39D
EDX: 0xBFEBFBFF

Without SSSE3:
ECX: 0x8E39D
EDX: 0xBFEBF9FF

Use calculator.app to convert into binary

Kernel is also built and attached

BSA_YOS_R7C.zip

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and… palignr
 
in opemu
 
void palignr128(ssp_m128 *src, ssp_m128 *dst, ssp_m128 *res, uint8_t IMM)
{
    
    char buf [32];
    int i;
    
    memcpy (&buf[0], src->s32, 16);
    memcpy (&buf[16], dst->s32, 16);
    
    for (i = 0; i < 16; i++)
        if (IMM >= 32 || IMM + i >= 32)
            res->s8[i] = 0;
        else
            res->s8[i] = buf[IMM + i];
}
this is from gcc src
 
 
orig src
 
compute_correct_result_128 (int *i1, int *i2, unsigned int imm, int *r)
{
  char buf [32];
  char *bout = (char *) r;
  int i;


  memcpy (&buf[0], i2, 16);
  memcpy (&buf[16], i1, 16);


  for (i = 0; i < 16; i++)
    if (imm >= 32 || imm + i >= 32)
      bout[i] = 0;
    else
      bout[i] = buf[imm + i];
}
This function is compute imm num
 
Why the result be res->s8 = buf[iMM + i];
 
in ssse3-palignr.c
Return value is   *(__m128i *) r = _mm_alignr_epi8 (t1, t2, imm(0-31));
 
 
in MSDN data
 
    a.m128i_u32[3] = 0x01234567;
    a.m128i_u32[2] = 0x89ABDCEF;
    a.m128i_u32[1] = 0x01234567;
    a.m128i_u32[0] = 0x89ABCDEF;
    b.m128i_u32[3] = 0xFFFFEEEE;
    b.m128i_u32[2] = 0xDDDDCCCC;
    b.m128i_u32[1] = 0xBBBBAAAA;
    b.m128i_u32[0] = 0x99998888;


    // A right align value of four should remove the lowest 4 bytes of "b"
    __m128i res = _mm_alignr_epi8( a, b, 4 );


    printf_s("Original a: 0x%016I64x%016I64x\nOriginal b: 0x%016I64x%016I64x\n",
        a.m128i_u64[1], a.m128i_u64[0],
        b.m128i_u64[1], b.m128i_u64[0]);


    printf_s("Result res: 0x%016I64x%016I64x\n",
        res.m128i_u64[1], res.m128i_u64[0]);


Return value


ralign=IMM


r := (CONCAT(a,  >> (ralign * 8)) & 0xffffffffffffffff
and Should be res u64 dst & src u32
 
 
 
this is PALIGNR Comment
 
 
PALIGNR combines two 16-byte vectors into a single, 32-byte, and if it chooses from a range of 16 bytes and stores in the targeting vector. Start of the range is indicated by the third argument to the command, 8-bit immediate constant imm8.
 
PALIGNR commandment XMM1, XMM2, imm8 (128-bit arguments, ie. 16-element vectors) corresponds
 {Link vectors} 
 {Temp - 32-element vector}
 for i := 0 to 15 do begin
   temp[i]    := xmm1[i];
   temp[i+16] := xmm2[i];
 end;


 {Selects a portion}
 for i := 0 to 15 do
   xmm1[i] := temp[i + imm8];
Eg.
 
        0  1  2  3  4  5  6  7  8  9  10 11 12 13 14 15
       +--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+
xmm1 = |W |i |k |i |p |e |d |i |a |, |  |W |o |l |n |a |  
       +--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+
       
        16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31
       +--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+
xmm2 = |  |E |n |c |y |k |l |o |p |e |d |i |a |  |  |  |
       +--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+
The result of PALIGNR XMM1, XMM2, 11:
 
        0  1  2  3  4  5  6  7  8  9  10 11 12 13 14 15
       +--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+
xmm1 = |W |o |l |n |a |  |E |n |c |y |k |l |o |p |e |d |  
       +--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+

this Function PALIGNR Is simply wrong

 

I dont understand Why the test is successful

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New program for VMWare bit mask calculation:

#include <stdint.h>
#include <stdio.h>

#define _Bit(n)			(1U << n)
#define CPUID_FEATURE_SSSE3     _Bit(9)  /* Supplemental SSE3 instructions */

static inline void
do_cpuid(uint32_t selector, uint32_t *data)
{
	__asm__ volatile ("cpuid"
		: "=a" (data[0]),
		  "=b" (data[1]),
		  "=c" (data[2]),
		  "=d" (data[3])
		: "a"(selector),
		  "b" (0),
		  "c" (0),
		  "d" (0));
}

static inline void
print_vmware_flag(uint32_t data)
{
    int i;
    printf("cpuid.1.edx = \"");
    for (i = 31; i > 27; i--)
    {
        if (data & _Bit(i))
        {
            printf("1");
        } else {
            printf("0");
        }
    }
    printf(":");
    for (i = 27; i > 23; i--)
    {
        if (data & _Bit(i))
        {
            printf("1");
        } else {
            printf("0");
        }
    }
    printf(":");
    for (i = 23; i > 19; i--)
    {
        if (data & _Bit(i))
        {
            printf("1");
        } else {
            printf("0");
        }
    }
    printf(":");
    for (i = 19; i > 15; i--)
    {
        if (data & _Bit(i))
        {
            printf("1");
        } else {
            printf("0");
        }
    }
    printf(":");
    for (i = 15; i > 11; i--)
    {
        if (data & _Bit(i))
        {
            printf("1");
        } else {
            printf("0");
        }
    }
    printf(":");
    for (i = 11; i > 7; i--)
    {
        if (data & _Bit(i))
        {
            printf("1");
        } else {
            printf("0");
        }
    }
    printf(":");
    for (i = 7; i > 3; i--)
    {
        if (data & _Bit(i))
        {
            printf("1");
        } else {
            printf("0");
        }
    }
    printf(":");
    for (i = 3; i > -1; i--)
    {
        if (data & _Bit(i))
        {
            printf("1");
        } else {
            printf("0");
        }
    }
    printf("\"\n");
}

int main(void)
{
	uint32_t reg[4];
	do_cpuid(1, reg);
    printf("With SSSE3:\n");
	printf("ECX: 0x%X\n", reg[2]);
	printf("EDX: 0x%X\n", reg[3]);
    print_vmware_flag(reg[3]);
    printf("\n");

    printf("Without SSSE3:\n");
    printf("ECX: 0x%X\n", reg[2]);
    printf("EDX: 0x%X\n", (reg[3] & ~CPUID_FEATURE_SSSE3));
    print_vmware_flag(reg[3] & ~CPUID_FEATURE_SSSE3);
	return 0;
}

Hard work made easy

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New kernel to test.

I again modded it to software data types.

Hopefully with more success now.

BSA_YOS_R7D.zip

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With BSA_YOS_R7D and system.kext replaced:

 

IMG_0764_www.kepfeltoltes.hu_.jpg

Which IOPCIFamily and AppleACPIPlatform kexts do you use?

It seems like an incompatibility.

This is not kernel related...

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My first results:

 

- boot successful

- able to make screenshot, but wrong colors:

 

post-302440-0-31570400-1422200906_thumb.png

post-302440-0-34873500-1422200947_thumb.png

 

- selection of file only with name

- Safari works, App Store does not work with Webkit patch. Will try with original frameworks files.

 

Update:

Errors in log:

Jan 25 17:49:01 Mac-Pro-Andrey.local com.apple.WebKit.WebContent[423]: Error returned from iconservicesagent: Error Domain=NSCocoaErrorDomain Code=4099 "Не удалось установить связь с программой-помощником." (The connection to service named com.apple.iconservices was invalidated.) UserInfo=0x7f8ad96277c0 {NSDebugDescription=The connection to service named com.apple.iconservices was invalidated.}
Jan 25 17:49:01 Mac-Pro-Andrey.local com.apple.WebKit.WebContent[423]: Error returned from iconservicesagent: Error Domain=NSCocoaErrorDomain Code=4099 "Не удалось установить связь с программой-помощником." (The connection to service named com.apple.iconservices was invalidated.) UserInfo=0x7f8ad94848f0 {NSDebugDescription=The connection to service named com.apple.iconservices was invalidated.}
Jan 25 17:49:01 Mac-Pro-Andrey.local com.apple.WebKit.WebContent[423]: Error returned from iconservicesagent: Error Domain=NSCocoaErrorDomain Code=4099 "Не удалось установить связь с программой-помощником." (The connection to service named com.apple.iconservices was invalidated.) UserInfo=0x7f8adb511a10 {NSDebugDescription=The connection to service named com.apple.iconservices was invalidated.}
Jan 25 17:49:01 Mac-Pro-Andrey.local com.apple.WebKit.WebContent[423]: Error returned from iconservicesagent: Error Domain=NSCocoaErrorDomain Code=4099 "Не удалось установить связь с программой-помощником." (The connection to service named com.apple.iconservices was invalidated.) UserInfo=0x7f8ad96778f0 {NSDebugDescription=The connection to service named com.apple.iconservices was invalidated.} 

Testing continues... 

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I am using the original ones, so that is the issue? Can you give me the link to the proper ones? 

Try with original System.kext.

It would seem that is the reason the link fails.

It's either that or your AppleACPIPlatform.kext or IOPCIFamily.kext files have gone bad.

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Try with original System.kext.

It would seem that is the reason the link fails.

It's either that or your AppleACPIPlatform.kext or IOPCIFamily.kext files have gone bad.

 I've changed them to the ones you updated, and now the issue is the boot process stucks at hfs: mounted...

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It seems for fx the same i manage to fix USB 3.0 port that wasnt at all working and faster booting for my not taken place i thing the same or slower 

Not working dvd/cd i need to fix it

Install lastes AppleNforce but still not working dvd

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New kernel to test.

I again modded it to software data types.

Hopefully with more success now.

Not goes white screen with rainbow spinning
IMG_0033.JPG
 

 

is fine if I install my kext AppleAcpi ... / IOPCIFAmily ......
file:///Users/carlo/Desktop/sysctl%20-a%20
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My result with r7d:

Boot ok

Safari and Appstore work (testet with webkit fix)

Like any other Kernel before:

sometimes wrong colors in covers in itunes, in icons for jpg in finder and pictures in preview an iwork

iphoto gives me an error at importing pictures: not enough space on harddisk

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Hi AnV

Your R7D I try Fix

And delete the old code

Please check my changes

 

in opemu ssse3 opcode

m128 palignr
                case 0x0F:
                    xmmres.i = ssp_alignr_epi8_SSSE3 (xmmdst.i, xmmsrc.i, (const int)operand);
                    ins_size++;
                    break;

m64 palignr
                case 0x0F:
                    mmres.m64 = ssp_alignr_pi8_SSSE3 (mmdst.m64, mmsrc.m64, (const int)operand);
                    ins_size++;
                    break;

/EXTERNAL_HEADERS/SSEPlus/native/SSEPlus_native_SSSE3.h

/** \SSSE3{Native,_mm_alignr_epi8} */
SSP_FORCEINLINE __m128i ssp_alignr_epi8_SSSE3 (__m128i a, __m128i b, int n)
{
    n = (n>=32) ?  32 : n;
    switch( n )
    {
        CASE_32( ssp_alignr_epi8_REF, a, b );
    }
}
/** \SSSE3{Native,_mm_alignr_pi8} */
SSP_FORCEINLINE __m64 ssp_alignr_pi8_SSSE3 (__m64 a, __m64 b, int n)
{
    n = (n>=16) ?  16 : n;
    switch( n )
    {
        CASE_16( ssp_alignr_pi8_REF, a, b );
    }
}

/EXTERNAL_HEADERS/SSEPlus/emulation/SSEPlus_emulation_REF.h

SSP_FORCEINLINE __m128i ssp_alignr_epi8_REF (__m128i a, __m128i b, const int ralign)
{
    ssp_m128 C[3];
    ssp_s8 * tmp;
    int i, j;

    if (ralign <0) return b; //only shift to right, no negative
    C[2].i = _mm_setzero_si128();
    if (ralign > 32) return C[2].i;
    C[1].i = a;
    C[0].i = b;
    tmp = & (C[0].s8[0]);

    for (i=ralign+15, j=15; i >=ralign; i--, j--) {
        C[2].s8[j] = tmp[i];
    }

    return C[2].i;
}

/**  \SSSE3{Reference,_mm_alignr_pi8}
 \n \b NOTE: The user must call _mm_empty() after a call to this function.
 */
SSP_FORCEINLINE __m64 ssp_alignr_pi8_REF (__m64 a, __m64 b, const int ralign)
{
    ssp_m64 C[3];
    ssp_s8 * tmp;
    int i, j;
    
    if (ralign <0) return b; //only shift to right, no negative
    C[2].u32[0] = 0;
    C[2].u32[1] = 0;
    if (ralign > 16) return C[2].m64;
    C[1].m64 = a;
    C[0].m64 = b;
    tmp = & (C[0].s8[0]);
    
    for (i=ralign+7, j=7; i >=ralign; i--, j--) {
        C[2].s8[j] = tmp[i];
    }
    
    return C[2].m64;
}

SSEPlus code seems to be some difference with MSDN or gcc

 

Returns the value of different

 

Now Screenshots can works

But the color is not correct
 

1010-anv-r7-kernel.zip

1010-anv-r7-fix-patch.diff.zip

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