gils83 Posted November 17, 2013 Share Posted November 17, 2013 for testers it is important to make the difference between a screen capture selection or live capture wizard. png, it appears that a problem exists on the red mage live image captures so that coders understand the problem of the old CPU, it is important to note that the coders trying to correct this problem. I made a video capture to show you how to make a difference. On FX CPU, this problem does not exist. http://www.youtube.com/watch?feature=player_detailpage&v=LGrVwMz90BU ok.. Ben je ne connaissait pas cette methode... Commande+shift+4 et barre espace, c'est ça? Ben c'est cool j'ai pas une image blanche... mais bon elle est rose... lol Translate: ok .. Well, I did not know this method ...Command + Shift +4 and space bar, right?Well that's cool I have not a white image ... But hey it's pink ... lol yes !! 1 Link to comment Share on other sites More sharing options...
Skunk.34 Posted November 17, 2013 Share Posted November 17, 2013 for testers it is important to make the difference between a screen capture selection or live capture wizard. png, it appears that a problem exists on the red mage live image captures so that coders understand the problem of the old CPU, it is important to note that the coders trying to correct this problem. I made a video capture to show you how to make a difference. On FX CPU, this problem does not exist. http://www.youtube.com/watch?feature=player_detailpage&v=LGrVwMz90BU yes !! Merci Gils Link to comment Share on other sites More sharing options...
Skunk.34 Posted November 17, 2013 Share Posted November 17, 2013 What is corecrypto.kext. . .becose i am gettting this: no need for mavericks ... We must leave the default ... Link to comment Share on other sites More sharing options...
Andy Vandijck Posted November 17, 2013 Share Posted November 17, 2013 Bronzovka fixed cpuid.c and cpuid.c for cache determination of 12h and 14h family cpus. He also fixed the TSC detection of 14h series cpus. I refactored the old TSC detection code for Pentium 4 and Pentium M. I added this in the Intel part of the TSC detection... No more -alttsc and -altcache flag, only -emulateintel Bronzovka pointed out too I forgot to remove a cpuid call so it never set GenuineIntel but now it does. Thanks Bronzovka Diff and kernel attached below... AMD APU's are now fully working Next stop: SSE3 emu and PM kext. BRONYA_ANV_SINETEK_R3.diff.zip BSA_kernel.zip 12 Link to comment Share on other sites More sharing options...
Dans1975 Posted November 17, 2013 Share Posted November 17, 2013 Anybody else got crazy clock? Link to comment Share on other sites More sharing options...
Bronya Posted November 17, 2013 Share Posted November 17, 2013 Anybody else got crazy clock? you can did video from your desktop ? Link to comment Share on other sites More sharing options...
tragediana150 Posted November 17, 2013 Share Posted November 17, 2013 Attached Files BRONYA_ANV_SINETEK_R3.diff.zip 39.98KB 1 downloads BSA_kernel.zip 3.39MB 8 downloads Boot time - fast like Bronya RC1_Beta_Kernel. Good -emulateintel Still blur/bug icons Good work Link to comment Share on other sites More sharing options...
gils83 Posted November 17, 2013 Share Posted November 17, 2013 Boot time - fast like Bronya RC1_Beta_Kernel. Good -emulateintel Still blur/bug icons Good work bsa2_kernel screen.png and .png capture ? Link to comment Share on other sites More sharing options...
Shaneee Posted November 17, 2013 Share Posted November 17, 2013 Bronzovka fixed cpuid.c and cpuid.c for cache determination of 12h and 14h family cpus. He also fixed the TSC detection of 14h series cpus. I refactored the old TSC detection code for Pentium 4 and Pentium M. I added this in the Intel part of the TSC detection... No more -alttsc and -altcache flag, only -emulateintel Bronzovka pointed out too I forgot to remove a cpuid call so it never set GenuineIntel but now it does. Thanks Bronzovka Diff and kernel attached below... AMD APU's are now fully working Next stop: SSE3 emu and PM kext. Hope this is useful for the SSE3/Older CPUs, ubuntu@ubuntu:~$ cat /proc/cpuinfo processor : 0 vendor_id : AuthenticAMD cpu family : 15 model : 72 model name : AMD Turion(tm) 64 X2 Mobile Technology TL-60 stepping : 2 cpu MHz : 800.000 cache size : 512 KB physical id : 0 siblings : 2 core id : 0 cpu cores : 2 apicid : 0 initial apicid : 0 fpu : yes fpu_exception : yes cpuid level : 1 wp : yes flags : fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov pat pse36 clflush mmx fxsr sse sse2 ht syscall nx mmxext fxsr_opt rdtscp lm 3dnowext 3dnow rep_good nopl extd_apicid pni cx16 lahf_lm cmp_legacy svm extapic cr8_legacy bogomips : 1595.36 TLB size : 1024 4K pages clflush size : 64 cache_alignment : 64 address sizes : 40 bits physical, 48 bits virtual power management: ts fid vid ttp tm stc Link to comment Share on other sites More sharing options...
Dans1975 Posted November 17, 2013 Share Posted November 17, 2013 BSA2 Kernel working fine....still pink Launchpad Icons, clock jumping around different times!!! AMDX2 64 3800+ Nvidia 9400GT, Nvidia chipset, 4 G ram > GatewayGT5418E. With Lion, Snowleopard and Now Mavericks 1 Link to comment Share on other sites More sharing options...
Andy Vandijck Posted November 17, 2013 Share Posted November 17, 2013 Hope this is useful for the SSE3/Older CPUs, ubuntu@ubuntu:~$ cat /proc/cpuinfo processor : 0 vendor_id : AuthenticAMD cpu family : 15 model : 72 model name : AMD Turion(tm) 64 X2 Mobile Technology TL-60 stepping : 2 cpu MHz : 800.000 cache size : 512 KB physical id : 0 siblings : 2 core id : 0 cpu cores : 2 apicid : 0 initial apicid : 0 fpu : yes fpu_exception : yes cpuid level : 1 wp : yes flags : fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov pat pse36 clflush mmx fxsr sse sse2 ht syscall nx mmxext fxsr_opt rdtscp lm 3dnowext 3dnow rep_good nopl extd_apicid pni cx16 lahf_lm cmp_legacy svm extapic cr8_legacy bogomips : 1595.36 TLB size : 1024 4K pages clflush size : 64 cache_alignment : 64 address sizes : 40 bits physical, 48 bits virtual power management: ts fid vid ttp tm stc It's cpu family 15 (which Bronzovka implemented in tsc.c and cpuid.h) so tsc detection and cache determination should work.All it needs is a SSE3 emu. Tomorrow I will work on that. It's late and I'd like to get some sleep (really needed)... 2 Link to comment Share on other sites More sharing options...
Shaneee Posted November 17, 2013 Share Posted November 17, 2013 It's cpu family 15 (which Bronzovka implemented in tsc.c and cpuid.h) so tsc detection and cache determination should work. All it needs is a SSE3 emu. Tomorrow I will work on that. It's late and I'd like to get some sleep (really needed)... Will see if I can find an old SSE3 emu somewhere and try to add it. Get some sleep you deserve it Link to comment Share on other sites More sharing options...
Andy Vandijck Posted November 17, 2013 Share Posted November 17, 2013 Will see if I can find an old SSE3 emu somewhere and try to add it. Get some sleep you deserve it All old sse3 emus are 32-bit only and will cause kp.We need to implement new one with opemu invoke. 4 Link to comment Share on other sites More sharing options...
Skunk.34 Posted November 18, 2013 Share Posted November 18, 2013 Bronzovka fixed cpuid.c and cpuid.c for cache determination of 12h and 14h family cpus. He also fixed the TSC detection of 14h series cpus. I refactored the old TSC detection code for Pentium 4 and Pentium M. I added this in the Intel part of the TSC detection... No more -alttsc and -altcache flag, only -emulateintel Bronzovka pointed out too I forgot to remove a cpuid call so it never set GenuineIntel but now it does. Thanks Bronzovka Diff and kernel attached below... AMD APU's are now fully working Next stop: SSE3 emu and PM kext. Andy thank you for your nice work emulateintel works but I think there is a problem with the detection of L2 and L3 caches for my Phenom II x4 (Intel Xenon CPU E ) ... emulateintel might be helping to run iCloud and iMessage? No? Pic of Cpu-x is one capture (cmd+shift+4+space) = it is still pink lol Last login: Mon Nov 18 08:19:24 on console localhost:~ DoudMacPc$ uname -a Darwin localhost 13.0.0 Darwin Kernel Version 13.0.0: zo 17 nov 2013 23:20:49 CET; andyvand:xnu-2422.1.72-AMD/BUILD/obj/RELEASE_X86_64 x86_64 localhost:~ DoudMacPc$ sysctl machdep machdep.cpu.max_basic: 5 machdep.cpu.max_ext: 2147483675 machdep.cpu.vendor: GenuineIntel machdep.cpu.brand_string: Intel(R) Xeon(R) CPU E machdep.cpu.family: 16 machdep.cpu.model: 4 machdep.cpu.extmodel: 1 machdep.cpu.extfamily: 0 machdep.cpu.stepping: 6 machdep.cpu.feature_bits: 395049983 8397321 machdep.cpu.extfeature_bits: 4022598655 538623 machdep.cpu.signature: 67190 machdep.cpu.brand: 0 machdep.cpu.features: FPU VME DE PSE TSC MSR PAE MCE CX8 APIC SEP MTRR PGE MCA CMOV PAT PSE36 CLFSH MMX FXSR SSE SSE2 HTT SSE3 MON SSSE3 CX16 POPCNT machdep.cpu.extfeatures: SYSCALL 1GBPAGE EM64T LAHF RDTSCP TSCI machdep.cpu.logical_per_package: 4 machdep.cpu.cores_per_package: 4 machdep.cpu.microcode_version: 21 machdep.cpu.processor_flag: 1 machdep.cpu.mwait.linesize_min: 64 machdep.cpu.mwait.linesize_max: 64 machdep.cpu.mwait.extensions: 3 machdep.cpu.mwait.sub_Cstates: 0 machdep.cpu.cache.linesize: 64 machdep.cpu.cache.L2_associativity: 16 machdep.cpu.cache.size: 524288 machdep.cpu.tlb.inst.small: 32 machdep.cpu.tlb.inst.large: 16 machdep.cpu.tlb.data.small: 48 machdep.cpu.tlb.data.small_level1: 512 machdep.cpu.tlb.data.large: 48 machdep.cpu.tlb.data.large_level1: 128 machdep.cpu.address_bits.physical: 48 machdep.cpu.address_bits.virtual: 48 machdep.cpu.core_count: 4 machdep.cpu.thread_count: 4 machdep.vectors.timer: 221 machdep.vectors.IPI: 222 machdep.pmap.hashwalks: 166471 machdep.pmap.hashcnts: 524747 machdep.pmap.hashmax: 44 machdep.pmap.kernel_text_ps: 2097152 machdep.pmap.kern_pv_reserve: 8000 machdep.memmap.Conventional: 8550547456 machdep.memmap.RuntimeServices: 0 machdep.memmap.ACPIReclaim: 36864 machdep.memmap.ACPINVS: 2535424 machdep.memmap.PalCode: 0 machdep.memmap.Reserved: 19914752 machdep.memmap.Unusable: 0 machdep.memmap.Other: 0 machdep.tsc.frequency: 3898146496 machdep.tsc.deep_idle_rebase: 1 machdep.tsc.nanotime.tsc_base: 388951210173 machdep.tsc.nanotime.ns_base: 0 machdep.tsc.nanotime.scale: 1101797303 machdep.tsc.nanotime.shift: 0 machdep.tsc.nanotime.generation: 2 machdep.misc.panic_restart_timeout: 1266874889 machdep.misc.interrupt_latency_max: 0x0 0xde 0xdcfde machdep.misc.machine_check_panic: machdep.misc.timer_queue_trace: machdep.misc.nmis: 0 machdep.eager_timer_evaluations: 37 machdep.eager_timer_evaluation_max: 219160 machdep.user_idle_level: 0 localhost:~ DoudMacPc$ Link to comment Share on other sites More sharing options...
Andy Vandijck Posted November 18, 2013 Share Posted November 18, 2013 Andy thank you for your nice work emulateintel works but I think there is a problem with the detection of L2 and L3 caches for my Phenom II x4 (Intel Xenon CPU E ) ... emulateintel might be helping to run iCloud and iMessage? No? Pic of Cpu-x is one capture (cmd+shift+4+space) = it is still pink lol Last login: Mon Nov 18 08:19:24 on console localhost:~ DoudMacPc$ uname -a Darwin localhost 13.0.0 Darwin Kernel Version 13.0.0: zo 17 nov 2013 23:20:49 CET; andyvand:xnu-2422.1.72-AMD/BUILD/obj/RELEASE_X86_64 x86_64 localhost:~ DoudMacPc$ sysctl machdep machdep.cpu.max_basic: 5 machdep.cpu.max_ext: 2147483675 machdep.cpu.vendor: GenuineIntel machdep.cpu.brand_string: Intel(R) Xeon(R) CPU E machdep.cpu.family: 16 machdep.cpu.model: 4 machdep.cpu.extmodel: 1 machdep.cpu.extfamily: 0 machdep.cpu.stepping: 6 machdep.cpu.feature_bits: 395049983 8397321 machdep.cpu.extfeature_bits: 4022598655 538623 machdep.cpu.signature: 67190 machdep.cpu.brand: 0 machdep.cpu.features: FPU VME DE PSE TSC MSR PAE MCE CX8 APIC SEP MTRR PGE MCA CMOV PAT PSE36 CLFSH MMX FXSR SSE SSE2 HTT SSE3 MON SSSE3 CX16 POPCNT machdep.cpu.extfeatures: SYSCALL 1GBPAGE EM64T LAHF RDTSCP TSCI machdep.cpu.logical_per_package: 4 machdep.cpu.cores_per_package: 4 machdep.cpu.microcode_version: 21 machdep.cpu.processor_flag: 1 machdep.cpu.mwait.linesize_min: 64 machdep.cpu.mwait.linesize_max: 64 machdep.cpu.mwait.extensions: 3 machdep.cpu.mwait.sub_Cstates: 0 machdep.cpu.cache.linesize: 64 machdep.cpu.cache.L2_associativity: 16 machdep.cpu.cache.size: 524288 machdep.cpu.tlb.inst.small: 32 machdep.cpu.tlb.inst.large: 16 machdep.cpu.tlb.data.small: 48 machdep.cpu.tlb.data.small_level1: 512 machdep.cpu.tlb.data.large: 48 machdep.cpu.tlb.data.large_level1: 128 machdep.cpu.address_bits.physical: 48 machdep.cpu.address_bits.virtual: 48 machdep.cpu.core_count: 4 machdep.cpu.thread_count: 4 machdep.vectors.timer: 221 machdep.vectors.IPI: 222 machdep.pmap.hashwalks: 166471 machdep.pmap.hashcnts: 524747 machdep.pmap.hashmax: 44 machdep.pmap.kernel_text_ps: 2097152 machdep.pmap.kern_pv_reserve: 8000 machdep.memmap.Conventional: 8550547456 machdep.memmap.RuntimeServices: 0 machdep.memmap.ACPIReclaim: 36864 machdep.memmap.ACPINVS: 2535424 machdep.memmap.PalCode: 0 machdep.memmap.Reserved: 19914752 machdep.memmap.Unusable: 0 machdep.memmap.Other: 0 machdep.tsc.frequency: 3898146496 machdep.tsc.deep_idle_rebase: 1 machdep.tsc.nanotime.tsc_base: 388951210173 machdep.tsc.nanotime.ns_base: 0 machdep.tsc.nanotime.scale: 1101797303 machdep.tsc.nanotime.shift: 0 machdep.tsc.nanotime.generation: 2 machdep.misc.panic_restart_timeout: 1266874889 machdep.misc.interrupt_latency_max: 0x0 0xde 0xdcfde machdep.misc.machine_check_panic: machdep.misc.timer_queue_trace: machdep.misc.nmis: 0 machdep.eager_timer_evaluations: 37 machdep.eager_timer_evaluation_max: 219160 machdep.user_idle_level: 0 localhost:~ DoudMacPc$ Check under Windows.Picture of cpu-z cpu and caches tab. Compare... Link to comment Share on other sites More sharing options...
m28ew Posted November 18, 2013 Share Posted November 18, 2013 Check under Windows. Picture of cpu-z cpu and caches tab. Compare... L2 are still different 4 x 512KB 2 x 512KB Link to comment Share on other sites More sharing options...
Skunk.34 Posted November 18, 2013 Share Posted November 18, 2013 L2 are still different L3 is not displayed in CPU x Link to comment Share on other sites More sharing options...
tragediana150 Posted November 18, 2013 Share Posted November 18, 2013 and .png capture ? I capture .png and it's normal colour EDIT: But I do not know how you're doing the screenshots. My way is the osx keyboard shortcuts. Link to comment Share on other sites More sharing options...
Bronya Posted November 18, 2013 Share Posted November 18, 2013 L2 are still different L3 is not displayed in CPU x My kernel correct show cache ? ))) If l3 is not displayed in CPU , it s because in document from amd.com write that is l3 is null ... and don't show , because program cpu-x such. Show in profile and terminal . 2 Link to comment Share on other sites More sharing options...
m28ew Posted November 18, 2013 Share Posted November 18, 2013 My kernel correct show cache ? ))) nope your kernel still detects my L2 as 2 x 512KB instead of 4 x 512KB Link to comment Share on other sites More sharing options...
Bronya Posted November 18, 2013 Share Posted November 18, 2013 nope your kernel still detects my L2 as 2 x 512KB instead of 4 x 512KB in profile and terminal is correct! Total Number of Cores - 4. L2 Cache (per Core) - 512 KB . Total : Cores x (per Core) = 4 x 512 = 2048 KB = 2 MB ! Is correct ! If L2 Cache without word "(per Core)" - it is don't correct . 1 Link to comment Share on other sites More sharing options...
pico joe Posted November 18, 2013 Share Posted November 18, 2013 Yes.. agree with Bronya.., running cpu-z via wine and no problem with that (l2) http://cl.ly/image/1a1i2L2p0t2d Link to comment Share on other sites More sharing options...
Bronya Posted November 18, 2013 Share Posted November 18, 2013 Yes.. agree with Bronya.., running cpu-z via wine and no problem with that (l2) http://cl.ly/image/1a1i2L2p0t2d Tnx, but you see in profile - word " L2 Cache :" or "L2 Cache (per Core)" ? 1 Link to comment Share on other sites More sharing options...
m28ew Posted November 18, 2013 Share Posted November 18, 2013 in profile and terminal is correct! Total Number of Cores - 4. L2 Cache (per Core) - 512 KB . Total : Cores x (per Core) = 4 x 512 = 2048 KB = 2 MB ! Is correct ! If L2 Cache without word "(per Core)" - it is don't correct . I think you may be right the culprit may be the cpu-x itself since it's too old & it hasn't been updated since 2008 I've just found another false reading of intel i5's L2 by cpu-x (mavericks + vanilla kernel) cpuz = 4 x 256KB cpux = 2 x 256KB Link to comment Share on other sites More sharing options...
pico joe Posted November 18, 2013 Share Posted November 18, 2013 Bronya.., in system profile see the L2 cache only (not per core) with n without -emulateintel (bsa_kernel).., http://cl.ly/image/152122103r1D soon I'll try with your beta_kernel2 Link to comment Share on other sites More sharing options...
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