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DSDT fixes for Gigabyte boards

iSoprano

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FKA
FKA
Posted
Posted
As I said you can add as many states as you want, two is the minimum number of states, this works for me just as well.

				Package (0x06) { 0, 0, 0, 0, 0x4820, 0 },
			Package (0x06) { 0, 0, 0, 0, 0x81E, 1 },
			Package (0x06) { 0, 0, 0, 0, 0x471C, 2 },
			Package (0x06) { 0, 0, 0, 0, 0x71A, 3 },
			Package (0x06) { 0, 0, 0, 0, 0x4618, 4 },
			Package (0x06) { 0, 0, 0, 0, 0x616, 5 }

 

If I want to overclock let's say like 8 * 450 I just cut out the top package and that is it, I have multipliers from 6 to 8.

 

This is working perfectly for me with 3 p-states and my Fid and Vid values.

 

many thanks for this mm67

 

:)

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mm67
mm67
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This is working perfectly for me with 3 p-states and my Fid and Vid values.

 

many thanks for this mm67

 

:)

 

That's good to hear. I just saw on Vanilla speedstepping thread that someone else was having issues like Xopher and removing irq's from some devices helped. I did that a long time so maybe that is why I can't see such problems. How about you, tried any video clips yet with this code ?

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cparm
cparm
Posted
Posted
Here is the latest:

 

 

As you can see P-states and C-states are working

Screen_shot_2009_10_27_at_18.24.41.png

 

Only problem is that I currently have all Eist and C-state settings disabled in bios, so how is this possible with this dsdt.

All I can think is that OS X has all those C-state and P-settings built-in, it only checks the first cpu for valid CST and PSS tables. If it sees those then it discards them and starts using built-in values. Maybe someone has a better explanation for all this ?

 

This is all the code I need for P-states and C-states.

    Scope (_PR.CPU0)
   {
       Method (_CST, 0, NotSerialized)
       {
           Return (Package (0x04)
           {
               0x03, 
               Package (0x04) {ResourceTemplate () {Register (FFixedHW, 0x01, 0x02, 0, ,)},0x01,0,0}, 
               Package (0x04) {ResourceTemplate () {Register (FFixedHW, 0x01, 0x02, 0, ,)},0x02,0,0}, 
               Package (0x04) {ResourceTemplate () {Register (FFixedHW, 0x01, 0x02, 0, ,)},0x03,0,0}, 
           })
       }
    Method (_PSS, 0, NotSerialized)
	{
		Return (Package(0x02)
			{
			Package (0x06) { 0, 0, 0, 0, 0x4820, 0 },
			Package (0x06) { 0, 0, 0, 0, 0x616, 1 }
			})
	}
   }

 

If someone isn't lucky enough to have correct device-id for LPCB built-in like me then that has to be naturally fixed first.

 

That should be universal enough, all one needs to do is fill in those two values to PSS table, anyone can install VoodooMonitor and check the max and min control values from there. If two steps is not enough then one can add in as many as wanted/cpu is capable of. Please try to add in correct values for the whole PSS table and see if it makes any difference.

 

/edit

Seems to be usable for overclockers as well since max multiplier now comes from PSS, changed max control value to 0x81E and ran Geekbench, this is what I got:

Screen_shot_2009_10_27_at_20.01.18.png

 

/edit 2

Tested running at 8.5 * 400 without touching the dsdt, works great. Now running with all Eist and C-states options enabled and DropSSDT=n so now I am also loading the default PDC object that MC was worried about.

 

/edit 3

Just tested the same code on my MSI board, works great on that one too

confirmed, speedstep work great for me !!!!

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mitch_de
mitch_de
Posted
Posted

Yep.

Put how can i adjust the level at which AppleIntelCPU will step up and down throo the working Pstates ?

In voodoopower there is an threshoot key to adjust that. You can set it to more powersaving=higher value=more cpu load needed for more MHZ, or opposite.

For me AppleIntelCPU steps at too high cpu load to more Mhz.

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mm67
mm67
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Posted
Yep.

Put how can i adjust the level at which AppleIntelCPU will step up and down throo the working Pstates ?

In voodoopower there is an threshoot key to adjust that. You can set it to more powersaving=higher value=more cpu load needed for more MHZ, or opposite.

For me AppleIntelCPU steps at too high cpu load to more Mhz.

 

I'm not sure but if you take a look at ACPI_SMC_PlatformPlugin.kext there you can find StepDataDict for all models. Maybe some one can check if that has anything to do with speedstepping.

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FKA
FKA
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Posted
That's good to hear. I just saw on Vanilla speedstepping thread that someone else was having issues like Xopher and removing irq's from some devices helped. I did that a long time so maybe that is why I can't see such problems. How about you, tried any video clips yet with this code ?

 

I took the IRQ's out a few weeks back.

Have been listening to tunes this afternoon - no problems.

 

D.

 

Hi folks,

 

Can someone take a peek at my dsdt.dsl & tell me what I'm missing. I've renamed all USB devices to UHC and am getting errors now when compiling. Also for some reason it's not liking the new G3HT addition. I have included my dsdt (txt extension just for uploading) & error log.

 

I've gone line by line and can't seem to find the problems identified.

 

I greatly appreciate it!

 

:D

 

 

use 'find and replace' previous USB name eg. USB0 > UHC*

 

D.

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blackosx
blackosx
Posted
Posted

Hi mm67

 

From what I understand you have done some great work here so well done and thanks :wacko:

However, I have tried your P-state & C-state DSDT code which seems to work great but I would like to ask a question..

 

How do I work out how many, which ones and what values I need to enter for the p-states required for my E7300 core2duo. It currently runs at 2.66GHz, using a FSB @ 266MHz with a 10 x multiplier.

 

Experimenting with your default code, the status of CPUi shows the multiplier changing between x6 and x8 only. Can I add x10?

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mm67
mm67
Posted
Posted
Hi mm67

 

From what I understand you have done some great work here so well done and thanks :wacko:

However, I have tried your P-state & C-state DSDT code which seems to work great but I would like to ask a question..

 

How do I work out how many, which ones and what values I need to enter for the p-states required for my E7300 core2duo. It currently runs at 2.66GHz, using a FSB @ 266MHz with a 10 x multiplier.

 

Experimenting with your default code, the status of CPUi shows the multiplier changing between x6 and x8 only. Can I add x10?

 

Easiest way to is install VoodooMonitor before making changes to dsdt, from there you should be able to see all usable step values. And the default values are only for my processor, Q9550. Everyone must change those to match the cpu that they are using.

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mitch_de
mitch_de
Posted
Posted
I'm not sure but if you take a look at ACPI_SMC_PlatformPlugin.kext there you can find StepDataDict for all models. Maybe some one can check if that has anything to do with speedstepping.

Yep, there are those SP1 (to SP4) data´s in the .plist of ACPI_SMC_PlatformPlugin.kext

Also shown in IOREGISTRYEXPLORER below the Pstates entries.

But that is an lonng list of hex code which i cant "read".

Perhaps in the future someone understand that SP1.

BEside that things we do in dsdt that .plist entrieswhich are used with the MacModell in smbios is very needful.

All together - dsdt + smbios MacModell + AppleIntelCPU + ACPI_SMC_PlatformPlugin(,plist) does the thing of CPU + GPU throttling.

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xopher
xopher
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Posted
Oh dear. Someone ripped out the bus latency and ditto partner. BIG ERROR

 

Please don't do that without handing over your address and bank account details, because that is how I smoked my CPU!

 

Do you mean these values? If so, I'm glad my CPU hasn't gone up in smoke yet. What does this value specify? No, what that Bus Latency mean in this case?

 

	    Method (_PSS, 0, NotSerialized)
	{
		Return (Package(0x04)
		{
			Package (0x06) { 0, 0, [color="#FF0000"]10[/color], [color="#FF0000"]10[/color], 0x81D, 0 },
			Package (0x06) { 0, 0, [color="#FF0000"]10[/color], [color="#FF0000"]10[/color], 0x471C, 1 },
			Package (0x06) { 0, 0, [color="#FF0000"]10[/color], [color="#FF0000"]10[/color], 0x71A, 2 },
			Package (0x06) { 0, 0, [color="#FF0000"]10[/color], [color="#FF0000"]10[/color], 0x616, 3 }
		})
	}

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mm67
mm67
Posted
Posted
Oh dear. Someone ripped out the bus latency and ditto partner. BIG ERROR

 

Please don't do that without handing over your address and bank account details, because that is how I smoked my CPU!

 

And you want to share this information now, after a month.

 

If that is the case then this should fix it.

dsdt_test.dsl.zip

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xopher
xopher
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Posted
Thanks anyway for the tip, now this feels really good, no lag at all anymore

 

Did you ever find the cause behind having to check 'Start up automatically after power failure', for a working wake-up (no restart)?

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asapreta
asapreta
Posted
Posted

I look at the amazing job you guys are doing but as I run my Q9550 @ 4.0 Ghz, I will need a lot of reading to understand how DSDT can/need to be modified to keep this setting and all other benefits it will bring to me.

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mm67
mm67
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Did you ever find the cause behind having to check 'Start up automatically after power failure', for a working wake-up (no restart)?

 

Havent't really looked into it, just made a quick test with my original dsdt that has nothing but the most basic fixes and it does the same. So the problem is not related to our fixes in dsdt.

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xopher
xopher
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Posted
I look at the amazing job you guys are doing but as I run my Q9550 @ 4.0 Ghz, I will need a lot of reading to understand how DSDT can/need to be modified to keep this setting and all other benefits it will bring to me.

 

Actually, you only need to change the voltages in the p-states specified, to simulate the voltage your CPU is running on now (when OC'd). mm67 has the same CPU as you, so the p-states are otherwise fine. Use eg. p-state calculator to generate the values you need.

 

It's this last bit you need to change (for each p-state):

				Package (0x06) { 0, 0, 10, 10, [color="#FF0000"]0x616[/color], 5 }

 

PS. I see you've got the UD3R, it needs a little device-id modification for LPC to run correctly, I've added it here to 'Device (LPCB)', see attachment. Other changes from mm67's DSDT is that I removed Device (PEGP), didn't work for me, and edited Device (HDEF) so it works again. Check the Q9550 stock P-state values from mm67's DSDT, I've entered values for my Q8400. If you don't want to use PSS at all, you can just leave it be, because it's commented out.

 

This should enable you to use the DSDT without any modifications, right experts? Just make sure to use the new Legacy kexts required because Devices SBUS and EC have been added. [LegacyACPI_SMC_PP.kext and LegacyAPGM.kext. Edit LegacyACPI if you don't use MacPro3,1 as identifier. Add your gfx-device id to LegacyAGPM.kext if it's not there.]

 

Please correct me if I said something funny, but hope this helped.

 

PPS. How are you OC'ing atm? FSB, multi? vcore? Air? Temps?

DSDT_EP45_UD3R_29.10.09.dsl.zip

Extensions_EP45_UD3R_27.10.09.zip

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Jimmy Jay
Jimmy Jay
Posted
Posted

Hi mm67,

 

I have similar setup to you and would like to do some testing, your posts make sense, but can you clarify the following for me?

 

LegacyACPI_SMC_PP.kext & LegacyAGPM.kext are you using these? if so, do you have them in /S/L/E or /Extra. if you are using these, can you please post a copy.

 

What custom kexts are you using in your extras folder?

i.e are you using sleepenabler and nullcpumanagement kexts?

 

Which model identifier are you using? MacPro3,1 or MacPro4,1

 

Thanks for all your input, wow! what a great subject and i'm totally blown away by how much in depth knowledge is so readily available here.

 

Totally Geeking out.

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cparm
cparm
Posted
Posted
Thanks anyway for the tip, now this feels really good, no lag at all anymore

 

if i got all information for my cpu, i mean this

 

								Package (0x06) { 0x0C5E, 0x40, 0x0A, 0x0A, 0x4922, 0x4922 },
							Package (0x06) { 0x0BB5, 0x3B, 0x0A, 0x0A, 0x0920, 0x0920 },
							Package (0x06) { 0x0B0F, 0x37, 0x0A, 0x0A, 0x481F, 0x481F },
							Package (0x06) { 0x0A68, 0x32, 0x0A, 0x0A, 0x081D, 0x081D },
							Package (0x06) { 0x09C2, 0x2E, 0x0A, 0x0A, 0x471C, 0x471C },
							Package (0x06) { 0x091B, 0x2A, 0x0A, 0x0A, 0x071A, 0x071A },
							Package (0x06) { 0x0875, 0x26, 0x0A, 0x0A, 0x4618, 0x4618 },
							Package (0x06) { 0x07CE, 0x22, 0x0A, 0x0A, 0x0616, 0x0616 }

 

is it safe to use them ?

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mitch_de
mitch_de
Posted
Posted

I would say if the mutipliers (from above code) : 6.0 ..9.5 * your FSB MHz = XYZ MHz didnt OC your CPU and also the VIDs (mVolts, hex16=1060mV - hex22=1250mV) are not much too low (no damage but KP/freezes) + not to high (overheat / damage over time) it should work.

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mm67
mm67
Posted
Posted
Hi mm67,

 

I have similar setup to you and would like to do some testing, your posts make sense, but can you clarify the following for me?

 

LegacyACPI_SMC_PP.kext & LegacyAGPM.kext are you using these? if so, do you have them in /S/L/E or /Extra. if you are using these, can you please post a copy.

 

What custom kexts are you using in your extras folder?

i.e are you using sleepenabler and nullcpumanagement kexts?

 

Which model identifier are you using? MacPro3,1 or MacPro4,1

 

Thanks for all your input, wow! what a great subject and i'm totally blown away by how much in depth knowledge is so readily available here.

 

Totally Geeking out.

 

You absolutely do not want nullcpupowermanagement or sleepenabler if you have speedstepping working. I use MacPro3,1 as model, my kexts are: Fakesmc, OpenHaltRestart, PlatformUUID and IoAhciBlockStorageInjector. You can add the Legacy kexts also but they are not essential, they are used for GPU throttling if you have a supported graphics card. And I don't use onboard audio, that's why there is no kext for that.

 

if i got all information for my cpu, i mean this

 

								Package (0x06) { 0x0C5E, 0x40, 0x0A, 0x0A, 0x4922, 0x4922 },
							Package (0x06) { 0x0BB5, 0x3B, 0x0A, 0x0A, 0x0920, 0x0920 },
							Package (0x06) { 0x0B0F, 0x37, 0x0A, 0x0A, 0x481F, 0x481F },
							Package (0x06) { 0x0A68, 0x32, 0x0A, 0x0A, 0x081D, 0x081D },
							Package (0x06) { 0x09C2, 0x2E, 0x0A, 0x0A, 0x471C, 0x471C },
							Package (0x06) { 0x091B, 0x2A, 0x0A, 0x0A, 0x071A, 0x071A },
							Package (0x06) { 0x0875, 0x26, 0x0A, 0x0A, 0x4618, 0x4618 },
							Package (0x06) { 0x07CE, 0x22, 0x0A, 0x0A, 0x0616, 0x0616 }

 

is it safe to use them ?

 

Those should be ok, power values look strange but I don't think it matters.

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blackosx
blackosx
Posted
Posted
Easiest way to is install VoodooMonitor before making changes to dsdt, from there you should be able to see all usable step values. And the default values are only for my processor, Q9550. Everyone must change those to match the cpu that they are using.

Thanks for you help mm67. I have VoodooMonitor now running, but how do I create the hex values to enter in to the package in DSDT from the information I now have? I have attached a screen grab of VoodooMonitor on my system.

post-331032-1256803369_thumb.png

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mm67
mm67
Posted
Posted
Thanks for you help mm67. I have VoodooMonitor now running, but how do I create the hex values to enter in to the package in DSDT from the information I now have? I have attached a screen grab of VoodooMonitor on my system.

 

That would make a table like this:

				Package (0x06) { 2660, 0, 10, 10, 0x0A1D, 0 },
			Package (0x06) { 2394, 0, 10, 10, 0x091C, 1 },
			Package (0x06) { 2128, 0, 10, 10, 0x081C, 2 },
			Package (0x06) { 1862, 0, 10, 10, 0x071B, 3 },
			Package (0x06) { 1596, 0, 10, 10, 0x61B8, 4 }

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blackosx
blackosx
Posted
Posted
That would make a table like this:

				Package (0x06) { 2660, 0, 10, 10, 0x0A1D, 0 },
			Package (0x06) { 2394, 0, 10, 10, 0x091C, 1 },
			Package (0x06) { 2128, 0, 10, 10, 0x081C, 2 },
			Package (0x06) { 1862, 0, 10, 10, 0x071B, 3 },
			Package (0x06) { 1596, 0, 10, 10, 0x61B8, 4 }

Great. So it's just a matter of copying the values... Thanks very much.

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