[/color][color=#666666]
Name (APSS, Package (0x10)[/color][color=#666666]
{[/color][color=#666666]
/* [u][b]Core Frequency (MHz)[/b][/u], [u][b]Power (milliwats)[/b][/u], [u][b]Latency (ms)[/b][/u], [u][b]Bus Latency (ms)[/b][/u], [b][u]Control[/u][/b], [u][b]Status[/b][/u] */[/color][color=#666666]
Package (0x06) { /* 3301 MHz */ 0xCE5, Zero, 10, 10, /* 37 */ 0x2500, 0x2500 }, //Max TS[/color][color=#666666]
Package (0x06) { /* 3300 MHz */ 0xCE4, Zero, 10, 10, /* 33 */ 0x2100, 0x2100 }, [/color][color=#666666]
Package (0x06) { /* 3200 MHz */ 0xC80, Zero, 10, 10, /* 32 */ 0x2000, 0x2000 }, [/color][color=#666666]
Package (0x06) { /* 3100 MHz */ 0xC1C, Zero, 10, 10, /* 31 */ 0x1F00, 0x1F00 }, [/color][color=#666666]
Package (0x06) { /* 3000 MHz */ 0xBB8, Zero, 10, 10, /* 30 */ 0x1E00, 0x1E00 }, [/color][color=#666666]
Package (0x06) { /* 2900 MHz */ 0xB54, Zero, 10, 10, /* 29 */ 0x1D00, 0x1D00 }, [/color][color=#666666]
Package (0x06) { /* 2800 MHz */ 0xAF0, Zero, 10, 10, /* 28 */ 0x1C00, 0x1C00 }, [/color][color=#666666]
Package (0x06) { /* 2700 MHz */ 0xA8C, Zero, 10, 10, /* 27 */ 0x1B00, 0x1B00 }, [/color][color=#666666]
Package (0x06) { /* 2600 MHz */ 0xA28, Zero, 10, 10, /* 26 */ 0x1A00, 0x1A00 }, [/color][color=#666666]
Package (0x06) { /* 2500 MHz */ 0x9C4, Zero, 10, 10, /* 25 */ 0x1900, 0x1900 }, [/color][color=#666666]
Package (0x06) { /* 2400 MHz */ 0x960, Zero, 10, 10, /* 24 */ 0x1800, 0x1800 }, [/color][color=#666666]
Package (0x06) { /* 2300 MHz */ 0x8FC, Zero, 10, 10, /* 23 */ 0x1700, 0x1700 },[/color][color=#666666]
Package (0x06) { /* 2200 MHz */ 0x898, Zero, 10, 10, /* 22 */ 0x1600, 0x1600 }, [/color][color=#666666]
Package (0x06) { /* 2100 MHz */ 0x834, Zero, 10, 10, /* 21 */ 0x1500, 0x1500 }, [/color][color=#666666]
Package (0x06) { /* 2000 MHz */ 0x7D0, Zero, 10, 10, /* 20 */ 0x1400, 0x1400 }, [/color][color=#666666]
Package (0x06) { /* 1600 MHz */ 0x640, Zero, 10, 10, /* 16 */ 0x1000, 0x1000 } // Lowest possible frequency[/color][color=#666666]
})[/color]
^Non compiled chunk of code from my docs to make you understand what each column does.^
[color=#666666]
Without the SSDT, the max TS (on i7 processors at least) is 2.1ghz, if you notice in my SSDT, my lowest freq is 800Mhz (based on the auto under clocking) it doesn't really affect it much, what does matter are the code lines above 2100MHz, those represent the missing states. Keeping them Cursive ( 1 2 3 4 5 ) will make it easier to reach the 5th state, but let's say you want to reach it harder you will make it like this (1 2 5)