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GA-EX58 and GA-X58A DSDT native power management modifications

d00d

By d00d,
in Power Management

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christosks
christosks
Posted
Posted

hi to all my system is

core i7 920 2.67

ga ex58 ud3r rev 1.6 bios f1

3gb ddr3

sapphire radeon hd 4870 2gb ddr5

wd 1tb

 

i am trying a hole mounth to put mac on my pc and the only thing ive done is to put iatkos v7 but with a lot of problems such as no graphic card, low memory, boot only with -x, and no sound

i have read a lot of how to but i think my motherboard is awful.

Can anyone please tell me if my system supports mac???

i read alot post from you in these section but i dont understand anything (sorry for that)

if anyone can help me feel free to do thanks in advance

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Lenya0
Lenya0
Posted
Posted

Please, can anybody give me a dsdt for Core i7 920, GA-X58A-UD3R? On the 22 page there is a dsdt for my processor and my motherboard, but i think that my system work not fast with this dsdt and i get kernel panic if my processor works on non-default frequency.

 

sorry, bad english

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morganpl
morganpl
Posted
Posted
hi to all my system is

core i7 920 2.67

ga ex58 ud3r rev 1.6 bios f1

3gb ddr3

sapphire radeon hd 4870 2gb ddr5

wd 1tb

 

i am trying a hole mounth to put mac on my pc and the only thing ive done is to put iatkos v7 but with a lot of problems such as no graphic card, low memory, boot only with -x, and no sound

i have read a lot of how to but i think my motherboard is awful.

Can anyone please tell me if my system supports mac???

i read alot post from you in these section but i dont understand anything (sorry for that)

if anyone can help me feel free to do thanks in advance

Hi, I would recommend>>  This<<thread according to instructions (Post 1) you should be a working stable system, the fun later in the DSDT file (d00d's post and all men thrust a good job here.) Remember that the system got up without a KP absolutely need to have two kexty NullCPUPowerManagement.kext and fakesmc.kext - digital_dreamer is best explained in his post, quote:

All that's really needed is a boot into OS X on this board is a disabler (or e Disabler.kext NullCPUPowerManagement.kext.), and Decryptor (ie fakesmc.kext or dsmos.kext) and graphics support. If your card is Apple makes them available, then it Should work OOTB or with EFI strings. That's it. Everything else are little fixes for reporting hardware, updated device ID, audio, network, etc.. In my case, the I also needed ATY_init.kext for ATI graphic card support, as without it I just got a video corruption and could not see the desktop.
and as D00d writes:
ElliottForceLegacyRTC.kext to not reset the CMOS

 

All you need is:

- Working OS> any distro (I recommend a try even Kalyway 10.5.7, iDeneb etc.)

- Purchased the Snow Leopard install disc and combo update from Apple's website,

- Digital_dreamer script KLIK HERE

- A lot of patience

Read, read and read again, learning gained by posing the first system will be useful in the future.

Sorry for my English!

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aschar1
aschar1
Posted
Posted

No need for a {censored} Distro. you can use my boot 132 cd to boot the Retail Snow DVD. Download it at http://www.mediafire.com/download.php?dum2ndzluog. Just burn it at slow speed. Then boot your PC from the CD -wait 30 seconds after you see the bootscreen - change the CD to Retail Snow DVD - wait 30 seconds again and then press F5.

(this boot CD needs USB Keyboard and Mouse, Sata DVD and HDD)

 

Also Digital Dreamers Script is not needed. I strongly recommend to get Contis Myhack installer Final 1.0 at sojugarden.com or kexts.com. This installs a modded chameleon bootloader (asere s version) without pciroot auto detect- the installer sets proper pciroot value and installs a legacy applertc32.kext to prevent cmos reset until you have your DSDT patched.

 

Also it installs pfix script to fix permissions and rebuilds caches, sets owner of root to root - to prevent kextd issues. After installing kexts (manually put them in /System/Library/Extensions or /Extra/Extensions - just open terminal.app and type pfix.

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morganpl
morganpl
Posted
Posted

------------------------ SORRY OT! --------------------------

No need for a {censored} Distro....

 

Of course, you're right but this is his first installation, and it is highly likely that it kills a few times before you put the system at the end of a stable (though planned fun with  DSDT). Distro I suggested that in case of damage to the system does not need to install it from scratch. How any of this will begin at the beginning has a lot to learn. Okay, stop because it serves no useful purpose.

 

------------------------ SORRY OT! --------------------------

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zoob
zoob
Posted
Posted
UPDATE!

EX58-EXTREME (F12)

this bios has patched Facp. (credits for Facp go to BSoD)

No need for any restart fixes or evoreboot and similar!

Test and write your feedback -_-

EX58v2.F12.zip

 

After successfully flashing my EP45-UD3L with Catri's BIOS, I'm going to give yours a try.

I have an EX58-UD5 which is the same board minus the branding, so this will be interesting :D

 

If you do have time, I'd be very interested in your guide demonstrating how we can modify our own Gigabyte BIOS tables.

 

Thanks

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George Ramos
George Ramos
Posted
Posted
After successfully flashing my EP45-UD3L with Catri's BIOS, I'm going to give yours a try.

I have an EX58-UD5 which is the same board minus the branding, so this will be interesting -_-

 

If you do have time, I'd be very interested in your guide demonstrating how we can modify our own Gigabyte BIOS tables.

 

Thanks

 

[GUIDE] Gigabyte GA-EX58-UD3R 10.6.2 Snow Leopard (Empire EFI), *WORK IN PROGRESS* Collection of Guides and needed tools

http://www.insanelymac.com/forum/index.php?showtopic=200183

 

 

 

 

 

[GUIDE]- Gigabyte GA-EX58-UD3R/ Core i7 920 / iAtkos v7

 

http://www.insanelymac.com/forum/index.php?showtopic=181286

 

 

 

 

(GUIDE) Gigabyte GA EX58 UD3R for Snow Leopard using (Empire EFI CD)

 

http://www.infinitemac.com/f57/guide-gigabyte-ga-ex58-ud3r-for-snow-leopard-t4892

 

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zoob
zoob
Posted
Posted

Well, I crossflashed my EX58-UD5 to the EX58-EXTREME, then flashed to x.di's BIOS.

 

Took a bit of wrangling but I managed to get it working:

 

Had to:

0. Initially boot with flags -v -f -F PciRoot=1 PCIRootUID=1 GraphicsEnabler=Yes

1. Remove my /S/L/Caches/com.apple.kext.caches/Startup/Extensions.mkext

2. Rewrite my /E/com.apple.Boot.plist

<?xml version="1.0" encoding="UTF-8"?>
<!DOCTYPE plist PUBLIC "-//Apple Computer//DTD PLIST 1.0//EN" "http://www.apple.com/DTDs/PropertyList-1.0.dtd">
<plist version="1.0">
<dict>
<key>Kernel</key>
<string>mach_kernel</string>
<key>Kernel Flags</key>
<string></string>
<key>PciRoot</key>
<string>1</string>
<key>Timeout</key>
<string>3</string>
<key>GraphicsEnabler</key>
<string>Yes</string>
</dict>
</plist>

3. Delete /Library/Preferences/com.apple.keyboardtype.plist to redetect my keyboard

 

Now to fix my EFI Strings so that I can get my dual GTX285 working again.

 

Just like with the catri method, I have only:

fakesmc.kext, LegacyHDA.kext, JMicronATA.kext

 

Left to tweak: Orange drive icons, Speed Step, Autosleep still seems to be broken, but could be due to the jmicron(?)

 

EDIT:

Looks like the bottom NIC port is broken, even though it detects in SL Network preferences pane.

EDIT2:

Fixed the NIC with the CMOS clear trick in post 1

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peach-os
peach-os
Posted
Posted
Hey guys,

 

I don't have this option in Energy Saver: "Start up automatically after power failure"

 

What can I do to have it back in Energy Saver?

 

Thanks

 

AppleLPC.kext is not loaded. you can solve it with the correct ID in DSDT or editing the plist file in the kext.

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aschar1
aschar1
Posted
Posted

Here is the Scope _PR section with C-States and P-states for a Core i7 930 (use the attached file to copy and paste from). 930 has 11 P-states (920 has 10). C-states are the same.

Processor (\_PR.CPU0, 0x00, 0x00000410, 0x06)
       {
           Name (_CST, Package (0x07)
           {
               0x06, 
               Package (0x04)
               {
                   ResourceTemplate ()
                   {
                       Register (FFixedHW, 
                           0x01,               // Bit Width
                           0x02,               // Bit Offset
                           0x0000000000000000, // Address
                           0x01,               // Access Size
                           )
                   }, 

                   One, 
                   One, 
                   0x03E8
               }, 

               Package (0x04)
               {
                   ResourceTemplate ()
                   {
                       Register (FFixedHW, 
                           0x01,               // Bit Width
                           0x02,               // Bit Offset
                           0x0000000000000010, // Address
                           0x01,               // Access Size
                           )
                   }, 

                   0x02, 
                   0x40, 
                   0x01F4
               }, 

               Package (0x04)
               {
                   ResourceTemplate ()
                   {
                       Register (FFixedHW, 
                           0x01,               // Bit Width
                           0x02,               // Bit Offset
                           0x0000000000000020, // Address
                           0x01,               // Access Size
                           )
                   }, 

                   0x03, 
                   0x60, 
                   0x015E
               }, 

               Package (0x04)
               {
                   ResourceTemplate ()
                   {
                       Register (FFixedHW, 
                           0x00,               // Bit Width
                           0x00,               // Bit Offset
                           0x0000000000000000, // Address
                           ,)
                   }, 

                   One, 
                   One, 
                   0x03E8
               }, 

               Package (0x04)
               {
                   ResourceTemplate ()
                   {
                       Register (SystemIO, 
                           0x08,               // Bit Width
                           0x00,               // Bit Offset
                           0x0000000000000414, // Address
                           ,)
                   }, 

                   0x02, 
                   0x40, 
                   0x01F4
               }, 

               Package (0x04)
               {
                   ResourceTemplate ()
                   {
                       Register (SystemIO, 
                           0x08,               // Bit Width
                           0x00,               // Bit Offset
                           0x0000000000000415, // Address
                           ,)
                   }, 

                   0x03, 
                   0x60, 
                   0x015E
               }
           })
           Name (_PCT, Package (0x02)
           {
               ResourceTemplate ()
               {
                   Register (FFixedHW, 
                       0x40,               // Bit Width
                       0x00,               // Bit Offset
                       0x0000000000000199, // Address
                       ,)
               }, 

               ResourceTemplate ()
               {
                   Register (FFixedHW, 
                       0x10,               // Bit Width
                       0x00,               // Bit Offset
                       0x0000000000000198, // Address
                       ,)
               }
           })
           Name (_PSS, Package (0x0B)
           {
               Package (0x06)
               {
                   0x0AEA, 
                   0x0001FBD0, 
                   0x0A, 
                   0x0A, 
                   0x16, 
                   0x16
               }, 

               Package (0x06)
               {
                   0x0AE9, 
                   0x0001FBD0, 
                   0x0A, 
                   0x0A, 
                   0x15, 
                   0x15
               }, 

               Package (0x06)
               {
                   0x0A64, 
                   0x0001A9C8, 
                   0x0A, 
                   0x0A, 
                   0x14, 
                   0x14
               }, 

               Package (0x06)
               {
                   0x09DF, 
                   0x000186A0, 
                   0x0A, 
                   0x0A, 
                   0x13, 
                   0x13
               }, 

               Package (0x06)
               {
                   0x095A, 
                   0x00014438, 
                   0x0A, 
                   0x0A, 
                   0x12, 
                   0x12
               }, 

               Package (0x06)
               {
                   0x08D5, 
                   0x000128E0, 
                   0x0A, 
                   0x0A, 
                   0x11, 
                   0x11
               }, 

               Package (0x06)
               {
                   0x0850, 
                   0xF618, 
                   0x0A, 
                   0x0A, 
                   0x10, 
                   0x10
               }, 

               Package (0x06)
               {
                   0x07CB, 
                   0xDEA8, 
                   0x0A, 
                   0x0A, 
                   0x0F, 
                   0x0F
               }, 
			Package (0x06)
               {
                   0x0746, 
                   0xCB20, 
                   0x0A, 
                   0x0A, 
                   0x0E, 
                   0x0E
               }, 
               Package (0x06)
               {
                   0x06C1, 
                   0xA7F8, 
                   0x0A, 
                   0x0A, 
                   0x0D, 
                   0x0D
               }, 

               Package (0x06)
               {
                   0x063C, 
                   0x9C40, 
                   0x0A, 
                   0x0A, 
                   0x0C, 
                   0x0C
               }
           })
           Method (_PPC, 0, NotSerialized)
           {
               Return (Zero)
           }
       }

       Processor (\_PR.CPU1, 0x01, 0x00000410, 0x06)
       {
           Alias (\_PR.CPU0._CST, _CST)
           Alias (\_PR.CPU0._PCT, _PCT)
           Alias (\_PR.CPU0._PSS, _PSS)
           Alias (\_PR.CPU0._PPC, _PPC)
       }

       Processor (\_PR.CPU2, 0x02, 0x00000410, 0x06)
       {
           Alias (\_PR.CPU0._CST, _CST)
           Alias (\_PR.CPU0._PCT, _PCT)
           Alias (\_PR.CPU0._PSS, _PSS)
           Alias (\_PR.CPU0._PPC, _PPC)
       }

       Processor (\_PR.CPU3, 0x03, 0x00000410, 0x06)
       {
           Alias (\_PR.CPU0._CST, _CST)
           Alias (\_PR.CPU0._PCT, _PCT)
           Alias (\_PR.CPU0._PSS, _PSS)
           Alias (\_PR.CPU0._PPC, _PPC)
       }

       Processor (\_PR.CPU4, 0x04, 0x00000410, 0x06)
       {
           Alias (\_PR.CPU0._CST, _CST)
           Alias (\_PR.CPU0._PCT, _PCT)
           Alias (\_PR.CPU0._PSS, _PSS)
           Alias (\_PR.CPU0._PPC, _PPC)
       }

       Processor (\_PR.CPU5, 0x05, 0x00000410, 0x06)
       {
           Alias (\_PR.CPU0._CST, _CST)
           Alias (\_PR.CPU0._PCT, _PCT)
           Alias (\_PR.CPU0._PSS, _PSS)
           Alias (\_PR.CPU0._PPC, _PPC)
       }

       Processor (\_PR.CPU6, 0x06, 0x00000410, 0x06)
       {
           Alias (\_PR.CPU0._CST, _CST)
           Alias (\_PR.CPU0._PCT, _PCT)
           Alias (\_PR.CPU0._PSS, _PSS)
           Alias (\_PR.CPU0._PPC, _PPC)
       }

       Processor (\_PR.CPU7, 0x07, 0x00000410, 0x06)
       {
           Alias (\_PR.CPU0._CST, _CST)
           Alias (\_PR.CPU0._PCT, _PCT)
           Alias (\_PR.CPU0._PSS, _PSS)
           Alias (\_PR.CPU0._PPC, _PPC)
       }

       Processor (\_PR.CPU8, 0x08, 0x00000410, 0x06) {}
       Processor (\_PR.CPU9, 0x09, 0x00000410, 0x06) {}
       Processor (\_PR.CPUA, 0x0A, 0x00000410, 0x06) {}
       Processor (\_PR.CPUB, 0x0B, 0x00000410, 0x06) {}
       Processor (\_PR.CPUC, 0x0C, 0x00000410, 0x06) {}
       Processor (\_PR.CPUD, 0x0D, 0x00000410, 0x06) {}
       Processor (\_PR.CPUE, 0x0E, 0x00000410, 0x06) {}
       Processor (\_PR.CPUF, 0x0F, 0x00000410, 0x06) {}
   }

core_i7_930.dsl.zip

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Rankrotten
Rankrotten
Posted
Posted

That's great, aschar1. I'll paste that into my DSDT shortly and see if I can do without NullCPUPowerManagement.kext for my i7 930.

 

Currently using in extras:

fakesmc

IOAHCIBlockStrageInjector

LegacyHDA

NullCPUPowerManagement

OpenHaltRestart

SleepEnabler

 

Let's see what I can do without!

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Rankrotten
Rankrotten
Posted
Posted

Update:

 

I entered aschar1's i7 930 C-States and P-states into the SCOPE_PR section of my DSDT.

 

Updated the IOPlatformPluginFamily.kext with modified MacPro4_1 plist

 

Added

<key>DropSSDT</key>

<string>yes</string>

to com.apple.boot.plist

 

Smbios and fakesmc already modified to MacPro4,1 identifier.

 

Removed NullCPU from extra...

 

Now it KPs on boot when it tries to load AppleIntelCPUPowerManagement.kext

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d00d
d00d
Posted
  • Author
Posted
Update:

 

I entered aschar1's i7 930 C-States and P-states into the SCOPE_PR section of my DSDT.

 

Updated the IOPlatformPluginFamily.kext with modified MacPro4_1 plist

 

Added

<key>DropSSDT</key>

<string>yes</string>

to com.apple.boot.plist

 

Smbios and fakesmc already modified to MacPro4,1 identifier.

 

Removed NullCPU from extra...

 

Now it KPs on boot when it tries to load AppleIntelCPUPowerManagement.kext

If that's the only modification you've made to your DSDT, you're missing a few steps.
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MasterLen
MasterLen
Posted
Posted
AppleLPC.kext is not loaded. you can solve it with the correct ID in DSDT or editing the plist file in the kext.

 

AppleLPC.kext is already loaded!

 

I am using dooD's DSDT.aml

I am using native power management, without NullCPU.kext!

 

Any ideas guys?

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elitee
elitee
Posted
Posted
Update:

 

I entered aschar1's i7 930 C-States and P-states into the SCOPE_PR section of my DSDT.

 

Removed NullCPU from extra...

 

Now it KPs on boot when it tries to load AppleIntelCPUPowerManagement.kext

 

I updated my DSDT with his C/P-states, and it works fine for me! Thanks aschar ;)

 

Edit: Did you just copy and paste from insanelymac? I often forget, but sometimes it picks up garbage, and when you tried to edit it in, you could've made a mistake?

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digital_dreamer
digital_dreamer
Posted
Posted

d00d,

I'm not going by experience, but by comments I've run into.

 

Might there be any insights on Firewire in SL and how it may be fixed in DSDT? FW generally works, but those running pro audio generally have issues with FW defaulting to full-secure on boot and having audio glitches. In other cases, booting into 64-bit mode, causes System Profiler to respond: "Unable to list FireWire devices." I recommended that they check their HPET settings in the BIOS.

 

Some have said the FW is not getting the IRQ in DSDT. See here.

 

Anyhow, wonder what you may think.

 

best regards,

MAJ

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ANARCHiNTOSH
ANARCHiNTOSH
Posted
Posted
d00d,

 

could you share your edited MacPro4_1.plist (for 10.6.3) ?

i would like to try and put it on my unit.

 

cheers

there are instructions in the first post for how to edit it. its as easy as copy/paste from something,

change two words and rebuild kextcaches

 

For some reason Apple doesn't enable speed step in their MacPro4_1.plist, even though the hardware supports it.

Save a copy of /System/Library/Extensions/IOPlatformPluginFamily.kext, add the PLimitDict and StepDataDict sections from /System/Library/Extensions/IOPlatformPluginFamily.kext/Contents/PlugIns/ACPI_SMC_PlatformPlugin.kext/Contents/Resources/MacPro3_1.plist to the same location in MacPro4_1.plist, and change the two key values from MacPro3,1 to MacPro4,1.

ive been considering making a kext to do this automaticly. like the MP41SpeedStepFix.kext but new.

does apple update the speedstep code for the 3_1.plist? and is this why you say to copy from that, rather than posting the actual code?

simple injector kexts that inject fixed code are redonkulously easy to make

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d00d
d00d
Posted
  • Author
Posted
d00d,

I'm not going by experience, but by comments I've run into.

 

Might there be any insights on Firewire in SL and how it may be fixed in DSDT? FW generally works, but those running pro audio generally have issues with FW defaulting to full-secure on boot and having audio glitches. In other cases, booting into 64-bit mode, causes System Profiler to respond: "Unable to list FireWire devices." I recommended that they check their HPET settings in the BIOS.

 

Some have said the FW is not getting the IRQ in DSDT. See here.

 

Anyhow, wonder what you may think.

 

best regards,

MAJ

I've never had FW problems, 64 bit System Profiler error, or the floating IRQ issue, but x.di has a solution a few pages back and there was a detailed discussion before that.

It may be that removing the IRQ from the PIC device prevents me from having the issue.

 

there are instructions in the first post for how to edit it. its as easy as copy/paste from something,

change two words and rebuild kextcaches

 

 

ive been considering making a kext to do this automaticly. like the MP41SpeedStepFix.kext but new.

does apple update the speedstep code for the 3_1.plist? and is this why you say to copy from that, rather than posting the actual code?

simple injector kexts that inject fixed code are redonkulously easy to make

Yes, Apple made changes in 10.6.3 that required a redo of MacPro4_1.plist from the updated MacPro3_1.plist's speedstep.

 

 

Here is a SSDT table from an i7-930, not overclocked, no DSDT, only fakesmc and NullCPU and Elliott's kext to prevent CMOS reset. If you still need it! Added .txt at the end of the file to upload.
thanks

 

 

Here is the Scope _PR section with C-States and P-states for a Core i7 930 (use the attached file to copy and paste from). 930 has 11 P-states (920 has 10). C-states are the same.

Processor (\_PR.CPU0, 0x00, 0x00000410, 0x06)
       {
           Name (_CST, Package (0x07)
           {
               0x06, 
               Package (0x04)
               {
                   ResourceTemplate ()
                   {
                       Register (FFixedHW, 
                           0x01,               // Bit Width
                           0x02,               // Bit Offset
                           0x0000000000000000, // Address
                           0x01,               // Access Size
                           )
                   }, 

                   One, 
                   One, 
                   0x03E8
               }, 

               Package (0x04)
               {
                   ResourceTemplate ()
                   {
                       Register (FFixedHW, 
                           0x01,               // Bit Width
                           0x02,               // Bit Offset
                           0x0000000000000010, // Address
                           0x01,               // Access Size
                           )
                   }, 

                   0x02, 
                   0x40, 
                   0x01F4
               }, 

               Package (0x04)
               {
                   ResourceTemplate ()
                   {
                       Register (FFixedHW, 
                           0x01,               // Bit Width
                           0x02,               // Bit Offset
                           0x0000000000000020, // Address
                           0x01,               // Access Size
                           )
                   }, 

                   0x03, 
                   0x60, 
                   0x015E
               }, 

               Package (0x04)
               {
                   ResourceTemplate ()
                   {
                       Register (FFixedHW, 
                           0x00,               // Bit Width
                           0x00,               // Bit Offset
                           0x0000000000000000, // Address
                           ,)
                   }, 

                   One, 
                   One, 
                   0x03E8
               }, 

               Package (0x04)
               {
                   ResourceTemplate ()
                   {
                       Register (SystemIO, 
                           0x08,               // Bit Width
                           0x00,               // Bit Offset
                           0x0000000000000414, // Address
                           ,)
                   }, 

                   0x02, 
                   0x40, 
                   0x01F4
               }, 

               Package (0x04)
               {
                   ResourceTemplate ()
                   {
                       Register (SystemIO, 
                           0x08,               // Bit Width
                           0x00,               // Bit Offset
                           0x0000000000000415, // Address
                           ,)
                   }, 

                   0x03, 
                   0x60, 
                   0x015E
               }
           })
           Name (_PCT, Package (0x02)
           {
               ResourceTemplate ()
               {
                   Register (FFixedHW, 
                       0x40,               // Bit Width
                       0x00,               // Bit Offset
                       0x0000000000000199, // Address
                       ,)
               }, 

               ResourceTemplate ()
               {
                   Register (FFixedHW, 
                       0x10,               // Bit Width
                       0x00,               // Bit Offset
                       0x0000000000000198, // Address
                       ,)
               }
           })
           Name (_PSS, Package (0x0B)
           {
               Package (0x06)
               {
                   0x0AEA, 
                   0x0001FBD0, 
                   0x0A, 
                   0x0A, 
                   0x16, 
                   0x16
               }, 

               Package (0x06)
               {
                   0x0AE9, 
                   0x0001FBD0, 
                   0x0A, 
                   0x0A, 
                   0x15, 
                   0x15
               }, 

               Package (0x06)
               {
                   0x0A64, 
                   0x0001A9C8, 
                   0x0A, 
                   0x0A, 
                   0x14, 
                   0x14
               }, 

               Package (0x06)
               {
                   0x09DF, 
                   0x000186A0, 
                   0x0A, 
                   0x0A, 
                   0x13, 
                   0x13
               }, 

               Package (0x06)
               {
                   0x095A, 
                   0x00014438, 
                   0x0A, 
                   0x0A, 
                   0x12, 
                   0x12
               }, 

               Package (0x06)
               {
                   0x08D5, 
                   0x000128E0, 
                   0x0A, 
                   0x0A, 
                   0x11, 
                   0x11
               }, 

               Package (0x06)
               {
                   0x0850, 
                   0xF618, 
                   0x0A, 
                   0x0A, 
                   0x10, 
                   0x10
               }, 

               Package (0x06)
               {
                   0x07CB, 
                   0xDEA8, 
                   0x0A, 
                   0x0A, 
                   0x0F, 
                   0x0F
               }, 
			Package (0x06)
               {
                   0x0746, 
                   0xCB20, 
                   0x0A, 
                   0x0A, 
                   0x0E, 
                   0x0E
               }, 
               Package (0x06)
               {
                   0x06C1, 
                   0xA7F8, 
                   0x0A, 
                   0x0A, 
                   0x0D, 
                   0x0D
               }, 

               Package (0x06)
               {
                   0x063C, 
                   0x9C40, 
                   0x0A, 
                   0x0A, 
                   0x0C, 
                   0x0C
               }
           })
           Method (_PPC, 0, NotSerialized)
           {
               Return (Zero)
           }
       }

       Processor (\_PR.CPU1, 0x01, 0x00000410, 0x06)
       {
           Alias (\_PR.CPU0._CST, _CST)
           Alias (\_PR.CPU0._PCT, _PCT)
           Alias (\_PR.CPU0._PSS, _PSS)
           Alias (\_PR.CPU0._PPC, _PPC)
       }

       Processor (\_PR.CPU2, 0x02, 0x00000410, 0x06)
       {
           Alias (\_PR.CPU0._CST, _CST)
           Alias (\_PR.CPU0._PCT, _PCT)
           Alias (\_PR.CPU0._PSS, _PSS)
           Alias (\_PR.CPU0._PPC, _PPC)
       }

       Processor (\_PR.CPU3, 0x03, 0x00000410, 0x06)
       {
           Alias (\_PR.CPU0._CST, _CST)
           Alias (\_PR.CPU0._PCT, _PCT)
           Alias (\_PR.CPU0._PSS, _PSS)
           Alias (\_PR.CPU0._PPC, _PPC)
       }

       Processor (\_PR.CPU4, 0x04, 0x00000410, 0x06)
       {
           Alias (\_PR.CPU0._CST, _CST)
           Alias (\_PR.CPU0._PCT, _PCT)
           Alias (\_PR.CPU0._PSS, _PSS)
           Alias (\_PR.CPU0._PPC, _PPC)
       }

       Processor (\_PR.CPU5, 0x05, 0x00000410, 0x06)
       {
           Alias (\_PR.CPU0._CST, _CST)
           Alias (\_PR.CPU0._PCT, _PCT)
           Alias (\_PR.CPU0._PSS, _PSS)
           Alias (\_PR.CPU0._PPC, _PPC)
       }

       Processor (\_PR.CPU6, 0x06, 0x00000410, 0x06)
       {
           Alias (\_PR.CPU0._CST, _CST)
           Alias (\_PR.CPU0._PCT, _PCT)
           Alias (\_PR.CPU0._PSS, _PSS)
           Alias (\_PR.CPU0._PPC, _PPC)
       }

       Processor (\_PR.CPU7, 0x07, 0x00000410, 0x06)
       {
           Alias (\_PR.CPU0._CST, _CST)
           Alias (\_PR.CPU0._PCT, _PCT)
           Alias (\_PR.CPU0._PSS, _PSS)
           Alias (\_PR.CPU0._PPC, _PPC)
       }

       Processor (\_PR.CPU8, 0x08, 0x00000410, 0x06) {}
       Processor (\_PR.CPU9, 0x09, 0x00000410, 0x06) {}
       Processor (\_PR.CPUA, 0x0A, 0x00000410, 0x06) {}
       Processor (\_PR.CPUB, 0x0B, 0x00000410, 0x06) {}
       Processor (\_PR.CPUC, 0x0C, 0x00000410, 0x06) {}
       Processor (\_PR.CPUD, 0x0D, 0x00000410, 0x06) {}
       Processor (\_PR.CPUE, 0x0E, 0x00000410, 0x06) {}
       Processor (\_PR.CPUF, 0x0F, 0x00000410, 0x06) {}
   }

thanks
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Windows04
Windows04
Posted
Posted

Allright, I have been searching for this for days now, but I just can't find the answer.

 

I have a RAID setup (striped) consisting of 2 drives. This worked fine (with kexts in Extra folder) until I wanted to use this (primarily for the Turbo boost). When I patch my DSDT (there are no errors) and I install it to the Boot OSX drives (helper drives of my RAID) in /Extra, my system panics saying: "Unable to find driver for this platform: ACPI (1389)".

 

Does anybody knows how I can fix this? It seems to me that the drives from Extra are loaded (seeing at the bootloader log), but the system won't load the extensions.mkext from the Startup Cache of Snow Leopard :s...

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