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GA-EP45-UD3P / Core 2 Quad / 9800gtx Experience  

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  1. 1. Are you Booting SL

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You guys who haven't already switched to Cartri bios, are missing out!

 

Don't waste your time with Lifehacker v3 , enjoy lower Temps, working p-states without voodoopowermini ! and dont need to deal with DSDT, smbios.plist, com.apple.Boot.plist & Extensions.mkext anymore.

 

I tried the Catri v0.8 bios briefly this morning but reverted to my previous setup pretty quickly. I had two issues. The first, while probably fixable without too much work, was that my graphics card wasn't detected properly so I was stuck with a single bad resolution. The second was the lack of working c-states. (There was a message in the verbose boot list and my machine was still running ~50C @ idle.) Without c-states my computer actually runs hotter at low loads (~5-6C) than with with the NullCPUPowerManagement kext.

 

On a side note, since we're not supposed to enter bios until the machine is done rebooting, it may necessary to disconnect any other bootable drives beforehand or you won't go to the Chameoleon bootloader . In my case, I have a win7 drive that I had to disconnect after the first reboot. Of course, I may be misinterpreting things, since it may mean that when it went to my Win7 bootloader it was ready for bios setup.

I tried the Catri v0.8 bios briefly this morning but reverted to my previous setup pretty quickly.

 

 

JTG78, I have the same eVGA GPU and EP45-UD3P without problem. you should post on the Cartri thread to get more answers. I'll try to help you, what do you meen reverted back? did you keep the Cartri bios?

JTG78, I have the same eVGA GPU and EP45-UD3P without problem. you should post on the Cartri thread to get more answers. I'll try to help you, what do you mean reverted back? did you keep the Cartri bios?

 

 

It possible that my problem was caused by the booting issue I mentioned, or it could be that I was using Chameleon RC4 instead of the RC5 prerelease.

 

In any case, for me the main issue is the higher idle temps due to the lack of functioning c-states, which is why I reverted.

 

And by reverted, I mean I set my Extras folder back the the previous setup and reinstalled Gigabyte's FE bios.

And by reverted, I mean I set my Extras folder back the the previous setup and reinstalled Gigabyte's FE bios.

 

 

You could use your previous Extra folder with cartri,no need to revert back. did you run the Chameleon package that came with the bios before upgrade?

 

Your heat issue shouldn't be because of c-states, in bios what are your cpu temps?

You could use your previous Extra folder with cartri,no need to revert back. did you run the Chameleon package that came with the bios before upgrade?

 

Your heat issue shouldn't be because of c-states, in bios what are your cpu temps?

 

I was using my previous Extra folder with Catri, however, I had stripped out the unneeded kexts (after I verified it was booting with dsdt=catri). It wasn't until I found the c-states weren't working that I decided to revert.

 

My bios CPU temp (when the computer is warmed up) is about 44C. This is what I'm able to get with NullCPUPowerMangement. However, with the Catri bios or VoodooPowerMini my system runs about 6-7C higher at idle. (Which I'm led to understand is due to the lack of working c-states.)

 

I did not use the included Chameleon package. I assumed that since the installation instructions mentioned RC4, and that since I had RC4 installed, I was fine.

 

Although, from what I understand, you're saying I could have just left the bios as is and used my dsdt file and desired kexts? I realize that now, but I wasn't really thinking at the time.

Is CPU Thermal Monitor enabled ?

 

 

thanks for replay....

but thermal monitor is enable.... anyway solution for sure is simple I just cant fint it, everything seems to be ok and its not working...

any other suggestions?

I did not use the included Chameleon package. I assumed that since the installation instructions mentioned RC4, and that since I had RC4 installed, I was fine.

 

Thats what went wrong, Chameleon RC5 that came with is crucial for bios 0.8 to work

Backup / remove Extra from HD, instal Chameleon RC5 0.8 edition, then flash bios.

 

 

 

thanks for replay....

but thermal monitor is enable.... anyway solution for sure is simple I just cant fint it, everything seems to be ok and its not working...

any other suggestions?

 

for c-state/p-state to work cartri Bios comunicates to OSX through Chameleon 0.8 RC5 build

I've managed to find my p-states using pstatechanger, unfortunately, I'm running into a roadblock when it comes to AppleLPC. I'm simply unable to find the ISA device - mostly because I couldn't get lspci tools working. I tried installing it from OS86 tools, but after rebooting I couldn't get it to work from the command line. Unfortunately, the instructions are a bit lacking. (Not to mention the trouble in finding where to get lspci tools in the first place.)

 

I'm taking a break from this for a few days. Frankly, I'm shuddering to think of the trouble I'll have to go through to get c-states working. Until I'm able to get the LPC information I'm back to running with the power management disabled since my computer runs cooler (at idle anyway) in this state. Since I think it was put on too thickly, I'll probably try replacing my thermal paste first to see if that improves the CPU temps.

 

I was also considering a getting a better CPU cooler, but since the ones I looked at required me to remove my motherboard to install a mounting/support bracket thing on the back, I think I'll hold off on that. I really don't want to have to deal with removing and reinstalling the motherboard.

 

You can actually get working power management very easily since there are many users with same hardware on that Vanilla speedstepping thread. All you really need is these changes.

 

This:

    Scope (\_PR)
   {
       Processor (\_PR.CPU0, 0x00, 0x00000410, 0x06) {}
       Processor (\_PR.CPU1, 0x01, 0x00000410, 0x06) {}
       Processor (\_PR.CPU2, 0x02, 0x00000410, 0x06) {}
       Processor (\_PR.CPU3, 0x03, 0x00000410, 0x06) {}
   }

 

should be changed to look like this:

    Scope (_PR)
   {
       Name (PSS, Package (0x06)   // <--- Number of P-States as counted below
       {
           Package (0x06){Zero,Zero,0x0A,0x0A,0x4820,Zero},
           Package (0x06){Zero,Zero,0x0A,0x0A,0x081E,One},
           Package (0x06){Zero,Zero,0x0A,0x0A,0x471C,0x02},
           Package (0x06){Zero,Zero,0x0A,0x0A,0x071A,0x03},
           Package (0x06){Zero,Zero,0x0A,0x0A,0x4618,0x04},
           Package (0x06){Zero,Zero,0x0A,0x0A,0x0616,0x05}
       })

       Name (CST, Package (0x02)
       {
           0x01,   //<--number of C-States
           Package (0x4){ResourceTemplate (){Register (FFixedHW,0x01,0x02,0x000,0x1,)},One,One,0x3E8},     //<--C1E
       })

       Processor (CPU0, 0x00, 0x00000410, 0x06)
       {
           Alias (PSS, _PSS)
           Alias (CST, _CST)
       }

       Processor (CPU1, 0x01, 0x00000410, 0x06)
       {
           Alias (PSS, _PSS)
           Alias (CST, _CST)
       }

       Processor (CPU2, 0x02, 0x00000410, 0x06)
       {
           Alias (PSS, _PSS)
           Alias (CST, _CST)
       }

       Processor (CPU3, 0x03, 0x00000410, 0x06)
       {
           Alias (PSS, _PSS)
           Alias (CST, _CST)
       }
   }  

 

And this:

            Device (PX40)
           {
               Name (_ADR, 0x001F0000)
               OperationRegion (PREV, PCI_Config, 0x08, 0x01)
               Scope (\)
               {
                   Field (\_SB.PCI0.PX40.PREV, ByteAcc, NoLock, Preserve)
                   {
                       REV0,   8
                   }
               }

 

should look like this:

            Device (PX40)
           {
               Name (_ADR, 0x001F0000)
               Method (_DSM, 4, NotSerialized)                     // <--Apple LPC device Fix to enable C-states
               {                                                   // (enables vanilla power management)
                   Store (Package (0x02)
                       {
                           "device-id", 
                           Buffer (0x04){0x18, 0x3A, 0x00, 0x00}
                       }, Local0)
                   DTGP (Arg0, Arg1, Arg2, Arg3, RefOf (Local0))
                   Return (Local0)
               }                                                   // <--End Apple LPC device fix

               OperationRegion (PREV, PCI_Config, 0x08, 0x01)
               Scope (\)
               {
                   Field (\_SB.PCI0.PX40.PREV, ByteAcc, NoLock, Preserve)
                   {
                       REV0,   8
                   }
               }

 

Just replace the 6 P-states with your own ones and that's it, speedstepping and C-states. Actually just C1E since I don't know which version of Q9550 you have, if you have the newer E0 stepping version then C2E and C4E are also possible. C1E alone should be good enough though, with lower C-states you might get 1-2 degrees lower temps but that's not really important in my opinion.

You can actually get working power management very easily since there are many users with same hardware on that Vanilla speedstepping thread. All you really need is these changes.

 

...

 

Just replace the 6 P-states with your own ones and that's it, speedstepping and C-states. Actually just C1E since I don't know which version of Q9550 you have, if you have the newer E0 stepping version then C2E and C4E are also possible. C1E alone should be good enough though, with lower C-states you might get 1-2 degrees lower temps but that's not really important in my opinion.

 

Thanks! I'll try later once I reacquire my p-states. (I found out that I didn't record them properly and now I'm missing one - so now I need to replace the needed kexts and do it again.) They're pretty similar to yours, but I thing my VID numbers were a bit different.

 

And for reference, my CPU is the BX80569Q550 12MB cache version that's currently on Newegg for $280 (Which is crazy, because they were selling it for $220 last fall - prices are supposed to go down, not up. I think if I were to buy the same rig now as I did then I'd be paying another $150 +- 50.) I think I have at least C2E, since I think I recall seeing it in the bios, but I'm not sure about C4E.

Thanks! I'll try later once I reacquire my p-states. (I found out that I didn't record them properly and now I'm missing one - so now I need to replace the needed kexts and do it again.) They're pretty similar to yours, but I thing my VID numbers were a bit different.

 

And for reference, my CPU is the BX80569Q550 12MB cache version that's currently on Newegg for $280 (Which is crazy, because they were selling it for $220 last fall - prices are supposed to go down, not up. I think if I were to buy the same rig now as I did then I'd be paying another $150 +- 50.) I think I have at least C2E, since I think I recall seeing it in the bios, but I'm not sure about C4E.

 

Revision is the important information:

post-375259-1279140547_thumb.png

 

If it is E0 then C2E and C4E are possible.

You can actually get working power management very easily since there are many users with same hardware on that Vanilla speedstepping thread. All you really need is these changes.

 

...

 

Just replace the 6 P-states with your own ones and that's it, speedstepping and C-states. Actually just C1E since I don't know which version of Q9550 you have, if you have the newer E0 stepping version then C2E and C4E are also possible. C1E alone should be good enough though, with lower C-states you might get 1-2 degrees lower temps but that's not really important in my opinion.

 

Well, I'm now trying to edit my dsdt file (from the lifehacker V3 package). And boy is it a pain. I'm rapidly coming to the conclusion that I'm going to have to manually type everything in. (Annoying but doable - it's the second problem below that's the issue.)

 

I've tried editing & compiling with DSDTSE, but I keep getting errors (which I think have to do with invisible characters from when I copy text.) I also tried with the most recent version of iASLMe and got the following error (even when I tried compiling the dsl file immediately after I extracted it):

 

518: 0xFFF00000, // Length

Error 4117 - Length is larger than Min/Max window ^

Well, I'm now trying to edit my dsdt file (from the Lifehacker V3 package). And boy is it a pain. I'm rapidly coming to the conclusion that I'm going to have to manually type everything in. (Annoying but doable - it's the second problem below that's the issue.)

 

I've tried editing & compiling with DSDTSE, but I keep getting errors (which I think have to do with invisible characters from when I copy text.) I also tried with the most recent version of iASLMe and got the following error (even when I tried compiling the dsl file immediately after I extracted it):

 

518: 0xFFF00000, // Length

Error 4117 - Length is larger than Min/Max window ^

 

Well, I've managed to modify my dsdt and get it to compile properly. (By typing everything :( ) I suppose I'll give it a try tomorrow.

 

FYI, I got around the compile error mentioned in my earlier post by using the advice in this post: Link

 

I've also found, to my disappointment, that my C1 rev Q9550 apparently only supports C1E, at least according to this: http://www.chiplist.com/Intel_Core_2_Quad_...section--2401-/

 

So now I've got what is essentially a stock LifeHacker dsdt which has been modified for speed steping (using my CPU's p-states). For anyone who's interested, I've attached a copy of the dsdt.dsl file: DSDT.zip

Well, I've managed to modify my dsdt and get it to compile properly. (By typing everything :D ) I suppose I'll give it a try tomorrow.

 

FYI, I got around the compile error mentioned in my earlier post by using the advice in this post: Link

 

I've also found, to my disappointment, that my C1 rev Q9550 apparently only supports C1E, at least according to this: <a href="http://www.chiplist.com/Intel_Core_2_Quad_Q9xxx_series_processor_Yorkfield/tree3f-subsection--2401-/" target="_blank">http://www.chiplist.com/Intel_Core_2_Quad_...section--2401-/ </a>

 

So now I've got what is essentially a stock LifeHacker dsdt which has been modified for speed steping (using my CPU's p-states). For anyone who's interested, I've attached a copy of the dsdt.dsl file: DSDT.zip

 

Your dsdt looks fine, you should now have P-states and C1E and that is just fine, C2E and C4E aren't that important. C1E alone will drop idling temperature by 5-10 degrees. Your cpu being revision C1 doesn't matter on stock speeds but for overclocking that older version isn't quite as good as E0 revision. Gigabyte boards have this stupid bug that C-states don't work if you use a manually set Vcore value in bios setup, it has to be set to Normal. And your C1 revision won't go far without using higher Vcore. Setting LLC enabled will help some, if you are lucky then something like 3.4 GHz should be possible. Before trying your new dsdt remember to remove NullCpuPowermanagement, VoodooPowerMini etc. Vanilla speedstepping doesn't go together with those things.

Revision is the important information:

post-375259-1279140547_thumb.png

 

If it is E0 then C2E and C4E are possible.

 

I'm having trouble finding CPU-X that works. The link on Netkas is dead. I found 1 download on the net and it runs but it fails to show anything in the CPU revision box, it's just blank. It shows all of the other pertinent information on my Q9550 and all of the other information is there. Does someone have a download link to the CPU-X that is being used on these tests? Am I doing something wrong?

 

Thanks,

Charles

I'm having trouble finding CPU-X that works. The link on Netkas is dead. I found 1 download on the net and it runs but it fails to show anything in the CPU revision box, it's just blank. It shows all of the other pertinent information on my Q9550 and all of the other information is there. Does someone have a download link to the CPU-X that is being used on these tests? Am I doing something wrong?

 

Thanks,

Charles

 

Here:

CPU_X.app.zip

Your dsdt looks fine, you should now have P-states and C1E and that is just fine, C2E and C4E aren't that important. C1E alone will drop idling temperature by 5-10 degrees. Your cpu being revision C1 doesn't matter on stock speeds but for overclocking that older version isn't quite as good as E0 revision. Gigabyte boards have this stupid bug that C-states don't work if you use a manually set Vcore value in bios setup, it has to be set to Normal. And your C1 revision won't go far without using higher Vcore. Setting LLC enabled will help some, if you are lucky then something like 3.4 GHz should be possible. Before trying your new dsdt remember to remove NullCpuPowermanagement, VoodooPowerMini etc. Vanilla speedstepping doesn't go together with those things.

 

Well, I tested things this morning and everything seems to be working fine. Thanks for the help mm67!

 

My idle temps are finally around the 44C I was getting with NullCpuPowermanagement, while my temperatures when fully loaded look to be around 76C - which is the same as with Powermanagement disabled. Of course, I've made sure to remove the Disabler, NullCpuPowermanagement, SleepEnabler, and VoodooPowerMini kexts, so it should be working fine.

 

I'd like to ask if there's any way to monitor the speed stepping? I assume Pstatechanger would require VoodooPowerMini, however, if not I suppose it may work.

 

As for overclocking, I hadn't really planned on doing much, however, at some point I may try a small overclock that hopefully wouldn't require me to adjust the vCore. Say, adjusting the bus to 366 from 333 to give me ~3,1GHz. I don't think this level of overclock will require me to adjust much in the bios.

Well, I tested things this morning and everything seems to be working fine. Thanks for the help mm67!

 

My idle temps are finally around the 44C I was getting with NullCpuPowermanagement, while my temperatures when fully loaded look to be around 76C - which is the same as with Powermanagement disabled. Of course, I've made sure to remove the Disabler, NullCpuPowermanagement, SleepEnabler, and VoodooPowerMini kexts, so it should be working fine.

 

I'd like to ask if there's any way to monitor the speed stepping? I assume Pstatechanger would require VoodooPowerMini, however, if not I suppose it may work.

 

As for overclocking, I hadn't really planned on doing much, however, at some point I may try a small overclock that hopefully wouldn't require me to adjust the vCore. Say, adjusting the bus to 366 from 333 to give me ~3,1GHz. I don't think this level of overclock will require me to adjust much in the bios.

 

VoodooMonitor and mark-i will show you if speedstepping is working. I prefer mark-i since it also shows if C-states are working. You can see that by looking Cpu voltage value, if it goes down when idling then C1E is working, if it stays the same all the time even though multiplier is changing then only speedstepping is working.

 

BTW How do you define fully loaded ? Are you running Prime95 or Linpack or something like that ? If you get 76 C while running Linpack then your cooling is adequate, otherwise I'd start looking for a better cooler.

VoodooMonitor and mark-i will show you if speedstepping is working. I prefer mark-i since it also shows if C-states are working. You can see that by looking Cpu voltage value, if it goes down when idling then C1E is working, if it stays the same all the time even though multiplier is changing then only speedstepping is working.

 

BTW How do you define fully loaded ? Are you running Prime95 or Linpack or something like that ? If you get 76 C while running Linpack then your cooling is adequate, otherwise I'd start looking for a better cooler.

 

I'll go ahead and find mark-i to see how it works.

 

To fully load my CPU I've been using a little trick where I open 4 terminal windows and use the "yes > /dev/null" command. Doing this creates 4 processes that push reported CPU usage up to 100%. I don't suppose you know where I can find a Mac version of Prime95 or Linpack. I think I remember looking last fall, but not really finding anything.

 

As for my cooler, I think I may have to reapply my thermal paste - I believe I put too much on, so it may be insulating a bit.

I'll go ahead and find mark-i to see how it works.

 

To fully load my CPU I've been using a little trick where I open 4 terminal windows and use the "yes > /dev/null" command. Doing this creates 4 processes that push reported CPU usage up to 100%. I don't suppose you know where I can find a Mac version of Prime95 or Linpack. I think I remember looking last fall, but not really finding anything.

 

As for my cooler, I think I may have to reapply my thermal paste - I believe I put too much on, so it may be insulating a bit.

 

Prime95 : http://mersenneforum.org/gimps/Prime95-MacOSX-2511.zip

Linpack : http://registrationcenter-download.intel.c..._10.2.5.013.tgz

 

Linpack has no gui.

 

Using yes > /dev/null seems to output similar temps as Prime95 small FFT torture test. Linpack will run about 10 degrees warmer so I wouldn't do that without first checking your cooling.

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