DSDT for Asus P8P67-M PRO

[elitee]

Nope, sorry

That's my values w/ and w/o Turbo Mode enabled in BIOS:

 

MSR_MISC_PWR_MGMT 0x850089

IA32_MISC_ENABLES 0x400000

 

Tell me if I can make other test for you

 

I get the same thing as you (i5-2500k)

[flAked]

I get the same thing as you (i5-2500k)

Thanks!

 

On which board?

[elitee]

Thanks!

 

On which board?

 

 

P8P67 Rev. 3 Vanilla, still using BIOS 1502.

 

Time to update the sig!

 

PS, did you change your name or am I going crazy?

[flAked]

PS, did you change your name or am I going crazy?

Yeah, too many aliases in too many forums

[xbc]

DHP... Added the Ioreg dumps No NullCPU kext you requested in the TonyMac Forum....

[flAked]

DHP... Added the Ioreg dumps No NullCPU kext you requested in the TonyMac Forum....

Thanks, had a look and wasn't able to find anything, yet. Could you maybe try out the custom made bootloader and see if those values change for you? (see a couple posts above)

[Time2Retire]

DHP... Added the Ioreg dumps No NullCPU kext you requested in the TonyMac Forum....

Thanks. Looked at it quick and noticed a few things. Not really Sandy Bridge compatible because of this:

 

1.) Using iMac11,1 which is not a Sandy Bridge model.

2.) Wrong cpu-type (0x701 instead of 0703).

3.) Injects QPI when it shouldn't - hence the bus-frequency of: 0xffffffff

4.) AICPMVers (Number) 0x1240105 is missing.

5.) GPUPLimit (Number) 0x0 is missing.

6.) PerformanceStateArray is missing essential values (power).

7.) /clock-frequency is set to 0xffffffff

 

But the good news is that IOPMrootDomain has some essential stepper properties like:

 

PowerStatus -> CPU_Power_Limits - CPU_Available_CPUs

PowerStatus -> CPU_Power_Limits - CPU_Scheduler_Limit

PowerStatus -> CPU_Power_Limits - CPU_Speed_Limit

 

I also see: Supported Features -> Stepper CPU which is also good. Another good thing is that SATA / AppleIntelPchSeriesAHCI is loaded.

 

Here the latter won't load. I have seen it once but that's it.

 

I see you have a GigaByte P67A-UD5-B3 board with OC'ed i7-2600K.

[flAked]

Hmm 4) and 5) are missing here as well.

[Time2Retire]

I guess that I lost track of the Injector.kext versions because here it doesn't load before SMBIOS. Or so I think.

 

I noticed that you removed this line:

if( !IOService::getResourceService()->getProperty("SMBIOS") ) return false;

And that the plist was changed, but here it loads after this line in kernel.log

ACPI: System State [S0 S3 S4 S5] (S3)

What version should I be using?

[flAked]

I guess that I lost track of the Injector.kext versions because here it doesn't load before SMBIOS. Or so I think.

 

I noticed that you removed this line:

if( !IOService::getResourceService()->getProperty("SMBIOS") ) return false;

And that the plist was changed, but here it loads after this line in kernel.log

ACPI: System State [S0 S3 S4 S5] (S3)

What version should I be using?

It currently has a dependency set for ACPI, you can just remove IOResourceMatch and see when it loads. I'm not sure if /efi/platform has a direct dependency.

 

If you set IOResourceMatch to IOBSD, it will load right after the BSD kernel.

 

Current version in your inbox, including the changes I posted a couple of posts ago.

 

 

Hmm, so IOBSD will load it even later, now trying without IOResourceMatch.

Funky, set IOProviderClass = IOService and IOResourceMatch = IOKit, and it will load before AppleACPICPU

 

May 8 16:32:22 localhost kernel[0]: NullCPUPowerManagement::start

May 8 16:32:22 localhost kernel[0]: Injector: current FSBFrequency is: 100327814

May 8 16:32:22 localhost kernel[0]: Injector: New quad-reduced frequency: 25081953

May 8 16:32:22 localhost kernel[0]: Injector: Stored in FAKEfrequency. All done.

May 8 16:32:22 localhost kernel[0]: AppleACPICPU: ProcessorId=1 LocalApicId=0 Enabled

[Time2Retire]

Hmm, so IOBSD will load it even later, now trying without IOResourceMatch.

Funky, set IOProviderClass = IOService and IOResourceMatch = IOKit, and it will load before AppleACPICPU

Confirmed. Now trying to figure out what to set when. Need to re-check everything once more. Oh and this one is also 0

#define IA32_ENERGY_PERF_BIAS 0x01B0

msr = rdmsr64(IA32_ENERGY_PERF_BIAS);
_CPU_DEBUG_DUMP("Energy/Performance Bias Enable: 0x%x\n", msr);

No change when I change the 'EPU Power Saving Mode' settings in the BIOS. Slowly getting the feeling that things in our BIOS are developed for MS Windows only.

[flAked]

#define IA32_ENERGY_PERF_BIAS 0x01B0

What about

This bit’s status (1 or 0) is also reflected by CPUID.(EAX=06h):ECX[3].

 

How is windows reading those settings without the actual registers set appropriately?

[Time2Retire]

What about

 

How is windows reading those settings without the actual registers set appropriately?

Never mind. AppleIntelCPUPowerManagement.kext isn't reading it. What is does read are the following MSR's:

 

0x198 IA32_PERF_STATUS (Current performance State Value)

0x199 IA32_PERF_CTL (Target performance State Value)

 

0x1A0 IA32_MISC_ENABLE (Enable Miscellaneous Processor Features)

 

0xE2 MSR_PMG_CST_CONFIG_CONTROL (C-State Configuration Control)

0xE7 IA32_MPERF (Maximum Qualified Performance Clock Counter)

0xE8 IA32_APERF (Actual Performance Clock Counter)

 

Update: Never asked yourself why the reported minimum bus ratio was zero? Me too!

 

I checked it and almost every Chameleon based boot loader (except Valv's) inherited the same bug (wrong calculation method). Fixed for the next update of RevoBoot – I don't want to display stupid data because I need something that I can use and work with.

 

Good to know that the value is correct, but it did hold me up for a while. Next target...

[flAked]

My registers show:

MSR_IA32_PERF_STATUS 0x2100

MSR_IA32_PERF_CTL 0x2100

MSR_PMG_CST_CONFIG_CONTROL 0x1e008407

MSR_IA32_MPERF 0x7057d498

MSR_IA32_APERF 0xe172a78b

[Time2Retire]

My registers show:...

Interesting. That's almost the same as I have here. Well. Except for the 0x2100 of course (and the last two will keep changing).

 

I wonder if we can trigger turbo at boot time by setting a higher value in the target MSR but I'm about to jump in my bed (school tomorrow).

 

Good night all

[JBraddock]

5.) GPUPLimit (Number) 0x0 is missing.

What is the trick for this value? I have almost all the values that the real MacBookPro5,5 has but I couldn't manage to get this value appear. I have both AGPMEnabler &AGPM loaded in ioreg.

 

What else is needed? Do I have to inject this?

[flAked]

I wonder if we can trigger turbo at boot time by setting a higher value in the target MSR

wrmsr64(MSR_IA32_PERF_CTL, 0x2200);

This doesn't work. Specs are saying, it relies on BIOS setting things up correctly. But because we dropped the SSDT with all the methods responsible for actually setting the P-state, this doesn't work.

 

Alias(_PSS, APSS) might do the trick, but I'm suspecting we need PCT et al. as well.

 

It's a tradeoff, really. If we want Turbo at early boot, we need a SSDT complying with the specs. If we want a compact SSDT, we need to wait till AICPUPM kicks in.

 

I would postpone it, until we know which functions under PR are necessary for OSX. But I would also guess that the extra Turbo would improve boot time more than the few extra KB inside the SSDT.

 

 

On a personal note, I have an important project coming up next week, so I'm not able to contribute as much. But I'll hang around as I don't want to miss anything

[xbc]

Thanks. Looked at it quick and noticed a few things. Not really Sandy Bridge compatible because of this:

 

1.) Using iMac11,1 which is not a Sandy Bridge model.

 

I posted two dumps, one is should be using iMac12,1 (the first one) reason for using iMac11,1 is to get full scores

iMac12,1 gets me bad performance.

 

2.) Wrong cpu-type (0x701 instead of 0703).

3.) Injects QPI when it shouldn't - hence the bus-frequency of: 0xffffffff

4.) AICPMVers (Number) 0x1240105 is missing.

5.) GPUPLimit (Number) 0x0 is missing.

6.) PerformanceStateArray is missing essential values (power).

7.) /clock-frequency is set to 0xffffffff

 

Again check the firs dump it should be with iMac12,2

 

But the good news is that IOPMrootDomain has some essential stepper properties like:

 

PowerStatus -> CPU_Power_Limits - CPU_Available_CPUs

PowerStatus -> CPU_Power_Limits - CPU_Scheduler_Limit

PowerStatus -> CPU_Power_Limits - CPU_Speed_Limit

 

I also see: Supported Features -> Stepper CPU which is also good. Another good thing is that SATA / AppleIntelPchSeriesAHCI is loaded.

 

Here the latter won't load. I have seen it once but that's it.

 

I see you have a GigaByte P67A-UD5-B3 board with OC'ed i7-2600K.

 

 

Thanks, had a look and wasn't able to find anything, yet. Could you maybe try out the custom made bootloader and see if those values change for you? (see a couple posts above)

 

I can give it a spin... I though it was jst for Asus boards.... point me to the download..

[ThisName]

Hello. You're doing amazing work. Thank you so much!

 

So... from a non-technical POV, how are things looking? What are our chances of training the wild speedstep beast and getting it to submit to OS X?

[Time2Retire]

I posted two dumps, one is should be using iMac12,1 (the first one) reason for using iMac11,1 is to get full scores iMac12,1 gets me bad performance.

 

Again check the firs dump it should be with iMac12,2

Oh cool. Can you please add a link to it, because I can't seem to find it anymore.

 

I can give it a spin... I though it was jst for Asus boards.... point me to the download..

See post #190 here.

 

Hello. You're doing amazing work. Thank you so much!

 

So... from a non-technical POV, how are things looking? What are our chances of training the wild speedstep beast and getting it to submit to OS X?

Thanks. We are really trying to solve this puzzle, but it might take us some time before we know more.

 

I just learned when the KP occurs (look at ECX which is set to 0x000000e2) so it does something like this:

movl $0x000000e2,%ecx
rdmsr

Then it KP's. And I found 16 of them in AppleIntelCPUPowerManagement Now we have to figure out where exactly the KP occures and what to do about it.

 

It also writes to MSR 0x1FC like so:

movl	$0x000001fc,%ecx
movq	%rdx,%rax
andl	$0xff,%eax
shrq	$0x20,%rdx
wrmsr

And also to MSR 0x1AD

movl	$0x000001ad,%ecx
movq	%rdx,%rax
andl	$0xff,%eax
shrq	$0x20,%rdx
wrmsr

Just good to know because maybe. Just maybe one of them triggers the KP (we can easily test this). My problem is that I only just yet starting to learn to read assembler code so again. It might, very likely even, take us some time to figure out what goes on in AppleIntelCPUPowerManagement.

[flAked]

I just learned when the KP occurs (look at ECX which is set to 0x000000e2) so it does something like this:

movl $0x000000e2,%ecx
rdmsr

I don't have time to do a full audit, but here is a hint. Look at this bit of instructions:

movw		$0x00e2,%cx
rdmsr
andl		$0xfffffb8f,%eax
orl		$0x08,%eax
wrmsr

The operand to the function we want to call (rdmsr) is stored in ECX (0xe2). But you will notice that ECX is not changed after this. The return value of rdmsdr is stored in EAX (always). We then do a fancy AND/OR operation to change the bits and use the same register stored in ECX (0xe2) to write it back.

 

So even if the kp shows ECX=0xe2 the actual panic may accour a couple of instructions later and most likely on the write back. Or there might be a conditional jump afterwards calling _panic itself.

[Time2Retire]

A few new observations:

 

1.) MSR_PLATFORM_INFO (0xCE) is unchanged when you change the settings in the BIOS, but the DSDT does change!

 

2.) The max multiplier changes from 34 to 59 when you disable Intel SpeedStep in the BIOS. MSR MSR_IA32_PERF_CONTROL (0x199) also changed from 0x2200 (depends on CPU model) to 0x3b00.

 

3.) Disabling SpeedStep in the BIOS changes APSS and results in 16 packages like this:

			Package (0x06)
		{
			0xFFFF, 
			0x0FFFFFFF, 
			0xFFFF, 
			0xFFFF, 
			0xFFFF, 
			0xFFFF
		},

And sets NPSS to 0x00.

 

4.) NCST (number of C-States) is always 2, even when it should be 1 or 3

 

5.) TNLP is the number of cores * 2 (when Hyperthreading is active).

 

6.) The following OperationRegion's change with the BIOS settings:

OperationRegion (SSDT, SystemMemory, 0x00000000, 0x0001)
OperationRegion (CSDT, SystemMemory, 0xBF605D98, 0x00E4)

Note: This example was with EIST disabled.

 

7.) _TSS data (TSSI/TSSM) don't change. No matter what I do in the BIOS.

 

8.) The worst-case latency (in microseconds) in our CST objects are conform Intel specifications.

 

9.) I can boot with HPET disabled in the BIOS.

 

10.) Writing to MSR 0xE2 in RevoBoot results in an instantaneous reboot.

[flAked]

Because the panic always happens when ECX = 0x2E we can safely assume that the panic is C-State related.

 

MSR_PKG_CST_CONFIG_CONTROL

C-State Configuration Control (0x2E)

 

7.) _TSS data (TSSI/TSSM) don't change. No matter what I do in the BIOS.

Makes sense, because TSS data is pretty static, it only defines percentages and according to ACPI specs:

Power: OSPM ignores this field on platforms the support P-states, which provide power dissipation information via the _PSS object.

So they don't actually define the power values in TSS. SSDT of MBP81 copies the power values of PSS into TSS, as discussed earlier.

[Time2Retire]

Because the panic always happens when ECX = 0x2E we can safely assume that the panic is C-State related.

 

MSR_PKG_CST_CONFIG_CONTROL

C-State Configuration Control (0x2E)

I agree. Also of note is that it doesn't matter what CPU model you have since the panic is seen on both the i5-2K and i7-2K series. More likely a BIOS bug.

 

Makes sense, because TSS data is pretty static, it only defines percentages and according to ACPI specs:

 

So they don't actually define the power values in TSS. SSDT of MBP81 copies the power values of PSS into TSS, as discussed earlier.

Apparently yes.

 

Waiting for that link so that I can compare the GigaByte ACPI tables with mine...

[flAked]

Waiting for that link so that I can compare the GigaByte ACPI tables with mine...

Do you mean ghorwith ACPI tables from http://www.insanelymac.com/forum/index.php...t&p=1679471 ?