GA-EX58 and GA-X58A DSDT native power management modifications

[d00d]

Today , i removed the nullcpupowermanagement.kext to check if i got a kp at the load process. And no kp..

 

The only thing which is different, is my dsdt with the PX40 mod; checked the automatic restart after an electrical failure, that's all.

 

I confirm the LPC and HPET are loaded (sytem profiler) but still noCPULimit shown in my registry.

 

I probably have to mod the dsdt to include some p states to reach a vanilla speedstep at this stage.

The following message indicates that you are still using a disabler kext so that AppleIntelCPUPowerManagementClient.kext and AppleIntelCPUPowerManagement.kext don't load;

kernel[0]: ACPI_SMC_PlatformPlugin::start - waitForService(resourceMatching(AppleIntelCPUPowerManagement) timed out

 

The following message indicates that you are clocked over 2.96 GHz, but haven't corrected the CPU section of your DSDT to pass CStates to the OS, see page 1;

kernel[0]: ACPI_SMC_PlatformPlugin::gatherCStateOverrides - failed to set c-state demotion data: -1

 

Use demong1's MacPro4_1.plist to get CPUPLimit speed step down clocking, see page 1.

[The Real Deal]

The AppleIntelCPUPowerManagementClient.kext is not shown in my system profiler/extensions.

 

Here is my list of kext (E/E) (BIOS F7 and different install)

 

 

AppleIntelPIIXATA

Fakesmc

IOAHCIBlockStorageInjector

JMicronATA

LegacyHDA

LegacyJMB36xSATA

OpenHaltRestart

 

 

 

 

I thought that none of these kexts, acted like a disabler and interacted with AppleIntelCPU.....

 

 

My CPU section in DSDT is not modded at the moment cause i'm still searching a maximum infos about this subject. I don't want to brick my CPU with a bad manip.

 

And the demon plist was placed in the right kext, and this last installed with kext utility before the screenshots.

 

 

 

Thx.

[d00d]

The AppleIntelCPUPowerManagementClient.kext is not shown in my system profiler/extensions.

 

Here is my list of kext (E/E) (BIOS F7 and different install)

 

AppleIntelPIIXATA

Fakesmc

IOAHCIBlockStorageInjector

JMicronATA

LegacyHDA

LegacyJMB36xSATA

OpenHaltRestart

 

I thought that none of these kexts, acted like a disabler and interacted with AppleIntelCPU.....

 

My CPU section in DSDT is not modded at the moment cause i'm still searching a maximum infos about this subject. I don't want to brick my CPU with a bad manip.

 

And the demon plist was placed in the right kext, and this last installed with kext utility before the screenshots.

 

Thx.

Then you are loading a disabler.

Do you have an Extensions.mkext that contains a disabler?

If you don't trust that the CPU modifications to DSDT that I describe are valid, then you can clock at 2.96 GHz or lower, and you will automatically get CStates.

[The Real Deal]

I have an Extensions.mkext built from scratch with kext utility, no disabler or nullcpu in E/E when the app proceed.

 

I fully trust your mod, i am a beginner and before applying something, the best way for me to learn is to find how does it work and why.

 

 

This mob drive me nuts. Anyway, thx for your help.

[d00d]

I have an Extensions.mkext built from scratch with kext utility, no disabler or nullcpu in E/E when the app proceed.

 

I fully trust your mod, i am a beginner and before applying something, the best way for me to learn is to find how does it work and why.

 

This mob drive me nuts. Anyway, thx for your help.

No problem, it's better to understand what you are doing first.

AppleIntelCPUPowerManagementClient.kext isn't loading, but is AppleIntelCPUPowerManagement.kext loading?

Dumb question perhaps, but is it possible that one or both were deleted from /System/Library/Extensions/?

[The Real Deal]

Hey d00d

 

Even both are loaded (and thus present in S/L/E), no disabler, it doesn't change anything. I checked everything twice.

 

 

Did you deleted a file somewhere related with the power management? If my memory serves me right, i read something about that through the board.

 

And better of all, without a disabler, i lost again my overall perfs (decrease by 50%).. with 10.6, no disabler were used, it was fine. 10.6.2 introduced an update of those two kexts, but you are aware about it.

[d00d]

Hey d00d

 

Even both are loaded (and thus present in S/L/E), no disabler, it doesn't change anything. I checked everything twice.

 

Did you deleted a file somewhere related with the power management? If my memory serves me right, i read something about that through the board.

 

And better of all, without a disabler, i lost again my overall perfs (decrease by 50%).. with 10.6, no disabler were used, it was fine. 10.6.2 introduced an update of those two kexts, but you are aware about it.

So now you have both kexts loading, but no CPUPlimit.

I haven't deleted any files related to native power management, nor noticed any performance drop.

Both binaries in AppleIntelCPUPowerManagementClient.kext and AppleIntelCPUPowerManagement.kext are dated 20090801, so how have these been changed for 10.6.2?

Running at 3.2 GHz without making the CPU DSDT changes means that you are running without CStates (and possibly affecting CPUPlimit?), and therefore not running with full native power management.

Perhaps that is why you see a performance loss.

I suggest you clock to 2.96 GHz or lower to automatically get CStates, to see if you get CPUPlimit then.

If your 3.2 GHz *is* base 2.96 GHz with x22 turbo, then I don't know what to suggest at this point.

[digital_dreamer]

You are missing the IRQ in RTC, put it back and sleep will function.

Did you use fassl's DSDT Patcher that removes the IRQ from RTC?

Better to use iasl or DSDTSE and make manual edits.

Here's the original code that includes the IRQ (with CMOS fix);

                Device (RTC)
               {
                   Name (_HID, EisaId ("PNP0B00"))
                   Name (ATT0, ResourceTemplate ()
                   {
                       IO (Decode16,
                           0x0070,             // Range Minimum
                           0x0070,             // Range Maximum
                           0x00,               // Alignment
                           0x02,               // Length
                           )
                       IRQNoFlags ()
                           {8}
                   })
                   Name (ATT1, ResourceTemplate ()
                   {
                       IO (Decode16,
                           0x0070,             // Range Minimum
                           0x0070,             // Range Maximum
                           0x00,               // Alignment
                           0x02,               // Length
                           )
                   })
                   Method (_CRS, 0, NotSerialized)
                   {
                       If (LGreaterEqual (OSFX, 0x03))
                       {
                           If (HPTF)
                           {
                               Return (ATT1)
                           }
                           Else
                           {
                               Return (ATT0)
                           }
                       }
                       Else
                       {
                           Return (ATT0)
                       }
                   }
               }

Thanks for bringing this issue up again, d00d. My script was coded to remove the IRQ and following line during the CMOS reset fix. I suppose I should remove/comment that portion out.

I originally had it in because on some boards these lines would cause a KP. I know this is for the UD5, but are some boards where you would want those lines out? I might understand this better if I knew what the lines do - respond to a interrupt request?

 

MAJ

[d00d]

Thanks for bringing this issue up again, d00d. My script was coded to remove the IRQ and following line during the CMOS reset fix. I suppose I should remove/comment that portion out.

I originally had it in because on some boards these lines would cause a KP. I know this is for the UD5, but are some boards where you would want those lines out? I might understand this better if I knew what the lines do - respond to a interrupt request?

 

MAJ

There's no IRQ in the RTC section of the DSDT obtained from an Apple hardware MacPro4,1, so I don't know the logic behind when not having it on the GA-EX58 MBs that it causes sleep issues.

I can't speak to MBs from other manufacturers, as I've only worked with Gigabyte's X58 chipset MB.

I'd suggest that the script conditionally not remove the IRQ when the user is installing OS X on a GA-EX58, and removing it when installing on an MB where it's known to causes problems.

 

Update:

I removed the IRQ from RTC and it didn't cause sleep problems in 10.6.2, but it did in 10.6.1.

[The Real Deal]

So now you have both kexts loading, but no CPUPlimit.

I haven't deleted any files related to native power management, nor noticed any performance drop.

Both binaries in AppleIntelCPUPowerManagementClient.kext and AppleIntelCPUPowerManagement.kext are dated 20090801, so how have these been changed for 10.6.2?

Running at 3.2 GHz without making the CPU DSDT changes means that you are running without CStates (and possibly affecting CPUPlimit?), and therefore not running with full native power management.

Perhaps that is why you see a performance loss.

I suggest you clock to 2.96 GHz or lower to automatically get CStates, to see if you get CPUPlimit then.

If your 3.2 GHz *is* base 2.96 GHz with x22 turbo, then I don't know what to suggest at this point.

 

 

My setting is: 160X20 and.. turbo enabled, so X22 with one core I will set the defaut value, maybe it'll operate a change like you suggest.

 

 

btw, do you have a score at geekbench 32/64, @ 4.2 + RAM specs please?

[d00d]

My setting is: 160X20 and.. turbo enabled, so X22 with one core I will set the defaut value, maybe it'll operate a change like you suggest.

 

btw, do you have a score at geekbench 32/64, @ 4.2 + RAM specs please?

32bit, 4.2 GHz, 12 GB 1260 MHz, no turbo, speed step;

11468: http://browse.geekbench.ca/geekbench2/view/191189

11839: http://browse.geekbench.ca/geekbench2/view/191190

11792: http://browse.geekbench.ca/geekbench2/view/191192

 

32bit, 4.2 GHz, 12 GB 1260 MHz, no turbo, no speed step;

12441: http://browse.geekbench.ca/geekbench2/view/191194

12145: http://browse.geekbench.ca/geekbench2/view/191208

11964: http://browse.geekbench.ca/geekbench2/view/191210

[digital_dreamer]

There's no IRQ in the RTC section of the DSDT obtained from an Apple hardware MacPro4,1, so I don't know the logic behind when not having it on the GA-EX58 MBs that it causes sleep issues.

I can't speak to MBs from other manufacturers, as I've only worked with Gigabyte's X58 chipset MB.

I'd suggest that the script conditionally not remove the IRQ when the user is installing OS X on a GA-EX58, and removing it when installing on an MB where it's known to causes problems.

 

Update:

I removed the IRQ from RTC and it didn't cause sleep problems in 10.6.2, but it did in 10.6.1.

Good suggestions and advice.

 

Interesting response regarding 10.6.2 and IRQ lines.

 

MAJ

[blackosx]

Hi d00d. Well done with your guide. I don't own this mobo but still, I find your guide very comprehensive and full of useful information.

The drives have eject buttons because of the SATA hot plug functionality of the MB, and the one that has the active OS wouldn't have an eject button.

This is convenient when you want to be able to mount and unmount external eSATA drives connected through the PCI slot eSATA interface that's included with UD4 through UD7, if that's connected to one or two of the six SATA ICH10 MB ports.

UD7 also has two combination USB and powered eSATA ports at the back panel.

The non OS drives can be ejected in the Finder, and mounted again with Disk Utility or by unplug and plug.

It's correct functionality, but if you didn't want the eject capability, device-id `0x81, 0x26, 0x00, 0x00' can instead be set in the IDE1 section of the DSDT and you wouldn't need to use OrangeIconFix.kext either.

That would incorrectly show ESB2 instead of ICH10 in System Profiler:Hardware:Serial-ATA however.

I like your explanation above for the ICH10 SATA hot plug feature and as you posted in Stickpin's thread, I now think it's best to leave the device-id as 3a22 and keep the orangeicon fix. I will backtrack on my guide and bring it back so as to keep the benefits of ICH10. I guess Stickpin plans to find a workaround as he said real MacPro's don't use this feature, which I can understand to make it closer to a real Mac.

[d00d]

Hi d00d. Well done with your guide. I don't own this mobo but still, I find your guide very comprehensive and full of useful information.

 

I like your explanation above for the ICH10 SATA hot plug feature and as you posted in Stickpin's thread, I now think it's best to leave the device-id as 3a22 and keep the orangeicon fix. I will backtrack on my guide and bring it back so as to keep the benefits of ICH10. I guess Stickpin plans to find a workaround as he said real MacPro's don't use this feature, which I can understand to make it closer to a real Mac.

Thanks.

I looked at ioreg output from an Apple hardware MacPro4,1, and hot plug is indeed turned off for PRT0 and 1 (Upper and Lower), and PRT2 through 5 (Bay 1 through 4).

It looks like Apple dumbed down the capability of the chipset in the OS, possibly because of the design decision to not include any external SATA ports that could take advantage of hot plug.

I see that stickpin writes that it should be per port.

This makes sense, if for example you have external SATA connected to PRT4 aor PRT5 leave hot plug enabled, otherwise turn it off.

[blackosx]

I see that stickpin writes that it should be per port.

This makes sense, if for example you have external SATA connected to PRT4 aor PRT5 leave hot plug enabled, otherwise turn it off.

That seems the sensible choice providing of course stickpin or somebody else can work out how disable hot plug on selected SATA ports in DSDT whilst leaving device-id as 3a22. It might be easy, it might not. I am still trying to learn and understand DSDT on a deeper level

[devDelay]

It might be preferred to leave the hotplug feature for only certain ports. I have it enabled and it shows every drive but the boot disk as an external drive...able to eject any of them.

 

d00d, can you please check your p-state information in your original post. I can not seem to get it compiled, I get an error on line 38 or 39. And maybe give more details on your overclock settings...I was attempting to use this with memory rated for 1600mhz but could not get bios to post. I might need to set static voltage for memory. I managed to get everything else working perfectly Thank you!....although I do get a kernel message on boot that LPC did not load properly and I am using stock cpu bios settings so my geekbench scores are very low at the moment. The only time it does not give an error about LPC is when enabling C-states, but if those are enabled I can not awake from sleep.

 

Also, sleep works perfectly but obviously only when C1E and C3, C6, C7 modes are disabled. This makes sense now...I read late last night that C states are idle states. I think some people in other threads discussing using them were assuming they were just like p-states...but not defined by the DSDT. I'm assuming there is no need for them because C0 is the only one necessary.

[d00d]

It might be preferred to leave the hotplug feature for only certain ports. I have it enabled and it shows every drive but the boot disk as an external drive...able to eject any of them.

 

d00d, can you please check your p-state information in your original post. I can not seem to get it compiled, I get an error on line 38 or 39. And maybe give more details on your overclock settings...I was attempting to use this with memory rated for 1600mhz but could not get bios to post. I might need to set static voltage for memory. I managed to get everything else working perfectly Thank you!....although I do get a kernel message on boot that LPC did not load properly and I am using stock cpu bios settings so my geekbench scores are very low at the moment. The only time it does not give an error about LPC is when enabling C-states, but if those are enabled I can not awake from sleep.

 

Also, sleep works perfectly but obviously only when C1E and C3, C6, C7 modes are disabled. This makes sense now...I read late last night that C states are idle states. I think some people in other threads discussing using them were assuming they were just like p-states...but not defined by the DSDT. I'm assuming there is no need for them because C0 is the only one necessary.

You might be missing the enclosing bracket or coma that's on line 38.

Do `./iasl -d DSDT.aml' on my attached DSDT to get DSDT.dsl, then copy and paste from that.

My over clock settings for 4.1 and 4.2 GHz are listed in a previous post, and for 4.2 I had to set DRAM to 1.58v for 12 GB rated for 1.5v and 1333 MHz (running at 1260 MHz), with all other voltages set to auto.

To get AppleLPC.kext to load you need to fix the PX40 section of the DSDT, and check the `Start up automatically after a power failure' option in Energy Saver, or sleep will shut the computer down instead.

For kernel.log to not show CState errors you need to be clocked at 2.96 GHz or lower, or if clocked higher you need to correct the CPU section of your DSDT to pass CStates to the OS.

Sleep and wake works at any clock with these modifications and C2RC3 and PCEFI10.5, even when either or both of the two CState options are disabled in BIOS.

[devDelay]

You might be missing the enclosing bracket or coma that's on line 38.

Do `./iasl -d DSDT.aml' on my attached DSDT to get DSDT.dsl, then copy and paste from that.

My over clock settings for 4.1 and 4.2 GHz are listed in a previous post, and for 4.2 I had to set DRAM to 1.58v for 12 GB rated for 1.5v and 1333 MHz (running at 1260 MHz), with all other voltages set to auto.

To get AppleLPC.kext to load you need to fix the PX40 section of the DSDT, and check the `Start up automatically after a power failure' option in Energy Saver, or sleep will shut the computer down instead.

For kernel.log to not show CState errors you need to be clocked at 2.96 GHz or lower, or if clocked higher you need to correct the CPU section of your DSDT to pass CStates to the OS.

Sleep and wake works at any clock with these modifications and C2RC3 and PCEFI10.5, even when either or both of the two CState options are disabled in BIOS.

 

Thanks, I dont know why I didn't try that. I was copy pasting from your post. I ended up using your DSDT and edited the layout-id for audio. I use 885 for 3 outs 2 in.

 0x75, 0x03, 0x00, 0x00

 

I am getting KP shortly after resuming sleep. Could this be due to power management settings? I'm certain I have everything disabled. Except mode S3-STR and Soft-off. I also got a kernel panic from Safari and Window Server while using iTunes saying that core 4 was no longer responding.

 

For OC settings I used 185 for BCLK and x8 for SPD to get 1480mhz but still used the XMP profile for my memory @ 1600mhz. Everything else is auto. Seems to work fine. Maybe I can tweak that later.

 

Also, do you think its possible to get the JMicron ports identified properly using a DSDT patch?

[Bansaku]

Fantastic work d00d! Ever since the 10.6.2 update i5/i7 P55 systems could use vanilla Kernel. It bothered me that AppleLPC.kext always loaded (my mobo id is listed by default, yay) yet I got KP just before the boot reached the desktop (CPU7 has no HPET assigned) and thus needed NullAppleCPUPM.kext. I have been pulling out my hair for the past 5 days trying various methods in this forum (and others) with zero success to get everything as vanilla as possible; vanilla speedstep is first on my list of things to fix. Simply put your guide is bang on and by far the easiest to follow! It took me minutes and 3 restarts to get rid of NullCPUPM for good! Next step is for me to patch my DSDT so I get all my USB ports to EHCI built in vs UHCI expansion slot. Hopefully I can get sleep again.....

I however do not know if speedstep is functioning. I used voodoopstate.kext and PStateChanger app before. I have since taken them out. All kexts are 64-bit and I am unsure what apps will work (properly).

[d00d]

Thanks, I dont know why I didn't try that. I was copy pasting from your post. I ended up using your DSDT and edited the layout-id for audio. I use 885 for 3 outs 2 in.

 0x75, 0x03, 0x00, 0x00

 

I am getting KP shortly after resuming sleep. Could this be due to power management settings? I'm certain I have everything disabled. Except mode S3-STR and Soft-off. I also got a kernel panic from Safari and Window Server while using iTunes saying that core 4 was no longer responding.

 

For OC settings I used 185 for BCLK and x8 for SPD to get 1480mhz but still used the XMP profile for my memory @ 1600mhz. Everything else is auto. Seems to work fine. Maybe I can tweak that later.

 

Also, do you think its possible to get the JMicron ports identified properly using a DSDT patch?

Sounds like your KP is possibly being caused by BIOS settings.

Not using the PCEFI10.5 boot file with C2RC3 could result in the instability I saw, and possibly the KP others saw after sleep and wake.

I haven't done anything regarding the JMicron SATA ports because I don't use them, and I don't recall anyone doing anything other than a kext for them.

 

Fantastic work d00d! Ever since the 10.6.2 update i5/i7 P55 systems could use vanilla Kernel. It bothered me that AppleLPC.kext always loaded (my mobo id is listed by default, yay) yet I got KP just before the boot reached the desktop (CPU7 has no HPET assigned) and thus needed NullAppleCPUPM.kext. I have been pulling out my hair for the past 5 days trying various methods in this forum (and others) with zero success to get everything as vanilla as possible; vanilla speedstep is first on my list of things to fix. Simply put your guide is bang on and by far the easiest to follow! It took me minutes and 3 restarts to get rid of NullCPUPM for good! Next step is for me to patch my DSDT so I get all my USB ports to EHCI built in vs UHCI expansion slot. Hopefully I can get sleep again.....

I however do not know if speedstep is functioning. I used voodoopstate.kext and PStateChanger app before. I have since taken them out. All kexts are 64-bit and I am unsure what apps will work (properly).

Thanks.

In ioreg at IOService:/AppleACPIPlatformExpert/CPU0@0/AppleACPICPU/ACPI_SMC_PlatformPlugin you will see CPUPLimit with a value of 0x0 if you have speed step, a different value if it's not activated, or not there at all if not enabled.

Use demong1's MacPro4_1.plist to get CPUPLimit speed step down clocking, and it can be verified to be functional with MSR Tools.

[devDelay]

Sounds like your KP is possibly being caused by BIOS settings.

Not using the PCEFI10.5 boot file with C2RC3 could result in the instability I saw, and possibly the KP others saw after sleep and wake.

I haven't done anything regarding the JMicron SATA ports because I don't use them, and I don't recall anyone doing anything other than a kext for them.

 

I am using the PCEFI 10.5 and C2RC3 from digital_dreamer's boot script 4.2c. I'm assuming that is the same stuff...maybe I should download them elsewhere. I'm no longer getting any KP except after sleeping.

 

Did anyone ever figure out how to get Wake for Ethernet network access to enable?

[Bansaku]

Really noob question here (even though I am not); How do I boot into 32-bit mode? I am using Chameleon2r3 with PC EFI_10.5 (modified boot for 1156 chipsets) and -x32 and arch=i386 do nothing. MSR tools display nothing when I load it, hence why I asked if there was a 64-bit option.

However, IOReg reports CPULimit as 0x0 with 14 P-states listed (presumably the same 14 VoodooPstate gave), and CPU temps seems to be 2-3'C cooler. Geekbench also reports a higher score of 9600 vs 9200 at stock frequency of 2.8GHz. Maybe due to Turbo kicking in?

 

Here are my Geekbench results (rounded):

 

Stock Freq 2.8GHz

10.5.8 (Qoopz Kernel 9.8) 32-bit 8600, 64-bit 9900

10.6.2 (Vanilla) 32-bit 8300 64-bit 9600

 

OC to 3.5GHz

10.5.8 (Qoopz Kernel 9.8) 32-bit 11000 64-bit 13000

10.6.2 (Vanilla) 32-bit 10500 64-bit 12000

 

I think that perhaps the good folk at the Geekbench lab should release a Snow Leopard optimized build. I find SL to be faster overall yet show weaker results in GB.

[d00d]

Really noob question here (even though I am not); How do I boot into 32-bit mode? I am using Chameleon2r3 with PC EFI_10.5 (modified boot for 1156 chipsets) and -x32 and arch=i386 do nothing. MSR tools display nothing when I load it, hence why I asked if there was a 64-bit option.

However, IOReg reports CPULimit as 0x0 with 14 P-states listed (presumably the same 14 VoodooPstate gave), and CPU temps seems to be 2-3'C cooler. Geekbench also reports a higher score of 9600 vs 9200 at stock frequency of 2.8GHz. Maybe due to Turbo kicking in?

 

Here are my Geekbench results (rounded):

 

Stock Freq 2.8GHz

10.5.8 (Qoopz Kernel 9.8) 32-bit 8600, 64-bit 9900

10.6.2 (Vanilla) 32-bit 8300 64-bit 9600

 

OC to 3.5GHz

10.5.8 (Qoopz Kernel 9.8) 32-bit 11000 64-bit 13000

10.6.2 (Vanilla) 32-bit 10500 64-bit 12000

 

I think that perhaps the good folk at the Geekbench lab should release a Snow Leopard optimized build. I find SL to be faster overall yet show weaker results in GB.

You should be able to boot 32 bit with the following in com.apple.Boot.plist;

<key>Kernel Flags</key>

<string>arch=i386</string>

 

To tell if you were successful (32bit is i386, 64bit is x86_64);

[mac05:~] me% uname -p

i386

[mac05:~] me%

 

Do you get CPULimit 0x0 using demong1's MacPro4_1.plist, or does that happen automatically on GA-P55?

[Bansaku]

No luck...I even tried using Lizard. Maybe I have to turn HPET to 32-bit in bios to boot into 32-bit mode?

 

I did use demong1's MacPro4_1.plist right off the get go. Interesting thought though. Unfortunately, I trashed the original unmodified kext after demong1's plist worked (something I rarely do, but it was late...). I would like to give it a try.

[trexplorer]

Can anyone with a working DSDT for GA-X58-UD3R post their dsdt file and configuration so I can compare to mine.

 

I have this working but sleep results in reboot when trying to wake:

 

My config:

 

GA-X58-UD3R version 1.0 with f8D BIOS

10.6.2 64 bit mode

10.5 boot loader by Netkas

GE-Force 8800GS 384MB video card

in Syestem/Library/Extensions/ I have ALC-888 sound via hacked AppleHDA.kext and Lan via RTL1000 snow.

In Extra/Extensions/ I have fakesmc 2.5, IOAHCI orange icon fix, jmicron fix, openhaltsretsart, platformuuid kexts.

removed nullcpupm.kext - no problems booting

 

Thanks.