jester1o1 Posted November 15, 2006 Share Posted November 15, 2006 This topic is for Nforce sata only - don't try to hijack. Link to comment Share on other sites More sharing options...
jape Posted November 15, 2006 Share Posted November 15, 2006 Well, weird. QuickTime usually hangs for me instantly here after a IOATAController blocking bus error & associated corruption. Link to comment Share on other sites More sharing options...
subramanyam Posted November 15, 2006 Share Posted November 15, 2006 huh ?? Link to comment Share on other sites More sharing options...
davewolfs Posted November 15, 2006 Share Posted November 15, 2006 Looking at the netBSD source code, the differences between the VIA drivers and Nnvida drivers are hardly any different. This driver in general is fairly generic. The two points of interest in the file viaida.c http://cvsweb.netbsd.org/bsdweb.cgi/src/sy...y_with_tag=MAIN is APO_NVIDIA_REGBASE vs APO_VIA_REGBASE 0x40 vs 0x50 This is easily changed in the AppleViaATA driver. Then the timings Nvidia and the AMD chipsets appear to have the same timings see http://fxr.watson.org/fxr/source/dev/pci/p..._reg.h?v=NETBSD 73 * AMD 7x6 PCI IDE controller is a clone of the VIA apollo. 74 * http://www.amd.com/products/cpg/athlon/tec...s/pdf/22548.pdf (756) 75 * http://www.amd.com/products/cpg/athlon/tec...s/pdf/23167.pdf (766) (Hamlo wanted documentation, here it is) 76 */ 77 78 /* 79 * The nVidia nForce and nForce2 IDE controllers are compatible with 80 * the AMD controllers, but their registers are offset 0x10 bytes. So to get the timings look at: #define APO_UDMA_TIME(channel, drive, x) (((x) & 0xf) << \ 143 (((1 - (channel)) << 4) + ((1 - (drive)) << 3))) static const int8_t via_udma133_tim[] __attribute__((__unused__)) = 154 {0x07, 0x07, 0x06, 0x04, 0x02, 0x01, 0x00}; static const int8_t via_udma100_tim[] __attribute__((__unused__)) = 156 {0x07, 0x07, 0x04, 0x02, 0x01, 0x00}; vs static const int8_t amd7x6_udma_tim[] __attribute__((__unused__)) = 164 {0x02, 0x01, 0x00, 0x04, 0x05, 0x06, 0x07}; Here are the values from AppleViaATATiming static const UInt8 UltraTimingTable[VIA_HW_COUNT][kUDMAModeCount] = { /* UDMA 0 1 2 3 4 5 6 */ { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 }, /* No UDMA */ { 0xc2, 0xc1, 0xc0, 0x00, 0x00, 0x00, 0x00 }, /* VIA ATA33 */ { 0xee, 0xec, 0xea, 0xe9, 0xe8, 0x00, 0x00 }, /* VIA ATA66 */ { 0xf7, 0xf6, 0xf4, 0xf2, 0xf1, 0xf0, 0x00 }, /* VIA ATA100 */ { 0xf7, 0xf7, 0xf6, 0xf4, 0xf2, 0xf1, 0xf0 }, /* VIA ATA133 */ { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 }, /* VIA SATA */ }; Now call me crazy but they look pretty damn similar. I don't have the time right now, or osx86 setup. But I would be pretty damn interested to see the above values changed to the following: static const UInt8 UltraTimingTable[VIA_HW_COUNT][kUDMAModeCount] = { /* UDMA 0 1 2 3 4 5 6 */ { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 }, /* No UDMA */ { 0xc2, 0xc1, 0xc0, 0x00, 0x00, 0x00, 0x00 }, /* VIA ATA33 */ { 0xee, 0xec, 0xea, 0xe9, 0xe8, 0x00, 0x00 }, /* VIA ATA66 */ { 0xf2, 0xf1, 0xf0, 0xf4, 0xf5, 0xf6, 0xf7 }, /* VIA ATA100 */ { 0xf2, 0xf1, 0xf0, 0xf4, 0xf5, 0xf6, 0xf7 }, /* VIA ATA133 */ { 0xf2, 0xf1, 0xf0, 0xf4, 0xf5, 0xf6, 0xf7 }, /* VIA SATA */ }; and also /* * VIA specific PCI config space registers. */ #define VIA_IDE_ENABLE 0x50 #define VIA_IDE_CONFIG 0x51 #define VIA_FIFO_CONFIG 0x53 #define VIA_MISC_1 0x54 #define VIA_MISC_2 0x55 #define VIA_MISC_3 0x56 #define VIA_DATA_TIMING 0x58 #define VIA_CMD_TIMING 0x5e #define VIA_ADDRESS_SETUP 0x5c #define VIA_ULTRA_TIMING 0x60 There is obviously a lot more to look at, but this is my first run through. Use at your own risk. I am just trying to share what my observations are. Based upon my observations. I would definately be building off of the Via driver because of the similarities. Link to comment Share on other sites More sharing options...
jape Posted November 15, 2006 Share Posted November 15, 2006 First, thanks for your observations. Both me & hamlo have already tried upping the regbase. For the changes I made check page 4 of this topic. And timings, AFAIK, are disabled if the detected controller is SATA. There is clearly proof on the VIA SATA and I think on the BSD SATA there is either, but haven't looked. Link to comment Share on other sites More sharing options...
Robert364 Posted November 15, 2006 Share Posted November 15, 2006 Day 3 - SATA still working. Link to comment Share on other sites More sharing options...
jape Posted November 15, 2006 Share Posted November 15, 2006 It didn't freeze or crash, althought blocking bus errors appear ??!?!?!?! :( Maybe I should recover the VIA driver I made which shows when the BUSY flag forever happens, and test if it's happening to you either... will do later Link to comment Share on other sites More sharing options...
davewolfs Posted November 15, 2006 Share Posted November 15, 2006 You are correct. Sorry, just got excited. Looking again at that class it appears that voth Via and Nforce are identical in terms of SATA. Looking at this does not appear to be the case: I found the following at http://mail-index.netbsd.org/current-users...10/25/0003.html. Points of interest are via_sata_chip_map_6, satareg_shift, bus_space_subregion and pciide_mapchan. I am pasting it here in case it gets removed. Subject: looking for VIA/NVIDIA sata testers To: None <current-users@netbsd.org> From: Manuel Bouyer <bouyer@antioche.eu.org> List: current-users Date: 10/25/2006 23:20:53 --EeQfGwPcQSOJBaQU Content-Type: text/plain; charset=us-ascii Content-Disposition: inline Hi, attached is a patch that makes viaide(4) use SATA registers do probe drives, and also correct a few things for the VIA VT6421, and adds the VT8237A to the table. Unfortunably I don't have any way to test this. So if you have a Via or Nvidia system with SATA drive, please give it a try if you can. If no drive is found please set atadebug_mask to 0xff and send the boot messages. There is also a distribution built with these changes, for convenience (there are floppy and iso image here): ftp://ftp-asim.lip6.fr/outgoing/bouyer/i386/ Thanks ! -- Manuel Bouyer <bouyer@antioche.eu.org> NetBSD: 26 ans d'experience feront toujours la difference -- --EeQfGwPcQSOJBaQU Content-Type: text/plain; charset=us-ascii Content-Disposition: attachment; filename="diff.viaide" Index: pci/viaide.c =================================================================== RCS file: /cvsroot/src/sys/dev/pci/viaide.c,v retrieving revision 1.34 diff -u -r1.34 viaide.c --- pci/viaide.c 12 Oct 2006 01:31:33 -0000 1.34 +++ pci/viaide.c 25 Oct 2006 21:11:37 -0000 @@ -44,7 +44,17 @@ static int via_pcib_match(struct pci_attach_args *); static void via_chip_map(struct pciide_softc *, struct pci_attach_args *); +static int via_sata_chip_map_common(struct pciide_softc *, + struct pci_attach_args *); static void via_sata_chip_map(struct pciide_softc *, + struct pci_attach_args *, int); +static void via_sata_chip_map_0(struct pciide_softc *, + struct pci_attach_args *); +static void via_sata_chip_map_6(struct pciide_softc *, + struct pci_attach_args *); +static void via_sata_chip_map_7(struct pciide_softc *, + struct pci_attach_args *); +static void via_sata_chip_map_new(struct pciide_softc *, struct pci_attach_args *); static void via_setup_channel(struct ata_channel *); @@ -103,7 +113,7 @@ { PCI_PRODUCT_NVIDIA_NFORCE2_400_SATA, 0, "NVIDIA nForce2 Ultra 400 Serial ATA Controller", - via_sata_chip_map + via_sata_chip_map_6 }, { PCI_PRODUCT_NVIDIA_NFORCE3_ATA133, 0, @@ -118,12 +128,12 @@ { PCI_PRODUCT_NVIDIA_NFORCE3_250_SATA, 0, "NVIDIA nForce3 250 Serial ATA Controller", - via_sata_chip_map + via_sata_chip_map_6 }, { PCI_PRODUCT_NVIDIA_NFORCE3_250_SATA2, 0, "NVIDIA nForce3 250 Serial ATA Controller", - via_sata_chip_map + via_sata_chip_map_6 }, { PCI_PRODUCT_NVIDIA_NFORCE4_ATA133, 0, @@ -133,12 +143,12 @@ { PCI_PRODUCT_NVIDIA_NFORCE4_SATA1, 0, "NVIDIA nForce4 Serial ATA Controller", - via_sata_chip_map + via_sata_chip_map_6 }, { PCI_PRODUCT_NVIDIA_NFORCE4_SATA2, 0, "NVIDIA nForce4 Serial ATA Controller", - via_sata_chip_map + via_sata_chip_map_6 }, { PCI_PRODUCT_NVIDIA_NFORCE430_ATA133, 0, @@ -148,12 +158,12 @@ { PCI_PRODUCT_NVIDIA_NFORCE430_SATA1, 0, "NVIDIA nForce430 Serial ATA Controller", - via_sata_chip_map + via_sata_chip_map_6 }, { PCI_PRODUCT_NVIDIA_NFORCE430_SATA2, 0, "NVIDIA nForce430 Serial ATA Controller", - via_sata_chip_map + via_sata_chip_map_6 }, { PCI_PRODUCT_NVIDIA_MCP04_IDE, 0, @@ -163,12 +173,12 @@ { PCI_PRODUCT_NVIDIA_MCP04_SATA, 0, "NVIDIA MCP04 Serial ATA Controller", - via_sata_chip_map + via_sata_chip_map_6 }, { PCI_PRODUCT_NVIDIA_MCP04_SATA2, 0, "NVIDIA MCP04 Serial ATA Controller", - via_sata_chip_map + via_sata_chip_map_6 }, { PCI_PRODUCT_NVIDIA_MCP55_IDE, 0, @@ -178,12 +188,12 @@ { PCI_PRODUCT_NVIDIA_MCP55_SATA, 0, "NVIDIA MCP55 Serial ATA Controller", - via_sata_chip_map + via_sata_chip_map_6 }, { PCI_PRODUCT_NVIDIA_MCP55_SATA2, 0, "NVIDIA MCP55 Serial ATA Controller", - via_sata_chip_map + via_sata_chip_map_6 }, { PCI_PRODUCT_NVIDIA_MCP61_IDE, 0, @@ -198,37 +208,37 @@ { PCI_PRODUCT_NVIDIA_MCP61_SATA, 0, "NVIDIA MCP61 Serial ATA Controller", - via_sata_chip_map + via_sata_chip_map_6 }, { PCI_PRODUCT_NVIDIA_MCP61_SATA2, 0, "NVIDIA MCP61 Serial ATA Controller", - via_sata_chip_map + via_sata_chip_map_6 }, { PCI_PRODUCT_NVIDIA_MCP61_SATA3, 0, "NVIDIA MCP61 Serial ATA Controller", - via_sata_chip_map + via_sata_chip_map_6 }, { PCI_PRODUCT_NVIDIA_MCP65_SATA, 0, "NVIDIA MCP65 Serial ATA Controller", - via_sata_chip_map + via_sata_chip_map_6 }, { PCI_PRODUCT_NVIDIA_MCP65_SATA2, 0, "NVIDIA MCP65 Serial ATA Controller", - via_sata_chip_map + via_sata_chip_map_6 }, { PCI_PRODUCT_NVIDIA_MCP65_SATA3, 0, "NVIDIA MCP65 Serial ATA Controller", - via_sata_chip_map + via_sata_chip_map_6 }, { PCI_PRODUCT_NVIDIA_MCP65_SATA4, 0, "NVIDIA MCP65 Serial ATA Controller", - via_sata_chip_map + via_sata_chip_map_6 }, { 0, 0, @@ -251,17 +261,22 @@ { PCI_PRODUCT_VIATECH_VT6421_RAID, 0, "VIA Technologies VT6421 Serial RAID Controller", - via_sata_chip_map, + via_sata_chip_map_new, }, { PCI_PRODUCT_VIATECH_VT8237_SATA, 0, "VIA Technologies VT8237 SATA Controller", - via_sata_chip_map, + via_sata_chip_map_7, + }, + { PCI_PRODUCT_VIATECH_VT8237A_SATA, + 0, + "VIA Technologies VT8237A SATA Controller", + via_sata_chip_map_0, }, { PCI_PRODUCT_VIATECH_VT8237R_SATA, 0, "VIA Technologies VT8237R SATA Controller", - via_sata_chip_map, + via_sata_chip_map_0, }, { 0, 0, @@ -632,23 +647,13 @@ pci_conf_read(sc->sc_pc, sc->sc_tag, APO_UDMA(sc))), DEBUG_PROBE); } -static void -via_sata_chip_map(struct pciide_softc *sc, struct pci_attach_args *pa) +static int +via_sata_chip_map_common(struct pciide_softc *sc, struct pci_attach_args *pa) { - struct pciide_channel *cp; - pcireg_t interface = PCI_INTERFACE(pa->pa_class); - int channel; - bus_size_t cmdsize, ctlsize; + bus_size_t satasize; if (pciide_chipen(sc, pa) == 0) - return; - - if (interface == 0) { - ATADEBUG_PRINT(("via_sata_chip_map interface == 0\n"), - DEBUG_PROBE); - interface = PCIIDE_INTERFACE_BUS_MASTER_DMA | - PCIIDE_INTERFACE_PCI(0) | PCIIDE_INTERFACE_PCI(1); - } + return 0; aprint_normal("%s: bus-master DMA support present", sc->sc_wdcdev.sc_atac.atac_dev.dv_xname); @@ -669,13 +674,212 @@ sc->sc_wdcdev.sc_atac.atac_set_modes = sata_setup_channel; wdc_allocate_regs(&sc->sc_wdcdev); + if (pci_mapreg_map(pa, PCI_MAPREG_START + 0x14, + PCI_MAPREG_TYPE_IO, 0, &sc->sc_ba5_st, &sc->sc_ba5_sh, + NULL, &satasize) != 0) { + if (pci_mapreg_map(pa, PCI_MAPREG_START + 0x14, + PCI_MAPREG_TYPE_MEM | PCI_MAPREG_MEM_TYPE_32BIT, + 0, &sc->sc_ba5_st, &sc->sc_ba5_sh, + NULL, &satasize) != 0) { + aprint_error("%s: couldn't map sata regs\n", + sc->sc_wdcdev.sc_atac.atac_dev.dv_xname); + return 0; + } + } + return 1; +} + +static void +via_sata_chip_map(struct pciide_softc *sc, struct pci_attach_args *pa, + int satareg_shift) +{ + struct pciide_channel *cp; + struct ata_channel *wdc_cp; + struct wdc_regs *wdr; + pcireg_t interface = PCI_INTERFACE(pa->pa_class); + int channel; + bus_size_t cmdsize, ctlsize; + + if (via_sata_chip_map_common(sc, pa) == 0) + return; + + if (interface == 0) { + ATADEBUG_PRINT(("via_sata_chip_map interface == 0\n"), + DEBUG_PROBE); + interface = PCIIDE_INTERFACE_BUS_MASTER_DMA | + PCIIDE_INTERFACE_PCI(0) | PCIIDE_INTERFACE_PCI(1); + } for (channel = 0; channel < sc->sc_wdcdev.sc_atac.atac_nchannels; channel++) { cp = &sc->pciide_channels[channel]; if (pciide_chansetup(sc, channel, interface) == 0) continue; + wdc_cp = &cp->ata_channel; + wdr = CHAN_TO_WDC_REGS(wdc_cp); + wdr->sata_iot = sc->sc_ba5_st; + wdr->sata_baseioh = sc->sc_ba5_sh; + if (bus_space_subregion(wdr->sata_iot, wdr->sata_baseioh, + (wdc_cp->ch_channel << satareg_shift) + 0x0, 1, + &wdr->sata_status) != 0) { + aprint_error("%s: couldn't map channel %d " + "sata_status regs\n", + sc->sc_wdcdev.sc_atac.atac_dev.dv_xname, + wdc_cp->ch_channel); + continue; + } + if (bus_space_subregion(wdr->sata_iot, wdr->sata_baseioh, + (wdc_cp->ch_channel << satareg_shift) + 0x4, 1, + &wdr->sata_error) != 0) { + aprint_error("%s: couldn't map channel %d " + "sata_error regs\n", + sc->sc_wdcdev.sc_atac.atac_dev.dv_xname, + wdc_cp->ch_channel); + continue; + } + if (bus_space_subregion(wdr->sata_iot, wdr->sata_baseioh, + (wdc_cp->ch_channel << satareg_shift) + 0x8, 1, + &wdr->sata_control) != 0) { + aprint_error("%s: couldn't map channel %d " + "sata_control regs\n", + sc->sc_wdcdev.sc_atac.atac_dev.dv_xname, + wdc_cp->ch_channel); + continue; + } + sc->sc_wdcdev.sc_atac.atac_probe = wdc_sataprobe; pciide_mapchan(pa, cp, interface, &cmdsize, &ctlsize, pciide_pci_intr); } } + +static void +via_sata_chip_map_0(struct pciide_softc *sc, struct pci_attach_args *pa) +{ + via_sata_chip_map(sc, pa, 0); +} + +static void +via_sata_chip_map_6(struct pciide_softc *sc, struct pci_attach_args *pa) +{ + via_sata_chip_map(sc, pa, 6); +} + +static void +via_sata_chip_map_7(struct pciide_softc *sc, struct pci_attach_args *pa) +{ + via_sata_chip_map(sc, pa, 7); +} + +static void +via_sata_chip_map_new(struct pciide_softc *sc, struct pci_attach_args *pa) +{ + struct pciide_channel *cp; + struct ata_channel *wdc_cp; + struct wdc_regs *wdr; + pcireg_t interface = PCI_INTERFACE(pa->pa_class); + int channel; + bus_size_t cmdsize; + pci_intr_handle_t intrhandle; + const char *intrstr; + int i; + + if (via_sata_chip_map_common(sc, pa) == 0) + return; + + if (interface == 0) { + ATADEBUG_PRINT(("via_sata_chip_map interface == 0\n"), + DEBUG_PROBE); + interface = PCIIDE_INTERFACE_BUS_MASTER_DMA | + PCIIDE_INTERFACE_PCI(0) | PCIIDE_INTERFACE_PCI(1); + } + + if (pci_intr_map(pa, &intrhandle) != 0) { + aprint_error("%s: couldn't map native-PCI interrupt\n", + sc->sc_wdcdev.sc_atac.atac_dev.dv_xname); + return; + } + intrstr = pci_intr_string(pa->pa_pc, intrhandle); + sc->sc_pci_ih = pci_intr_establish(pa->pa_pc, + intrhandle, IPL_BIO, pciide_pci_intr, sc); + if (sc->sc_pci_ih == NULL) { + aprint_error( + "%s: couldn't establish native-PCI interrupt", + sc->sc_wdcdev.sc_atac.atac_dev.dv_xname); + if (intrstr != NULL) + aprint_error(" at %s", intrstr); + aprint_error("\n"); + return; + } + aprint_normal("%s: using %s for native-PCI interrupt\n", + sc->sc_wdcdev.sc_atac.atac_dev.dv_xname, + intrstr ? intrstr : "unknown interrupt"); + + for (channel = 0; channel < sc->sc_wdcdev.sc_atac.atac_nchannels; + channel++) { + cp = &sc->pciide_channels[channel]; + if (pciide_chansetup(sc, channel, interface) == 0) + continue; + cp->ata_channel.ch_ndrive = 1; + wdc_cp = &cp->ata_channel; + wdr = CHAN_TO_WDC_REGS(wdc_cp); + + wdr->sata_iot = sc->sc_ba5_st; + wdr->sata_baseioh = sc->sc_ba5_sh; + if (bus_space_subregion(wdr->sata_iot, wdr->sata_baseioh, + (wdc_cp->ch_channel << 6) + 0x0, 1, + &wdr->sata_status) != 0) { + aprint_error("%s: couldn't map channel %d " + "sata_status regs\n", + sc->sc_wdcdev.sc_atac.atac_dev.dv_xname, + wdc_cp->ch_channel); + continue; + } + if (bus_space_subregion(wdr->sata_iot, wdr->sata_baseioh, + (wdc_cp->ch_channel << 6) + 0x4, 1, + &wdr->sata_error) != 0) { + aprint_error("%s: couldn't map channel %d " + "sata_error regs\n", + sc->sc_wdcdev.sc_atac.atac_dev.dv_xname, + wdc_cp->ch_channel); + continue; + } + if (bus_space_subregion(wdr->sata_iot, wdr->sata_baseioh, + (wdc_cp->ch_channel << 6) + 0x8, 1, + &wdr->sata_control) != 0) { + aprint_error("%s: couldn't map channel %d " + "sata_control regs\n", + sc->sc_wdcdev.sc_atac.atac_dev.dv_xname, + wdc_cp->ch_channel); + continue; + } + sc->sc_wdcdev.sc_atac.atac_probe = wdc_sataprobe; + + if (pci_mapreg_map(pa, (0x10 + (4 * (channel))), + PCI_MAPREG_TYPE_IO, 0, &wdr->cmd_iot, &wdr->cmd_baseioh, + NULL, &cmdsize) != 0) { + aprint_error("%s: couldn't map %s channel regs\n", + sc->sc_wdcdev.sc_atac.atac_dev.dv_xname, + cp->name); + } + wdr->ctl_iot = wdr->cmd_iot; + for (i = 0; i < WDC_NREG; i++) { + if (bus_space_subregion(wdr->cmd_iot, + wdr->cmd_baseioh, i, i == 0 ? 4 : 1, + &wdr->cmd_iohs) != 0) { + aprint_error("%s: couldn't subregion %s " + "channel cmd regs\n", + sc->sc_wdcdev.sc_atac.atac_dev.dv_xname, + cp->name); + return; + } + } + if (bus_space_subregion(wdr->cmd_iot, wdr->cmd_baseioh, + WDC_NREG + 2, 1, &wdr->ctl_ioh) != 0) { + aprint_error("%s: couldn't map channel %d ctl regs\n", + sc->sc_wdcdev.sc_atac.atac_dev.dv_xname, channel); + return; + } + wdc_init_shadow_regs(wdc_cp); + wdcattach(wdc_cp); + } +} --EeQfGwPcQSOJBaQU-- Link to comment Share on other sites More sharing options...
Robert364 Posted November 15, 2006 Share Posted November 15, 2006 Jape, I do not use quicktime. But VLC player... and yes it recovers after the IOATAblocking devices - it just crashes - sometimes- VLC. Link to comment Share on other sites More sharing options...
Martin B Posted November 15, 2006 Share Posted November 15, 2006 Its nice to see people are trying to get this to work, I think a lot of people, myself included, would be very grateful to whoever can fix this. Having read every thread relating to nforce4 SATA problems, it suggests to me that there must be some information on the internet relating to other operating systems with this problem.. For example when the nforce4 first came out, i'm sure there will have been plenty of people with linux who gave the nforce3 drivers a go... Did they have the same problem? I have been looking to see what I can find on this, and since I can't tell what would be useful information, I don't have any links to paste, but if I do see something clearly related, i'll paste it here Martin Link to comment Share on other sites More sharing options...
davewolfs Posted November 16, 2006 Share Posted November 16, 2006 I think Hamlo needs to start sharing his findings or start keeping us up to date. Another thing that I found odd, is that the following devices according to the netbsd drivers are not SATA. All SATA drivers have different addresses. /* * Supported devices (ATA controller and PCI-ISA bridges). */ #define PCI_VIA_ID 0x1106 #define PCI_VIA_82C571 0x0571 #define PCI_VIA_82C586 0x0586 #define PCI_VIA_82C596 0x0596 #define PCI_VIA_82C686 0x0686 #define PCI_VIA_8231 0x8231 #define PCI_VIA_8233 0x3074 #define PCI_VIA_8233_C 0x3109 #define PCI_VIA_8233_A 0x3147 #define PCI_VIA_8235 0x3177 #define PCI_VIA_8237 0x3227 What driver is used for the intel SATA? Link to comment Share on other sites More sharing options...
jape Posted November 16, 2006 Share Posted November 16, 2006 --> QUOTE(Martin B @ Nov 15 2006, 10:54 PM) <{POST_SNAPBACK}> For example when the nforce4 first came out, i'm sure there will have been plenty of people with linux who gave the nforce3 drivers a go... Did they have the same problem? Since I've not found any proof, I don't think they had any problem at all. In fact they still use the nforce3 driver with proper device IDs.. Later NVIDIA went and added the SATA Hotplug & NCQ support to it. Intel uses AHCI. Link to comment Share on other sites More sharing options...
davewolfs Posted November 16, 2006 Share Posted November 16, 2006 I am pretty busy these days so I won't be looking at this again for a bit, but I found the following to be VERY useful. The code in terms of a comparison of the differences between the VIA and Nvidia chipsets are very clear. The modes to enable functionality in the registers are very clear as well. Much more useful then the NetBSD code. See: http://www.freebsd.org/cgi/cvsweb.cgi/src/...x-cvsweb-markup Link to comment Share on other sites More sharing options...
DaemonES Posted November 16, 2006 Share Posted November 16, 2006 Newest sources from hamlo http://forum.applelife.ru/index.php?act=At...post&id=245 Link to comment Share on other sites More sharing options...
jape Posted November 16, 2006 Share Posted November 16, 2006 Newest sources from hamlo http://forum.applelife.ru/index.php?act=At...post&id=245 How's he doing? I don't really understand russian... I'm currently reading the driver davewolfs provided. Link to comment Share on other sites More sharing options...
DaemonES Posted November 16, 2006 Share Posted November 16, 2006 jape you can download it here: http://topmods.net/OMC/AppleNVIDIAATA_1.zip Hamlo sad, that this driver 100% works for his Biostar board. Blocking bus error may cause of wrong interrupts. Link to comment Share on other sites More sharing options...
jape Posted November 16, 2006 Share Posted November 16, 2006 (edited) Archive: Desktop/AppleNVIDIAATA_1.zip End-of-central-directory signature not found. Either this file is not a zipfile... Seems that archive is corrupt. I will try again from Windows. EDIT: OK from Windows. Seems pretty interesting, there are pieces from Intel's ICH6 kext; like: // IOATAController::synchronousIO() asserts nIEN bit in order to disable // drive interrupts during polled mode command execution. The problem is // that this will float the INTRQ line and put it in high impedance state, // which on certain systems has the undesirable effect of latching a false // interrupt on the interrupt controller. Perhaps those systems lack a // strong pull down resistor on the INTRQ line. Experiment shows that the // interrupt event source is signalled, and its producerCount incremented // after every synchronousIO() call. This false interrupt can become // catastrophic after reverting to async operations since software can // issue a command, handle the false interrupt, and issue another command // to the drive before the actual completion of the first command, leading // to a irrecoverable bus hang. This function is called after an ATA bus // reset. Waking from system sleep will exercise this path. // The workaround is to mask the interrupt line while the INTRQ line is // floating (or bouncing). This is so far the best possible explanation I've found to the issue (although doesn't explain it all). What do you think? Edited November 16, 2006 by jape Link to comment Share on other sites More sharing options...
jape Posted November 16, 2006 Share Posted November 16, 2006 (edited) It fails to build here, missing some member declarations. I could correct them but I'm afraid there's a packing version mismatch or some XCode setting I'm setting wrong. - AppleNVIDIAATADriver::resetTimingsForDevice uses some undeclared members, since the functon is uncalled / unneeded I commented/deleted it. - In the same file I'm missing definitions (& code) for setSATAPortEnable, getSATAPortPresentStatus in function scanForDrives() . Edit: Oops... Trying to translate russian to english I found that this is just some sample source? EDIT2: Ok I tried to boot it by replacing scanForDrives() with older VIA version, and also removed PATA device ids (i don't want it to mess with my PATA disk). It booted, however... Nov 16 22:44:50 localhost kernel[0]: IDE0: family specific matching fails Nov 16 22:44:51 localhost kernel[0]: SAT1: family specific matching fails Nov 16 22:44:51 localhost kernel[0]: AppleNVIDIAATARoot::probe( 0x2b56e00 ) Nov 16 22:44:51 localhost kernel[0]: Module ROOT:fPCILock = IOLockAlloc() Nov 16 22:44:51 localhost kernel[0]: Module ROOT:fPCILock = IOLockAlloc() Successfull Nov 16 22:44:51 localhost kernel[0]: SAT2: family specific matching fails Nov 16 22:44:51 localhost kernel[0]: AppleNVIDIAATARoot::probe( 0x2b4d280 ) Nov 16 22:44:51 localhost kernel[0]: Module ROOT:fPCILock = IOLockAlloc() Nov 16 22:44:51 localhost kernel[0]: Module ROOT:fPCILock = IOLockAlloc() Successfull Nov 16 22:44:51 localhost kernel[0]: IDE0: family specific matching fails Nov 16 22:44:51 localhost kernel[0]: NForce Module maked by Hamlo (C) 2006 Nov 16 22:44:51 localhost kernel[0]: AppleNVIDIAATADriver::getBMBaseAddress( 0x293c400, 0, 0x293c524 ) Nov 16 22:44:51 localhost kernel[0]: AppleNVIDIAATADriver: BMBaseAddr = d800 Nov 16 22:44:51 localhost kernel[0]: AppleNVIDIAATADriver::resetBusTimings( 0x293c400 ) [CH0] Nov 16 22:44:51 localhost kernel[0]: PCI_IDE_ENABLE 0x13 Nov 16 22:44:51 localhost kernel[0]: PCI_IDE_CONFIG 0xf0 Nov 16 22:44:51 localhost kernel[0]: PCI_CABLE_DETECT 0x00 Nov 16 22:44:51 localhost kernel[0]: PCI_FIFO_CONFIG 0x15 Nov 16 22:44:51 localhost kernel[0]: NForce Module maked by Hamlo (C) 2006 Nov 16 22:44:51 localhost kernel[0]: AppleNVIDIAATADriver::getBMBaseAddress( 0x293cc00, 1, 0x293cd24 ) Nov 16 22:44:51 localhost kernel[0]: AppleNVIDIAATADriver: BMBaseAddr = d808 Nov 16 22:44:51 localhost kernel[0]: AppleNVIDIAATADriver::resetBusTimings( 0x293cc00 ) [CH1] Nov 16 22:44:51 localhost kernel[0]: PCI_IDE_ENABLE 0x13 Nov 16 22:44:51 localhost kernel[0]: PCI_IDE_CONFIG 0xf0 Nov 16 22:44:51 localhost kernel[0]: PCI_CABLE_DETECT 0x00 Nov 16 22:44:51 localhost kernel[0]: PCI_FIFO_CONFIG 0x15 Nov 16 22:44:51 localhost kernel[0]: NForce Module maked by Hamlo (C) 2006 Nov 16 22:44:51 localhost kernel[0]: AppleNVIDIAATADriver::getBMBaseAddress( 0x26cb400, 0, 0x26cb524 ) Nov 16 22:44:51 localhost kernel[0]: AppleNVIDIAATADriver: BMBaseAddr = c400 Nov 16 22:44:51 localhost kernel[0]: AppleNVIDIAATADriver::resetBusTimings( 0x26cb400 ) [CH0] Nov 16 22:44:51 localhost kernel[0]: PCI_IDE_ENABLE 0x13 Nov 16 22:44:51 localhost kernel[0]: PCI_IDE_CONFIG 0xf0 Nov 16 22:44:51 localhost kernel[0]: PCI_CABLE_DETECT 0x00 Nov 16 22:44:51 localhost kernel[0]: PCI_FIFO_CONFIG 0x15 Nov 16 22:44:51 localhost kernel[0]: NForce Module maked by Hamlo (C) 2006 Nov 16 22:44:51 localhost kernel[0]: AppleNVIDIAATADriver::getBMBaseAddress( 0x2683400, 1, 0x2683524 ) Nov 16 22:44:51 localhost kernel[0]: AppleNVIDIAATADriver: BMBaseAddr = c408 Nov 16 22:44:51 localhost kernel[0]: AppleNVIDIAATADriver::resetBusTimings( 0x2683400 ) [CH1] Nov 16 22:44:51 localhost kernel[0]: PCI_IDE_ENABLE 0x13 Nov 16 22:44:51 localhost kernel[0]: PCI_IDE_CONFIG 0xf0 Nov 16 22:44:51 localhost kernel[0]: PCI_CABLE_DETECT 0x00 Nov 16 22:44:51 localhost kernel[0]: PCI_FIFO_CONFIG 0x15 Nov 16 22:44:51 localhost kernel[0]: AppleNVIDIAATADriver::free( 0x293c400 ) Nov 16 22:44:51 localhost kernel[0]: AppleNVIDIAATADriver::free( 0x293cc00 ) Nov 16 22:44:51 localhost kernel[0]: AppleNVIDIAATADriver::provideBusInfo( 0x26cb400, 0x2148880 ) Nov 16 22:44:51 localhost kernel[0]: AppleNVIDIAATADriver::provideBusInfo Device PATA Nov 16 22:44:51 localhost kernel[0]: AppleNVIDIAATADriver: NVIDIA (CMD 0x9e0, CTR 0xbe0, IRQ 23, BM 0xc400) Nov 16 22:44:51 localhost kernel[0]: AppleNVIDIAATADriver::free( 0x2683400 ) Nov 16 22:44:51 localhost kernel[0]: AppleNVIDIAATADriver::provideBusInfo( 0x26cb400, 0x2563b40 ) Nov 16 22:44:51 localhost kernel[0]: AppleNVIDIAATADriver::provideBusInfo Device PATA Nov 16 22:44:51 localhost kernel[0]: AppleNVIDIAATADriver::selectConfig( 0x26cb400, 0x25655e0, 0 ) Nov 16 22:44:51 localhost kernel[0]: AppleNVIDIAATADriver::selectTimingParameter( 0x26cb400, 0 ) Nov 16 22:44:51 localhost kernel[0]: AppleNVIDIAATADriver: selected PIO mode 4 Nov 16 22:44:51 localhost kernel[0]: AppleNVIDIAATADriver: 80-conductor cable not detected Nov 16 22:44:51 localhost kernel[0]: AppleNVIDIAATADriver: selected Ultra mode 2 Nov 16 22:44:51 localhost kernel[0]: AppleNVIDIAATADriver: CH0 DRV0 wrote 0xc0 to offset 0x63 Nov 16 22:44:51 localhost kernel[0]: PCI_IDE_ENABLE 0x13 Nov 16 22:44:51 localhost kernel[0]: PCI_IDE_CONFIG 0xf0 Nov 16 22:44:51 localhost kernel[0]: PCI_CABLE_DETECT 0x00 Nov 16 22:44:51 localhost kernel[0]: PCI_FIFO_CONFIG 0x15 Nov 16 22:44:51 localhost kernel[0]: [ NVIDIA nForce4 Serial ATA II Controller 2 Ch0 Drive 0 ] Nov 16 22:44:51 localhost kernel[0]: Command Active 90 ns Nov 16 22:44:51 localhost kernel[0]: Command Recovery 60 ns Nov 16 22:44:51 localhost kernel[0]: Address Setup 30 ns Nov 16 22:44:51 localhost kernel[0]: Data Active 90 ns Nov 16 22:44:51 localhost kernel[0]: Data Recovery 60 ns Nov 16 22:44:51 localhost kernel[0]: UDMA Timing 0xc0 Nov 16 22:44:51 localhost kernel[0]: IOATAController device blocking bus. Instant hard-lock. No disk drives detected at all. Edited November 16, 2006 by jape Link to comment Share on other sites More sharing options...
subramanyam Posted November 17, 2006 Share Posted November 17, 2006 Did anybody try this with the new kernel (8.8.1) ?? Any differences ? Coz i read about a few soundcards working with the new kernel... Link to comment Share on other sites More sharing options...
davewolfs Posted November 17, 2006 Share Posted November 17, 2006 How's he doing? I don't really understand russian... I'm currently reading the driver davewolfs provided. The posted file is corrupt. Please post a non corrupt file. Link to comment Share on other sites More sharing options...
jape Posted November 17, 2006 Share Posted November 17, 2006 Did anybody try this with the new kernel (8.8.1) ??Any differences ? Coz i read about a few soundcards working with the new kernel... What seems usefull is that 10.4.8 has got a bumped IOATAController extension. However, so far I know no Hackintosh using that kext. Link to comment Share on other sites More sharing options...
timmyj Posted November 17, 2006 Share Posted November 17, 2006 so does this thing actually work? did hamlo write this himself? Link to comment Share on other sites More sharing options...
subramanyam Posted November 18, 2006 Share Posted November 18, 2006 tried with10.4.8( 8.8.1 kernel) and hamlo's kext...same error Link to comment Share on other sites More sharing options...
subramanyam Posted November 18, 2006 Share Posted November 18, 2006 Can anybody with xcode compile and upload the latest kext from hamlo ?? Link to comment Share on other sites More sharing options...
westep23 Posted November 18, 2006 Share Posted November 18, 2006 That's the proble hamlo's latest posted source the zip is corrupt . You can unzip it with stuffit but some files are missing so it wont compile. Link to comment Share on other sites More sharing options...
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