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DSDT Auto-Patcher

DSDT patcher

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#21
oSxFr33k

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@MaLd0n,

Thanks for the reply. I am still lost as to how one can use this in OSX if they depend on booting OSX with DSDT? Don't you have to at least patch the HPET in order to boot OSX in SNow Leopard?

So I should try and boot without a DSDT or DSDT override=no? Maybe I am not thinking clearly on this or overlooking something.

Tell me how I can boot cleanly without kernel panics etc? I thought I had to have at least the HPET patch in place in order to boot OSX SL?

Thanks


EDITED A FEW MINUTES LATER:

So I basically have to try to boot to OSX with or without DSDT override but making sure no patching is already done to the DSDT which I understand but do you understand my point to?

You say another way is to use DSDT editor in Linux or windows and load the patch from java directory. Can I do that in OSX to? Run the DSDT editor load my Vanilla DSDT.aml then load your patch?

I did try it and it seems to have removed a lot of stuff and did not fix the Local to "local" error as well as one more error but the DSDT editor fix them.

It really cut out a lot of script from my DSDT. A bunch of devices? I was curious as to why they were removed?

Thanks

#22
MaLd0n

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@MaLd0n,

Thanks for the reply. I am still lost as to how one can use this in OSX if they depend on booting OSX with DSDT? Don't you have to at least patch the HPET in order to boot OSX in SNow Leopard?

So I should try and boot without a DSDT or DSDT override=no? Maybe I am not thinking clearly on this or overlooking something.

Tell me how I can boot cleanly without kernel panics etc? I thought I had to have at least the HPET patch in place in order to boot OSX SL?

Thanks


Extract your original DSDT in Windows or Linux
Extract the patch --> DSDT Auto-Patcher GA.../CONTENTS/RESOURCES/JAVA/patch.txt
Use DSDT EDITOR and PATCHER, apply the patch in original DSDT
DSL / Load from file
Patch / Load from file
AML / Compile/button Fix errors
AML / Save to file...
replace the DSDT

or

Use Nullcpupowermanagement.kext(some other kext if you need), delete DSDT
Attached File  NullCPUPowerManagement.kext.zip   8.96KB   37 downloads
Reboot
Apply "DSDT Auto-Patcher GA P35-DS3"
copy DSDT to folder Extra
Delete Nullcpupowermanagement.kext, etc
Reboot

or

apply the patches individually
Use DSDT EDITOR and PATCHER




I did try it and it seems to have removed a lot of stuff and did not fix the Local to "local" error as well as one more error but the DSDT editor fix them.

:)
has no reason to be in the patch
the DSDT EDITOR need to do their part

It really cut out a lot of script from my DSDT. A bunch of devices? I was curious as to why they were removed?

they are not used by OSX

#23
oSxFr33k

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@MaLd0n,

I am trying the first method which I did before and its not patching the GA-G41M-ES2L Correctly? It didn't fix HPET, I get kernel Panic and it left PX40 as PX40? It left Azul and lot of other stuff did not change and I still think it removed too much or maybe it didn't?


My Mobo is v1.4 Bios F9, but that should not affect the patching right?

Here is my Original DSDT extracted from Ubuntu Live CD and also attached is the DSDT that was patched by your first method above.

My Untouched DSDT:

Attached File  GA_G41M_ES2l.dsl.zip   12.51KB   23 downloads

Patched DSDT:

Attached File  Patched_DSDT.dsl.zip   10.57KB   18 downloads

As you can see its not patching right.



EDITED:

I am getting two issues. One is the HPET error. No HPETS Available, CPUs configured Incorrectly. 2nd error is ACPI_SMC_PlatofrmPlugin _CST Evaluation Failed.

My ID is for LCPB is 27B8 not 27B9. Changing it made no difference I still get the error.

I have nothing set special in my com.apple.Boot.plist, just the usual graphics and ethernet.

Maybe that patch is for G41MT? Or G41M version 1.3?

#24
MaLd0n

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@MaLd0n,

It didn't fix HPET, I get kernel Panic

HPET is enabled in bios?

HPET fix, yes
before
Device (HPET)                {                    Name (_HID, EisaId ("PNP0103"))                    Name (ATT3, ResourceTemplate ()                    {                        IRQNoFlags ()                            {0}                        IRQNoFlags ()                            {8}                        Memory32Fixed (ReadWrite,                            0xFED00000,         // Address Base                            0x00000400,         // Address Length                            )                    })                    Name (ATT4, ResourceTemplate ()                    {                    })                    Method (_STA, 0, NotSerialized)                    {                        If (LGreaterEqual (OSFX, 0x03))                        {                            If (HPTF)                            {                                Return (0x0F)                            }                            Else                            {                                Return (0x00)                            }                        }                        Else                        {                            Return (0x00)                        }                    }                    Method (_CRS, 0, NotSerialized)                    {                        If (LGreaterEqual (OSFX, 0x03))                        {                            If (HPTF)                            {                                Return (ATT3)                            }                            Else                            {                                Return (ATT4)                            }                        }                        Else                        {                            Return (ATT4)                        }                    }                }

after
Device (HPET)                {                    Name (_HID, EisaId ("PNP0103"))                    Name (ATT3, ResourceTemplate ()                    {                        IRQNoFlags ()                            {0}                        IRQNoFlags ()                            {8}                        Memory32Fixed (ReadWrite,                            0xFED00000,         // Address Base                            0x00000400,         // Address Length                            )                    })                    Name (ATT4, ResourceTemplate ()                    {                    })                    Method (_STA, 0, NotSerialized)                    {                        Return (0x0F)                    }                    Method (_CRS, 0, NotSerialized)                    {                        Return (ATT3)                    }                }



and it left PX40 as PX40?

PATCH Gigabyte GA G41M-ES2L
DTGP
HID/CID
HPET
IRQs
RTC
SBUS
SHUTDOWN
EHCI
LPC
REMOVED DEVICES
_WAK

No "renamed devices" in patch
I see no difference
rename or not
whatever

Attached File  oSxFr33k_DSDT.zip   6.53KB   19 downloads

#25
oSxFr33k

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@MaLd0n,

I edited my post above. My LPCB ID is 27B8 not 27B9 and HPET is set and to 64 bit in Bios unless while I was messing around it may have gotten reset, Ill check it sorry if it did.

The DSDT is very nice and compact and if I can get it to work Great!!

#26
MaLd0n

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@MaLd0n,

I edited my post above. My LPCB ID is 27B8 not 27B9 and HPET is set and to 64 bit in Bios unless while I was messing around it may have gotten reset, Ill check it sorry if it did.

The DSDT is very nice and compact and if I can get it to work Great!!


27b9 --> ICH7
you need it
No speedstepping without that.
Posted Image

0xB9, 0x27, 0x00, 0x00
}
}, Local0)
DTGP (Arg0, Arg1, Arg2, Arg3, RefOf (Local0))
Return (Local0)
}
} _linenums:0'>Method (_DSM, 4, NotSerialized) { Store (Package (0x02) { "device-id", Buffer (0x04) { <strong class='bbc'>0xB9, 0x27</strong>, 0x00, 0x00 } }, Local0) DTGP (Arg0, Arg1, Arg2, Arg3, RefOf (Local0)) Return (Local0) } }

:)



Add in boot.plist
<key>GeneratePStates</key>
<string>Yes</string>
<key>GenerateCStates</key>
<string>Yes</string>
Posted Image

#27
oSxFr33k

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@MaLd0n,

Ok My mistake I looked at my own edited working DSDT and it is 27B9 so its to fake it which I did not realize. I also noticed during reboots from trial and error my HPET got reset to 32 bit or maybe I chose last known working condition and it defaulted back to 32 bit so sorry about that. I still have the message a bit different now, CPU 2 Has No HPET assigned.

I actually am not using generate at all. Do I need SSDT tables if I do that? None of my SSDT tables extracted from Ubuntu Live CD extract the CPU CST tables only the CPU IST and PM SSDT tables.

have a quick look at my own edited DSDT and look at the section for CPU CST. I borrowed that from a user with the same Mobo. he has the CST and PSS only for CPU0? Its working that way with dropSSDT=Yes in com.apple.Boot.plist.

I also borrowed his HPET script very weird and it works. He has IRQs in there twice? Why I don't know but it works. I don't have SMBUS script in mine. Is it needed?

Attached File  My_Edits__Working_DSDT.dsl.zip   13.35KB   20 downloads

#28
MaLd0n

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please back up your extra folder
and test with this
nothing more, nothing less
Attached File  oSxFr33k.zip   486.09KB   38 downloads
DSDT HPET1, BOOT.PLIST, SMBIOS, FOLDER EXTRA

Do I need SSDT tables if I do that?

Nops


your problem is solved as well?
Device (HPET)
				{
					Name (_HID, EisaId ("PNP0103"))
					Name (ATT3, ResourceTemplate ()
					{
						IRQNoFlags ()
							{0}
						IRQNoFlags ()
							{8}
						Memory32Fixed (ReadWrite,
							0xFED00000,		 // Address Base
							0x00000400,		 // Address Length
							)
					})
					Name (ATT4, ResourceTemplate ()
					{
						IRQNoFlags ()
							{0}
						IRQNoFlags ()
							{8}
						Memory32Fixed (ReadWrite,
							0xFED00000,		 // Address Base
							0x00000400,		 // Address Length
							)
					})
					Method (_STA, 0, NotSerialized)
					{
						Return (0x0F)
					}

					Method (_CRS, 0, NotSerialized)
					{
						Return (ATT3)
					}
				}
DSDT HPET2
Attached File  dsdt.aml_HPET_2.zip   5.37KB   22 downloads

#29
oSxFr33k

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@MaLd0n,

After several boots of trial and error using the DSDT=<file> with the latest chameleon release I now see that it does not work. I have to actually install the DSDT which is crazy but it boots now.

All I need to do is resolve the CST evaluation error. I put back 27B9 and I still have that error but not with my DSTD from above. Do you think generate P and C states will remove the error?

#30
MaLd0n

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use the folder extra that I sent you
it does not work, use DSDT HPET2

#31
oSxFr33k

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@MaLd0n,

Thanks for taking all this time and help really appreciate it very much. As I said before trying to load a DSDT=<file> must be broken in the latest Beta Chameleon 2 RC5 r616. The HPET error was because of that not your DSDT.

Its finally working. I am using your com.apple.Boot.plist and your patched DSTD from the Extra folder you provided and not the other one with HPET 2.

HPET errors gone. ACPI_SMC _CST evaluation errors are gone. Exactly what got rid of the of the ACPI_SMC _CST evaluation error? Was it the generate C and P states?

I am using SLice's FakeSMC with monitor from the ProjectOSX forum and have it in /S/L/E. WHich FakeSMC is the one you provided? I know Mozo has a newer mod where you can now run it in /E/E. Is that the one you provided?

I had to add graphicsenabler=yes in com...

Only thing left to do is add HDEF. I had audio before but gone now so no biggie a simple fix in your DSDT.

Thanks Again. Very nice, Compact DSDT and Fast boot!!!

#32
MaLd0n

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HPET errors gone. ACPI_SMC _CST evaluation errors are gone. Exactly what got rid of the of the ACPI_SMC _CST evaluation error? Was it the generate C and P states?

Man!
Lpc loaded + HPET fix(Gigabyte) + Chameleon RC5=native power managment :P
We need not worry about that anymore

or

Lpc loaded + HPET fix(Gigabyte) +...
FFVV, // FF = FID, VV = VID\n
Zero // P-state 0\n
}, \n
Package (0x06)\n
{\n
Zero, \n
Zero, \n
0x10, \n
0x10, \n
0xFFVV, // FF = FID, VV = VID\n
One // P-state 1\n
}, \n
Package (0x06)\n
{\n
Zero, \n
Zero, \n
0x10, \n
0x10, \n
0xFFVV, // FF = FID, VV = VID\n
0x02 // P-state 2\n
}, \n
Package (0x06)\n
{\n
Zero, \n
Zero, \n
0x10, \n
0x10, \n
0xFFVV, // FF = FID, VV = VID\n
0x03 // P-state 3\n
}\n
})\n
}
end;
into method label _PSD parent_label CPU0 remove_entry;
into processor label CPU0 insert
begin
Method (_PSD, 0, NotSerialized)\n
{\n
Return (Package (0x05)\n
{\n
0x05, \n
Zero, \n
Zero, \n
0xFC, \n
0x04\n
})\n
}
end;
into method label _CST parent_label CPU0 remove_entry;
into processor label CPU0 insert
begin
Method (_CST, 0, NotSerialized)\n
{\n
Return (Package (0x02)\n
{\n
One, \n
Package (0x04)\n
{\n
ResourceTemplate ()\n
{\n
Register (FFixedHW, \n
0x01, // Bit Width\n
0x02, // Bit Offset\n
0x0000000000000000, // Address\n
0x01, // Access Size\n
)\n
}, \n
One, \n
0x9D, \n
0x03E8\n
}\n
})\n
}
end;
into method label _PSS parent_label CPU1 remove_entry;
into processor label CPU1 insert
begin
Method (_PSS, 0, NotSerialized)\n
{\n
Return (^^CPU0._PSS ())\n
}
end;
into method label _PSD parent_label CPU1 remove_entry;
into processor label CPU1 insert
begin
Method (_PSD, 0, NotSerialized)\n
{\n
Return (^^CPU0._PSD ())\n
}
end;
into method label _CST parent_label CPU1 remove_entry;
into processor label CPU1 insert
begin
Method (_CST, 0, NotSerialized)\n
{\n
Return (Package (0x04)\n
{\n
0x03, \n
Package (0x04)\n
{\n
ResourceTemplate ()\n
{\n
Register (FFixedHW, \n
0x01, // Bit Width\n
0x02, // Bit Offset\n
0x0000000000000000, // Address\n
,)\n
}, \n
One, \n
Zero, \n
0x03E8\n
}, \n
Package (0x04)\n
{\n
ResourceTemplate ()\n
{\n
Register (FFixedHW, \n
0x08, // Bit Width\n
0x00, // Bit Offset\n
0x0000000000000414, // Address\n
,)\n
}, \n
0x02, \n
One, \n
0x01F4\n
}, \n
Package (0x04)\n
{\n
ResourceTemplate ()\n
{\n
Register (FFixedHW, \n
0x08, // Bit Width\n
0x00, // Bit Offset\n
0x0000000000000415, // Address\n
,)\n
}, \n
0x03, \n
0x55, \n
0xFA\n
}\n
})\n
}
end;
into method label _PSS parent_label CPU2 remove_entry;
into processor label CPU2 insert
begin
Method (_PSS, 0, NotSerialized)\n
{\n
Return (^^CPU0._PSS ())\n
}
end;
into method label _PSD parent_label CPU2 remove_entry;
into processor label CPU2 insert
begin
Method (_PSD, 0, NotSerialized)\n
{\n
Return (^^CPU0._PSD ())\n
}
end;
into method label _CST parent_label CPU2 remove_entry;
into processor label CPU2 insert
begin
Method (_CST, 0, NotSerialized)\n
{\n
Return (^^CPU1._CST ())\n
}
end;
into method label _PSS parent_label CPU3 remove_entry;
into processor label CPU3 insert
begin
Method (_PSS, 0, NotSerialized)\n
{\n
Return (^^CPU0._PSS ())\n
}
end;
into method label _PSD parent_label CPU3 remove_entry;
into processor label CPU3 insert
begin
Method (_PSD, 0, NotSerialized)\n
{\n
Return (^^CPU0._PSD ())\n
}
end;
into method label _CST parent_label CPU3 remove_entry;
into processor label CPU3 insert
begin
Method (_CST, 0, NotSerialized)\n
{\n
Return (^^CPU1._CST ())\n
}
end _linenums:0'># Insert methods _PSS (4 P-states), _PSD and _CST into CPUs 0-3#into method label _PSS parent_label CPU0 remove_entry;into processor label CPU0 insertbeginMethod (_PSS, 0, NotSerialized)\n{\n Return (Package (0x04)\n {\n Package (0x06)\n {\n Zero, \n Zero, \n 0x10, \n 0x10, \n 0xFFVV, // FF = FID, VV = VID\n Zero // P-state 0\n }, \n Package (0x06)\n {\n Zero, \n Zero, \n 0x10, \n 0x10, \n 0xFFVV, // FF = FID, VV = VID\n One // P-state 1\n }, \n Package (0x06)\n {\n Zero, \n Zero, \n 0x10, \n 0x10, \n 0xFFVV, // FF = FID, VV = VID\n 0x02 // P-state 2\n }, \n Package (0x06)\n {\n Zero, \n Zero, \n 0x10, \n 0x10, \n 0xFFVV, // FF = FID, VV = VID\n 0x03 // P-state 3\n }\n })\n}end;into method label _PSD parent_label CPU0 remove_entry;into processor label CPU0 insertbeginMethod (_PSD, 0, NotSerialized)\n{\n Return (Package (0x05)\n {\n 0x05, \n Zero, \n Zero, \n 0xFC, \n 0x04\n })\n}end;into method label _CST parent_label CPU0 remove_entry;into processor label CPU0 insertbeginMethod (_CST, 0, NotSerialized)\n{\n Return (Package (0x02)\n {\n One, \n Package (0x04)\n {\n ResourceTemplate ()\n {\n Register (FFixedHW, \n 0x01, // Bit Width\n 0x02, // Bit Offset\n 0x0000000000000000, // Address\n 0x01, // Access Size\n )\n }, \n One, \n 0x9D, \n 0x03E8\n }\n })\n}end;into method label _PSS parent_label CPU1 remove_entry;into processor label CPU1 insertbeginMethod (_PSS, 0, NotSerialized)\n{\n Return (^^CPU0._PSS ())\n}end;into method label _PSD parent_label CPU1 remove_entry;into processor label CPU1 insertbeginMethod (_PSD, 0, NotSerialized)\n{\n Return (^^CPU0._PSD ())\n}end;into method label _CST parent_label CPU1 remove_entry;into processor label CPU1 insertbeginMethod (_CST, 0, NotSerialized)\n{\n Return (Package (0x04)\n {\n 0x03, \n Package (0x04)\n {\n ResourceTemplate ()\n {\n Register (FFixedHW, \n 0x01, // Bit Width\n 0x02, // Bit Offset\n 0x0000000000000000, // Address\n ,)\n }, \n One, \n Zero, \n 0x03E8\n }, \n Package (0x04)\n {\n ResourceTemplate ()\n {\n Register (FFixedHW, \n 0x08, // Bit Width\n 0x00, // Bit Offset\n 0x0000000000000414, // Address\n ,)\n }, \n 0x02, \n One, \n 0x01F4\n }, \n Package (0x04)\n {\n ResourceTemplate ()\n {\n Register (FFixedHW, \n 0x08, // Bit Width\n 0x00, // Bit Offset\n 0x0000000000000415, // Address\n ,)\n }, \n 0x03, \n 0x55, \n 0xFA\n }\n })\n}end;into method label _PSS parent_label CPU2 remove_entry;into processor label CPU2 insertbeginMethod (_PSS, 0, NotSerialized)\n{\n Return (^^CPU0._PSS ())\n}end;into method label _PSD parent_label CPU2 remove_entry;into processor label CPU2 insertbeginMethod (_PSD, 0, NotSerialized)\n{\n Return (^^CPU0._PSD ())\n}end;into method label _CST parent_label CPU2 remove_entry;into processor label CPU2 insertbeginMethod (_CST, 0, NotSerialized)\n{\n Return (^^CPU1._CST ())\n}end;into method label _PSS parent_label CPU3 remove_entry;into processor label CPU3 insertbeginMethod (_PSS, 0, NotSerialized)\n{\n Return (^^CPU0._PSS ())\n}end;into method label _PSD parent_label CPU3 remove_entry;into processor label CPU3 insertbeginMethod (_PSD, 0, NotSerialized)\n{\n Return (^^CPU0._PSD ())\n}end;into method label _CST parent_label CPU3 remove_entry;into processor label CPU3 insertbeginMethod (_CST, 0, NotSerialized)\n{\n Return (^^CPU1._CST ())\n}end
...but this is passed
;)

I am using SLice's FakeSMC with monitor from the ProjectOSX forum and have it in /S/L/E. WHich FakeSMC is the one you provided? I know Mozo has a newer mod where you can now run it in /E/E. Is that the one you provided?

Yep
http://www.insanelym...howtopic=234452
E/E
:)

Only thing left to do is add HDEF. I had audio before but gone now so no biggie a simple fix in your DSDT.

http://www.insanelym...howtopic=223205
Apply Azal to HDEF + ALCxxx

Thanks Again. Very nice, Compact DSDT and Fast boot!!!

;)

EDITED:

I assumed the DSDT.aml in the Extra folder you provided was the patched one. It looks like you put back the device name and script Device (LPCB) maybe that errors went away?

I always tried both ways and never had problems

I looked at it wrong you have both PMI0 and LPCB. The DSDT in the Extra folder then exactly the one generated from your patcher correct?

I added the "renamed devices"
you can test
but the problem was not that ;)
this has been tested a few times
before releasing the patch



Posted Image

#33
cheapo

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Vc pode extrair o DSDT original através do Windows com o Everest ou o DSDT EDITOR e postar aqui?

Everest
http://www.insanelym...howtopic=225991
DSDT EDITOR Linux_Mac_Win
http://www.insanelym...howtopic=223205

Abs e saudações brasileiras :D


Estou mandando o DSDT original da minha mobo (sem nenhuma modificação) e o patcheado que eu estou usando atualmente. Se eu não me engano (já faz algum tempo e eu posso estar me confundindo) meu DSDT atual é baseado nesse aqui: http://www.kexts.com...ga-p35-ds3.html.

Attached Files



#34
MaLd0n

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Estou mandando o DSDT original da minha mobo (sem nenhuma modificação) e o patcheado que eu estou usando atualmente. Se eu não me engano (já faz algum tempo e eu posso estar me confundindo) meu DSDT atual é baseado nesse aqui: http://www.kexts.com...ga-p35-ds3.html.


Os dois tem modificações
HDEF, USB...

o ideal é extrair pelo Windows ou Linux, pra não precisar remover essa dae

Everest
http://www.insanelym...howtopic=225991
DSDT EDITOR Linux_Mac_Win
http://www.insanelym...howtopic=223205

#35
XLR

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    2cores1cpu.mov

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Great work MaLd0n, tried the GA G41M-ES2L and it worked like a charm! Maybe the next version of DSDT Editor can be equipped with an option to load "patch packs" for specific motherboards? Like a single file or folder that contains all the necessary patches for your motherboard, and all the patches be applied in one click. That would be cool.

#36
MaLd0n

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Great work MaLd0n, tried the GA G41M-ES2L and it worked like a charm! Maybe the next version of DSDT Editor can be equipped with an option to load "patch packs" for specific motherboards? Like a single file or folder that contains all the necessary patches for your motherboard, and all the patches be applied in one click. That would be cool.


Hi XLR

Actually the editor and this auto patcher are the same program with different launchers. The next version of the patcher will be like you suggested, with all patches in one package for the user to select. I think we will keep the programs separated because the patcher will be updated more often, but the editor can have a launcher for the auto patcher.

Posted Image

#37
tonnyz

tonnyz

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Thanks MaLd0n,

It works great on my mainboard (ECS G31T-M7).
Before using your patch, my system work so good on chameleon rc5 (without dsdt).
After installing, i got HPET and WAKE working.

I have a litte question: How can i add Geforce 9500GT to dsdt? (i'm using GraphicsEnabler)

Geforce 9500GT DVI-VGA 512mb 0x064010de

thank so much.

#38
Babiloe

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Dear Mald0n
i want to know about G31T-M dsdt auto patcher
Just check it, the booting is ok also.

comparing to my dsdt patch, it is very big patch you have..
Is there any commentary / thread where i can study the patch.....

G31T-M7 v1
Usually i use the old OpenHaltRestart.kext for shutdown, EvoReboot.kext not work with my dsdt.
with this, the sleep and the shutdown work. gonna try your patches..


Info: The iasl may2010 generating error, while the iasl january2010 or before just generating warning...
while the error can be eliminated anyway...

dsdt evoextract.dsl 5647: Name (_PLD, Buffer (0x10)
Error 4080 - Invalid object type for reserved name ^ (found BUFFER, requires Package)
dsdt evoextract.dsl 6122: Acquire (MUTE, 0x03E8)
Warning 1105 - Possible operator timeout is ignored ^


My first patches on 2009, only RTC patch, and DTGP...
BAttached File  my_dsdt.dsl.txt   231.81KB   9 downloads i forgot where my last patch dsdt.dsl anyway..

The extraction from the system unpatched.
Attached File  dsdt_extract_dsdteditor.dsl.txt   224.47KB   14 downloads

Your patches on the extracted..Very big different..
Attached File  dsdt_patched_dsdteditor_mald0n.dsl.txt   196.62KB   10 downloads


Need to study the dsdt patches...

DTGP
HID/CID
IRQs
RENAMED DEVICES
SBUS
SHUTDOWN
EHCI
LPC
REMOVED DEVICES
ALIAS


Do you have Q8400 speedstep how-to?

#39
oSxFr33k

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@MaLd0n,

Thanks for the great work you have done and to share this with all of us.

I have two more Giagbyte Motherboards but they are the GA-EP45-UD3P V 1.6 Bios Version FB, and not the UD3L, DS3L nor UD3R.

There is a new Bios Version FD and a beta one FFb dated 10/6/10 but they are not installed.

There are differences in the southbridge and expansion slot configurations. I would love to use the UD3L, DS3L or UD3R patch on the UD3P whichever is closet it but would that work? I am sure there are some device and script differences in in those DSDTs?

If I attach my Ubuntu Live CD DSDT extract would that help any to make a patch for it?

Thanks Again!!

Attached File  GA_EP45_UD3P.aml.zip   6.74KB   9 downloads

#40
MaLd0n

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@Babiloe

DTGP --> it's used by other patches

HID/CID --> enable the power button to sleep and wake the computer

IRQs --> solve the audio stuttering, lag video and others problems.

RENAMED DEVICES --> PIC/IPIC - TMR/TIMR, etc

SBUS --> SMBus is a subset of I2C, used for communication with low-bandwidth devices on a motherboard, especially power related chips, such as temperature, fan, or voltage sensors, communicates with the ICH (I/O Controller Hub) on Intel chipsets, and with the MCP (Media Communications Processor) on nVidia chipsets.

run on terminal
kextstat|grep SMBus

SHUTDOWN --> Posted Image

EHCI --> USB fix

LPC --> No speedstepping without that. http://en.wikipedia....i/Low_Pin_Count

run on terminal
kextstat | grep LPC

REMOVED DEVICES --> FDC, SPKR, and others(not used for OsX)

ALIAS --> fix cpus=1(unnecessary in the snow...but...)

Do you have Q8400 speedstep how-to?

this is passed

http://www.insanelym...howtopic=225766
add in boot.plist

<key>GeneratePStates</key>
<string>Yes</string>
<key>GenerateCStates</key>
<string>Yes</string>

*in the mobo I tested and made the patch I had no problems with HPET

--------------------------------------------------------------------------------

Attached File  GA_EP45_UD3P.aml.zip   6.74KB   9 downloads

Thank You

Folder Extra
Attached File  Extra.zip   546.46KB   33 downloads
nothing more, nothing less

you can test?
DSDT Auto-Patcher GA EP45-UD3P


:D

see if the sound works
GO TO SystemPreferences/Sound/Output <--- change to internal speaker

--------------------------------------------------------------------------------

Thanks MaLd0n,

It works great on my mainboard (ECS G31T-M7).
Before using your patch, my system work so good on chameleon rc5 (without dsdt).
After installing, i got HPET and WAKE working.

I have a litte question: How can i add Geforce 9500GT to dsdt? (i'm using GraphicsEnabler)

Geforce 9500GT DVI-VGA 512mb 0x064010de

thank so much.


Read it
http://www.insanelym...howtopic=188822

0x40 = 1024mb, 0x20= 512mb, 0x10= 256mb






Also tagged with one or more of these keywords: DSDT, patcher


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