Unsynchronised TSC after wake/reboot after wake (not Haswell-E)

[thorton]

There seems to be another way to update TSC by writing to TSC_ADJUST MSR. In which case you would have to look for mov ecx, 0x3b. But I haven't yet looked into this so I am not sure if this relates to the problem.

[arimuras]

Unsynchronised TSC after wake/reboot after wake

Although I have read the previous contents could not understand how to change the BIOS to me.
This is link to my BIOS (AMI BIOS Version 3.9) - https://msi.com/Motherboard/support/H87-G41-PC-Mate.html#down-bios

[arimuras]

Unsynchronised TSC after wake/reboot after wake

 

Although I have read the previous contents could not understand how to change the BIOS to me.

This is link to my BIOS (AMI BIOS Version 3.9) - https://msi.com/Motherboard/support/H87-G41-PC-Mate.html#down-bios

Thanks !  thorton !

 

I was somehow able to rewrite the BIOS. It has been able to operate the perfect sleep.

[computergek80]

Could you let us know how you managed it? 

 

I'm still having the same problems, and I can't find a clue in my BIOS. Any help would be appreciated. 

[arimuras]

Could you let us know how you managed it? 

 

I'm still having the same problems, and I can't find a clue in my BIOS. Any help would be appreciated. 

http://www.insanelymac.com/forum/topic/311613-unsynchronised-tsc-after-wakereboot-after-wake-not-haswell-e/?do=findComment&comment=2240545 as a reference,

 

--My BIOS (AMI BIOS Version 3.9) - https://msi.com/Moth....html#down-bios --

I rewrite this BIOS ("0F30" is true in two places, has been changed to "9090")

[tikizondo94]

On 5/27/2016 at 12:00 AM, thorton said:

I patched your BIOS. You might want to test it with the BIOS boot function if your motherboard has it. No reason it won't work but use at your own risk. Download - http://www.mediafire.com/download/3r6r322y82471cw/E7816IMS.C80_patched.zip

In case you want to patch it for your self
Open up the BIOS in UEFITool. Look for the S3Restore PEI module.
Expand it and select PE32 image section. Right click and extract body.

The next part is the tricky part, or not if you know some basic reverse engineering.
You can use any disassembler that can handle PE files, but I have Hopper Disassembler so I'll write about that. The trial is good enough for our purposes. Open up s3restore.bin in Hopper. It'll show us the disassembled code.
Now we need to find the instruction wrmsr.
wrmsr stands for Write to Model Specific Register. Which model specific register? That's specified by the value in the ECX register. For TSC aka Timestamp counter the value in the ECX register should be 0x10(or 16 when converted to decimal).

The reason for the Unsynchronised TSC error is that the BIOS writes to the TSC register of the first core after waking up from sleep, leaving other cores unsynchronised and OS X apparently does not like this. VoodooTSCSync works around this by writing the same value to TSC for all the cores. But it seems we can work around this by disabling the BIOS from writing to the TSC register.

So let's find the wrmsr instruction to disable.
Press CMD+F to Find. Enter wrmsr and make sure the Type is set to "String in Assembly". Now on the first match, we can see a few instructions above there's a mov ecx, 0xC0000080. This means the value in ECX is not 0x10. So we are not interested in this.
The next result, we see clearly that there's a mov ecx, 0x10 instruction about 7 instructions above. And the none of the proceeding instructions change the value of ECX. This is the one. We need to disable this.
Select the wrmsr instruction. In the status bar, you can see the file offset for this instruction in hex. In your case it's 0x29a(or 666 when converted to decimal). The specifics might be different for a different BIOS file.
Now we need to open up this file in a hex editor and change this instruction. The trial for hopper won't let us do this so I'm using Hex Fiend.
Open up s3restore.bin in a hex editor. Jump to offset 666. The bytes at the location would be 0F30, which is the opcode for wrmsr. To disable it, select and replace it by 9090. 90 stands for NOP(No Operation). Since wrmsr opcode is two bytes long we need two NOPs. Save the file and exit.

Now we just need to add this s3restore.bin back to the BIOS. Inside UEFITool, right click on the PE32 image section under S3Restore. Select replace body and replace it with the patched file. Save the image and that should be it.

Amazing info here! This fixed my wake from sleep lag issue with my MSI z97 board running 10.14 Mojave. Many thanks for this! Excellent write up!