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Dual Socket Results in Cpu Reboot | Dell T5500 x5675 Working Fine With 1 Cpu

Qazi Abdullah

By Qazi Abdullah,
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Qazi Abdullah
Qazi Abdullah
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As the title says, the issue with my hackintosh is that I am unable to use Dual X5675
I created the hackintosh with 1x x5675 and recently bought the 2nd cpu and cpu riser to put in it.

I am unable to boot the system. It keeps rebooting at verbose.

Disabling hyperthreading works and I am able to boot with 12c and 12t
Enabling hyperthreading doesn't work. I am unable to boot with 12c and 24t.

Here is the efi link: https://github.com/qaziabdullah/EFI-Dell-Precision-T5500

 

 

Fixes that i tried
1- CpuTscsync:
I added cputscsync and if i turn off hyperthreading with that added, I get a bootloop where the system boots fine without it
If i add cputscsync and turn on hyperthreading, I get the same reboot issue which i get without cputscsync
It seems that Cputscsync is not playing any role in this.

 

Hyperthreading works with 1 cpu and as soon as 2nd is plugged in, it gives this issue

2- DSDT (removing extra cores)
3- Tested Bigsur, same issues
4- Tested Ventura too, same issues

Any ideas how can i get this working?

 

System reboots at the attached screenshot's error lines
Sometimes I get Kernel Panic which is when i change EFI (if i am using EFI of SSD and it reboots, upon reboot i change EFI to USB's EFI and i get kernel panic)


Some history:
Initially the hackintosh was made with 1 cpu and nvidia quadro k600
Upgraded to RX570 with 1 cpu and everything was working fine
Got the CPU riser and 2nd cpu, added it thinking that it should boot fine; it didn't
Booted linux to get new SSDT and DSDT files with 2 cpus
updated EFI, still having the same issues.

I see benchmarks on geekbench 5 from users with dell t5500 hackintosh using 12c24t just fine

But those are from high seirra mostly? Idk if something changed in recent versions. If anyone can point out something, it will be great.

z8k3qg77g3da1.webp

photo_2023-01-21 20.40.49.jpeg

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Qazi Abdullah
Qazi Abdullah
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1 hour ago, Slice said:

I can recommend you read the thread 

 

where we also had problems with CPU numbers.

Thank you for your response!! Really appreciate. I checked my DSDT but i don't have SCK cores or threads like your DSDTs. Mine is very different to what you have over there. I am attaching DSDT. If you have the time, check it and let me know if i am wrong? 

DSDT.aml

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Slice
Slice
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Posted
9 minutes ago, Qazi Abdullah said:

Thank you for your response!! Really appreciate. I checked my DSDT but i don't have SCK cores or threads like your DSDTs. Mine is very different to what you have over there. I am attaching DSDT. If you have the time, check it and let me know if i am wrong? 

DSDT.aml 21.43 kB · 0 downloads

You have traditional section 

    Scope (_PR)
    {
        Processor (CPU1, 0x01, 0x00000810, 0x06){}
        Processor (CPU2, 0x02, 0x00000000, 0x00){}
        Processor (CPU3, 0x03, 0x00000000, 0x00){}
        Processor (CPU4, 0x04, 0x00000000, 0x00){}
        Processor (CPU5, 0x05, 0x00000000, 0x00){}
        Processor (CPU6, 0x06, 0x00000000, 0x00){}
        Processor (CPU7, 0x07, 0x00000000, 0x00){}
        Processor (CPU8, 0x08, 0x00000000, 0x00){}
        Processor (CPU9, 0x09, 0x00000000, 0x00){}
        Processor (CP10, 0x0A, 0x00000000, 0x00){}
        Processor (CP11, 0x0B, 0x00000000, 0x00){}
        Processor (CP12, 0x0C, 0x00000000, 0x00){}
        Processor (CP13, 0x0D, 0x00000000, 0x00){}
        Processor (CP14, 0x0E, 0x00000000, 0x00){}
        Processor (CP15, 0x0F, 0x00000000, 0x00){}
        Processor (CP16, 0x10, 0x00000000, 0x00){}
        Processor (CP17, 0x11, 0x00000000, 0x00){}
        Processor (CP18, 0x12, 0x00000000, 0x00){}
        Processor (CP19, 0x13, 0x00000000, 0x00){}
        Processor (CP20, 0x14, 0x00000000, 0x00){}
        Processor (CP21, 0x15, 0x00000000, 0x00){}
        Processor (CP22, 0x16, 0x00000000, 0x00){}
        Processor (CP23, 0x17, 0x00000000, 0x00){}
        Processor (CP24, 0x18, 0x00000000, 0x00){}
        Processor (CP25, 0x19, 0x00000000, 0x00){}
        Processor (CP26, 0x1A, 0x00000000, 0x00){}
        Processor (CP27, 0x1B, 0x00000000, 0x00){}
        Processor (CP28, 0x1C, 0x00000000, 0x00){}
        Processor (CP29, 0x1D, 0x00000000, 0x00){}
        Processor (CP30, 0x1E, 0x00000000, 0x00){}
        Processor (CP31, 0x1F, 0x00000000, 0x00){}
        Processor (CP32, 0x20, 0x00000000, 0x00){}
    }

There are 32 cores and only first one has correct description.  How many cores do you have? You may restrict the description and change  0x00000000, 0x00 ->  0x00000810, 0x06 for all cores.

As well use TscSyncTimeout quirk and I may recommend VoodooTSCsync.kext.

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Qazi Abdullah
Qazi Abdullah
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28 minutes ago, Slice said:

You have traditional section 

    Scope (_PR)
    {
        Processor (CPU1, 0x01, 0x00000810, 0x06){}
        Processor (CPU2, 0x02, 0x00000000, 0x00){}
        Processor (CPU3, 0x03, 0x00000000, 0x00){}
        Processor (CPU4, 0x04, 0x00000000, 0x00){}
        Processor (CPU5, 0x05, 0x00000000, 0x00){}
        Processor (CPU6, 0x06, 0x00000000, 0x00){}
        Processor (CPU7, 0x07, 0x00000000, 0x00){}
        Processor (CPU8, 0x08, 0x00000000, 0x00){}
        Processor (CPU9, 0x09, 0x00000000, 0x00){}
        Processor (CP10, 0x0A, 0x00000000, 0x00){}
        Processor (CP11, 0x0B, 0x00000000, 0x00){}
        Processor (CP12, 0x0C, 0x00000000, 0x00){}
        Processor (CP13, 0x0D, 0x00000000, 0x00){}
        Processor (CP14, 0x0E, 0x00000000, 0x00){}
        Processor (CP15, 0x0F, 0x00000000, 0x00){}
        Processor (CP16, 0x10, 0x00000000, 0x00){}
        Processor (CP17, 0x11, 0x00000000, 0x00){}
        Processor (CP18, 0x12, 0x00000000, 0x00){}
        Processor (CP19, 0x13, 0x00000000, 0x00){}
        Processor (CP20, 0x14, 0x00000000, 0x00){}
        Processor (CP21, 0x15, 0x00000000, 0x00){}
        Processor (CP22, 0x16, 0x00000000, 0x00){}
        Processor (CP23, 0x17, 0x00000000, 0x00){}
        Processor (CP24, 0x18, 0x00000000, 0x00){}
        Processor (CP25, 0x19, 0x00000000, 0x00){}
        Processor (CP26, 0x1A, 0x00000000, 0x00){}
        Processor (CP27, 0x1B, 0x00000000, 0x00){}
        Processor (CP28, 0x1C, 0x00000000, 0x00){}
        Processor (CP29, 0x1D, 0x00000000, 0x00){}
        Processor (CP30, 0x1E, 0x00000000, 0x00){}
        Processor (CP31, 0x1F, 0x00000000, 0x00){}
        Processor (CP32, 0x20, 0x00000000, 0x00){}
    }

There are 32 cores and only first one has correct description.  How many cores do you have? You may restrict the description and change  0x00000000, 0x00 ->  0x00000810, 0x06 for all cores.

As well use TscSyncTimeout quirk and I may recommend VoodooTSCsync.kext.

I have 2 processors
6c12t each
total of 12 cores and 24 threads
Am i to add values to 24 of them or 12?
I will use the other 2 fixes and this once you confirm.

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Qazi Abdullah
Qazi Abdullah
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Scope (_PR)
    {
        Processor (CPU1, 0x01, 0x06000810, 0x06){}
        Processor (CPU2, 0x02, 0x06000810, 0x06){}
        Processor (CPU3, 0x03, 0x06000810, 0x06){}
        Processor (CPU4, 0x04, 0x06000810, 0x06){}
        Processor (CPU5, 0x05, 0x06000810, 0x06){}
        Processor (CPU6, 0x06, 0x06000810, 0x06){}
        Processor (CPU7, 0x07, 0x06000810, 0x06){}
        Processor (CPU8, 0x08, 0x06000810, 0x06){}
        Processor (CPU9, 0x09, 0x06000810, 0x06){}
        Processor (CP10, 0x0A, 0x06000810, 0x06){}
        Processor (CP11, 0x0B, 0x06000810, 0x06){}
        Processor (CP12, 0x0C, 0x06000810, 0x06){}
        Processor (CP13, 0x0D, 0x06000810, 0x06){}
        Processor (CP14, 0x0E, 0x06000810, 0x06){}
        Processor (CP15, 0x0F, 0x06000810, 0x06){}
        Processor (CP16, 0x10, 0x06000810, 0x06){}
        Processor (CP17, 0x11, 0x06000810, 0x06){}
        Processor (CP18, 0x12, 0x06000810, 0x06){}
        Processor (CP19, 0x13, 0x06000810, 0x06){}
        Processor (CP20, 0x14, 0x06000810, 0x06){}
        Processor (CP21, 0x15, 0x06000810, 0x06){}
        Processor (CP22, 0x16, 0x06000810, 0x06){}
        Processor (CP23, 0x17, 0x06000810, 0x06){}
        Processor (CP24, 0x18, 0x06000810, 0x06){}
    }



--
This looks good?

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etorix
etorix
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Posted

These CPU-WRAP or PLUG-ALT SSDTs are for motherboards where CPU cores are defined as "Device()" in ACPI rather than "Processor()". Manufacturers implemented the change mid-way through Skylake-X/W for workstations (C422, C621 chispets) and with Alder Lake (Z690) for consumers. @Slice already noted that CPU definition is "traditional" here. But you mau use SSDT-CPU-WRAP or SSDT-PLUG-ALT as examples of CPU definitions for macOS.

 

Beside, if this were the issue, boot would just halt after loading the last CPU (last "AppleACPICPU…") and there would be no panic afterwards.

 

Unfortunately, I have no experience with such old systems and no idea what is going on here.

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deeveedee
deeveedee
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Posted (edited)

@etorix Thanks for the quick reply.  I definitely wasn't questioning Slice's original logic - chalk it up to my misunderstanding of the issue.  

 

@Qazi Abdullah Sorry to lead you down a wrong path.  The only other thing I can think of is that MacPro5,1 users who used CLOVER and OpenCore to upgrade to newer versions of MacOS had issues with dual-CPU units.  When they added a Westmere CPU, the MP5,1 wouldn't boot.  There was a fix for this.  Maybe someone knows the MP5,1 fix and maybe this fix would be related to your issue.  Good luck.

Edited by deeveedee
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Qazi Abdullah
Qazi Abdullah
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On 1/26/2023 at 7:03 AM, deeveedee said:

@Qazi Abdullah I've never tried to run a hack with this many cores/threads, but I have noticed that the higher core count PCs use a CPU SSDT as discussed here.  Could this be related to your issue?

This very well could be related to my issue and i gave it a brief read and found it very useful.
I will work on this to see how i can apply the necessary patches to my EFI to get this sorted,
Thank you for the useful information!!

19 hours ago, etorix said:

These CPU-WRAP or PLUG-ALT SSDTs are for motherboards where CPU cores are defined as "Device()" in ACPI rather than "Processor()". Manufacturers implemented the change mid-way through Skylake-X/W for workstations (C422, C621 chispets) and with Alder Lake (Z690) for consumers. @Slice already noted that CPU definition is "traditional" here. But you mau use SSDT-CPU-WRAP or SSDT-PLUG-ALT as examples of CPU definitions for macOS.

 

Beside, if this were the issue, boot would just halt after loading the last CPU (last "AppleACPICPU…") and there would be no panic afterwards.

 

Unfortunately, I have no experience with such old systems and no idea what is going on here.

Yes I read that it was for CPUs defined with Device()
Any way i can apply it with the Processor()?

9 hours ago, deeveedee said:

@etorix Thanks for the quick reply.  I definitely wasn't questioning Slice's original logic - chalk it up to my misunderstanding of the issue.  

 

@Qazi Abdullah Sorry to lead you down a wrong path.  The only other thing I can think of is that MacPro5,1 users who used CLOVER and OpenCore to upgrade to newer versions of MacOS had issues with dual-CPU units.  When they added a Westmere CPU, the MP5,1 wouldn't boot.  There was a fix for this.  Maybe someone knows the MP5,1 fix and maybe this fix would be related to your issue.  Good luck.

No worries, I really appreciate your help. 
I will check forums and see if i can find that fix. Since the build is closely similar to MP5,1, I think i might be able to resolve it using their fix.

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