Will SSE3 be optional for Tiger x86?

[DaffyDuck]

See, you're all basing your speculation on last week's news -- while Apple is basing their decisions on a roadmap they have seen, but which is only slowly being unveiled by intel.

 

Do the math!

[mikesown]

I think that apple just included it with the development kits to limit piracy. From what I have heard, apple did not use any inline asm with SSE3 code, just a compiler optimization. I do not think that every mac will have SSE3, even a year from now. If apple is going to keep lines such as the mac mini up to date, I dobut they can afford to keep SSE3 inside it.

[DaffyDuck]

If apple is going to keep lines such as the mac mini up to date, I dobut they can afford to keep SSE3 inside it.

Think again - it's not a question of Apple leaving SSE3 inside, but rather what intel will be providing in 2006... and the way it's coming together, it looks like pretty much their entire line of non-Pentium named CPUs will contain subsets of SSE3, or better.

 

You're still all thinking with last week's news.

[mikesown]

Think again - it's not a question of Apple leaving SSE3 inside, but rather what intel will be providing in 2006... and the way it's coming together, it looks like pretty much their entire line of non-Pentium named CPUs will contain subsets of SSE3, or better.

 

You're still all thinking with last week's news.

<{POST_SNAPBACK}>

Hey intel just recently dropped their 266mhz line. I don't think they are about to drop SSE2 quite yet

[eight_sixx]

This tidbit in the SSE Optimization document on the Apple Developer Transition Resource Center:

 

 

What we are calling SSE in this document was actually delivered as three separate vector extensions to the IA-32 ISA, which appeared (in order over time) under the names SSE, SSE2 and SSE3. Each builds on the extension that went before it. The first two are defined to be part of the baseline hardware requirement for MacOS X for Intel. SSE3 has been recently introduced (first in the Prescott family of Pentium 4 processors) and may or may not be available on a machine running MacOS X for Intel.

 

SSE Performance Programming Document

[nendra]

This tidbit in the SSE Optimization document on the Apple Developer Transition Resource Center:

 

 

What we are calling SSE in this document was actually delivered as three separate vector extensions to the IA-32 ISA, which appeared (in order over time) under the names SSE, SSE2 and SSE3. Each builds on the extension that went before it. The first two are defined to be part of the baseline hardware requirement for MacOS X for Intel. SSE3 has been recently introduced (first in the Prescott family of Pentium 4 processors) and may or may not be available on a machine running MacOS X for Intel. 

 

SSE Performance Programming Document

<{POST_SNAPBACK}>

 

and some lines below:

 

SSE3 is enabled using the GCC compiler flag -msse3. SSE3 is an optional hardware feature on MacOS X for Intel and is not enabled by default on gcc-4.0.