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Solution to create a topic or post. 04/24/2018
Hello guys. The majority of you are having issues to create a topic or post here. This are a problem with our current theme InsanelyMac. Now the theme will be the Default IPS. Sorry for any inconvenience.
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By partha.slg123 · Posted
Hackintosh High Sierra 10.13.3 USB Installer Boot Into USB DIrectly Enter Exit Option Menu. Clover Boot Menu Not Showing. Plz Help ................. My System Specification :
CPU : Core i5 6400
MB : Asus H110M-CS
RAM : 8GB DDR 4
HDD : WD 1TB For Windows And WD 500 GB For Hackintosh
Bootloader : Clover -
I think I found a way to use an nvidia helper card... On the internet they say if you cut the end of the PCI-e x1 slot, an x16 PCI-e video card will work in it. I have an 8600gt which works OOB in high sierra, but I'm not sure if I can set it as primary since in bios I have only PEG/PCI or PCI/PEG primary video. Maybe I can set it as primary from DSDT or clover? -
My guide was good for ElCapitan where Nvidia 5200M works fine. But now I decided to install HighSierra and I found that Nvidia family Fermi will not work in the OS anyway. So I switched Optimus ON in my BIOS so I have Intel HD4000 as main graphics and switched off Nvidia by ACPI methods. Here it is. ACPI_for HSierra.zip -
As Apple added support for eGPUs with 10.13.4 and recommends Sapphire's Pulse RX570 and RX580 series cards for use in external cases you don't need to be an expert in order to conclude that there must be native support for these cards. Mieze -
By KGP-iMacPro · Posted
Yes sir!!!! The THB_C cable between the TBEX 3 and the motherboard prevents TB hot plug! After removing this cable I have full TBEX3 TB and TB XHC USB hot plug functionality with my SSDT-X299-iMacPro.aml, which I distributed several months ago (http://www.insanelymac.com/forum/topic/331658-how-to-build-your-own-imac-pro-successful-buildextended-guide/). I never realised why my TBEX3 TB and TB XHC USB SSDT implementation was working on some systems and on others not ... you provided the answer :-) I am convinced that the SSDT now will even work with TB implementations different from the TBEX 3. TB and TB-XHC hotplug.mov I programmed and implemented the TBEX 3 TB SSDT implementation based on former attempts by @Mork vom Ork and @Matthew82. If I understand correctly, @Matthew82 's former work further bases on some implementations by @maleorderbride and @TheRacerMaster. Note that with the TBEX 3 TB SSDT implementation detailed below, also any "Arbitrary" TB entry in the config plist in Section "Devices" of Clover Configurator is totally obsolete. SSDT-X299-iMacPro.aml /* * Intel ACPI Component Architecture * AML/ASL+ Disassembler version 20160422-64(RM) * Copyright (c) 2000 - 2016 Intel Corporation * * Disassembling to non-symbolic legacy ASL operators * * Disassembly of iASLdOJAsj.aml, Wed Apr 25 10:27:52 2018 * * Original Table Header: * Signature "SSDT" * Length 0x00001B7B (7035) * Revision 0x01 * Checksum 0x42 * OEM ID "NICO" * OEM Table ID "X299" * OEM Revision 0x00000000 (0) * Compiler ID "INTL" * Compiler Version 0x20160422 (538313762) */ DefinitionBlock ("", "SSDT", 1, "NICO", "X299", 0x00000000) { External (_SB_.PC01.BR1A, DeviceObj) // (from opcode) External (_SB_.PC01.BR1A.PEGP, DeviceObj) // (from opcode) External (_SB_.PC01.BR1A.SL01, DeviceObj) // (from opcode) External (_SB_.PC01.BR1A.UPSB, DeviceObj) // (from opcode) External (_SB_.PC02.BR2A, DeviceObj) // (from opcode) External (_SB_.PC02.BR2A.GFX0, DeviceObj) // (from opcode) External (_SB_.PC03.BR3D.ARPT, DeviceObj) // (from opcode) External (_SB_.PCI0.ETH0, DeviceObj) // (from opcode) External (_SB_.PCI0.HDEF, DeviceObj) // (from opcode) External (_SB_.PCI0.PMCR, DeviceObj) // (from opcode) External (_SB_.PCI0.RP01.PXSX, DeviceObj) // (from opcode) External (_SB_.PCI0.RP01.XHC2, DeviceObj) // (from opcode) External (_SB_.PCI0.RP02.ETH1, DeviceObj) // (from opcode) External (_SB_.PCI0.RP05.PXSX, DeviceObj) // (from opcode) External (_SB_.PCI0.RP05.XHC3, DeviceObj) // (from opcode) External (_SB_.PCI0.RP07.PXSX, DeviceObj) // (from opcode) External (_SB_.PCI0.RP07.XHC4, DeviceObj) // (from opcode) External (_SB_.PCI0.RP09.ANS2, DeviceObj) // (from opcode) External (_SB_.PCI0.RP09.PXSX, DeviceObj) // (from opcode) External (_SB_.PCI0.SAT1, DeviceObj) // (from opcode) External (_SB_.PCI0.XHCI, DeviceObj) // (from opcode) External (GFX0, DeviceObj) // (from opcode) External (GPRW, MethodObj) // 2 Arguments (from opcode) External (OSDW, MethodObj) // 0 Arguments (from opcode) External (OSYS, UnknownObj) // (from opcode) External (PEGP, DeviceObj) // (from opcode) External (SL01, DeviceObj) // (from opcode) External (UPSB, DeviceObj) // (from opcode) Scope (\_SB.PCI0.HDEF) { Method (_DSM, 4, NotSerialized) // _DSM: Device-Specific Method { Store (Package (0x16) { "AAPL,slot-name", Buffer (0x09) { "Built In" }, "model", Buffer (0x1C) { "Realtek ALC S1220A HD Audio" }, "name", Buffer (0x27) { "Realtek ALC S1220A HD Audio Controller" }, "hda-gfx", Buffer (0x0A) { "onboard-1" }, "device_type", Buffer (0x14) { "HD-Audio-Controller" }, "device-id", Buffer (0x04) { 0xF0, 0xA2, 0x00, 0x00 }, "compatible", Buffer (0x0D) { "pci8086,0C0C" }, "MaximumBootBeepVolume", Buffer (One) { 0xEE }, "MaximumBootBeepVolumeAlt", Buffer (One) { 0xEE }, "layout-id", Buffer (0x04) { 0x07, 0x00, 0x00, 0x00 }, "PinConfigurations", Buffer (Zero) {} }, Local0) DTGP (Arg0, Arg1, Arg2, Arg3, RefOf (Local0)) Return (Local0) } } Scope (_SB.PC02.BR2A) { Scope (GFX0) { OperationRegion (PCIS, PCI_Config, Zero, 0x0100) Field (PCIS, AnyAcc, NoLock, Preserve) { PVID, 16, PDID, 16 } Method (_PRW, 0, NotSerialized) // _PRW: Power Resources for Wake { Return (GPRW (0x69, 0x04)) } Method (_DSM, 4, NotSerialized) // _DSM: Device-Specific Method { Store (Package (0x14) { "built-in", Buffer (One) { 0x00 }, "device-id", Buffer (0x04) { 0x06, 0x1B, 0x00, 0x00 }, "hda-gfx", Buffer (0x0A) { "onboard-2" }, "AAPL,slot-name", Buffer (0x07) { "Slot-1" }, "@0,connector-type", Buffer (0x04) { 0x00, 0x08, 0x00, 0x00 }, "@1,connector-type", Buffer (0x04) { 0x00, 0x08, 0x00, 0x00 }, "@2,connector-type", Buffer (0x04) { 0x00, 0x08, 0x00, 0x00 }, "@3,connector-type", Buffer (0x04) { 0x00, 0x08, 0x00, 0x00 }, "@4,connector-type", Buffer (0x04) { 0x00, 0x08, 0x00, 0x00 }, "@5,connector-type", Buffer (0x04) { 0x00, 0x08, 0x00, 0x00 } }, Local0) DTGP (Arg0, Arg1, Arg2, Arg3, RefOf (Local0)) Return (Local0) } } Device (HDAU) { Name (_ADR, One) // _ADR: Address Method (_DSM, 4, NotSerialized) // _DSM: Device-Specific Method { Store (Package (0x0C) { "built-in", Buffer (One) { 0x00 }, "device-id", Buffer (0x04) { 0xEF, 0x10, 0x00, 0x00 }, "AAPL,slot-name", Buffer (0x07) { "Slot-1" }, "device_type", Buffer (0x16) { "Multimedia Controller" }, "name", Buffer (0x1D) { "NVIDIA High Definition Audio" }, "hda-gfx", Buffer (0x0A) { "onboard-2" } }, Local0) DTGP (Arg0, Arg1, Arg2, Arg3, RefOf (Local0)) Return (Local0) } } } Scope (\_SB.PCI0.PMCR) { Method (_DSM, 4, NotSerialized) // _DSM: Device-Specific Method { Store (Package (0x0E) { "AAPL,slot-name", Buffer (0x09) { "Built In" }, "model", Buffer (0x1E) { "Intel X299 Series Chipset PMC" }, "name", Buffer (0x0A) { "Intel PMC" }, "device-id", Buffer (0x04) { 0xA1, 0xA2, 0x00, 0x00 }, "device_type", Buffer (0x0F) { "PMC-Controller" }, "built-in", Buffer (One) { 0x00 }, "compatible", Buffer (0x0D) { "pci8086,a2a1" } }, Local0) DTGP (Arg0, Arg1, Arg2, Arg3, RefOf (Local0)) Return (Local0) } } Device (_SB.USBX) { Name (_ADR, Zero) // _ADR: Address Method (_DSM, 4, NotSerialized) // _DSM: Device-Specific Method { If (LNot (Arg2)) { Return (Buffer (One) { 0x03 }) } Return (Package (0x08) { "kUSBSleepPortCurrentLimit", 0x0834, "kUSBSleepPowerSupply", 0x13EC, "kUSBWakePortCurrentLimit", 0x0834, "kUSBWakePowerSupply", 0x13EC }) } } Scope (\_SB.PCI0.XHCI) { Method (_DSM, 4, NotSerialized) // _DSM: Device-Specific Method { Store (Package (0x1B) { "AAPL,slot-name", Buffer (0x09) { "Built In" }, "built-in", Buffer (One) { 0x00 }, "device-id", Buffer (0x04) { 0xAF, 0xA2, 0x00, 0x00 }, "name", Buffer (0x34) { "ASMedia / Intel X299 Series Chipset XHCI Controller" }, "model", Buffer (0x34) { "ASMedia ASM1074 / Intel X299 Series Chipset USB 3.0" }, "AAPL,current-available", 0x0834, "AAPL,current-extra", 0x0A8C, "AAPL,current-in-sleep", 0x0A8C, "AAPL,max-port-current-in-sleep", 0x0834, "AAPL,device-internal", Zero, "AAPL,clock-id", Buffer (One) { 0x01 }, "AAPL,root-hub-depth", 0x1A, "AAPL,XHC-clock-id", One, Buffer (One) { 0x00 } }, Local0) DTGP (Arg0, Arg1, Arg2, Arg3, RefOf (Local0)) Return (Local0) } } Device (\_SB.PCI0.RP01.XHC2) { Name (_ADR, Zero) // _ADR: Address Method (_DSM, 4, NotSerialized) // _DSM: Device-Specific Method { If (LEqual (Arg2, Zero)) { Return (Buffer (One) { 0x03 }) } Store (Package (0x1B) { "AAPL,slot-name", Buffer (0x09) { "Built In" }, "built-in", Buffer (One) { 0x00 }, "device-id", Buffer (0x04) { 0x42, 0x21, 0x00, 0x00 }, "name", Buffer (0x17) { "ASMedia XHC Controller" }, "model", Buffer (0x2F) { "ASMedia ASM3142 #1 1x USB 3.1 Type-C Internal " }, "AAPL,current-available", 0x0834, "AAPL,current-extra", 0x0A8C, "AAPL,current-in-sleep", 0x0A8C, "AAPL,max-port-current-in-sleep", 0x0834, "AAPL,device-internal", Zero, "AAPL,clock-id", Buffer (One) { 0x01 }, "AAPL,root-hub-depth", 0x1A, "AAPL,XHC-clock-id", One, Buffer (One) { 0x00 } }, Local0) DTGP (Arg0, Arg1, Arg2, Arg3, RefOf (Local0)) Return (Local0) } } Name (_SB.PCI0.RP01.PXSX._STA, Zero) // _STA: Status Device (\_SB.PCI0.RP05.XHC3) { Name (_ADR, Zero) // _ADR: Address Method (_DSM, 4, NotSerialized) // _DSM: Device-Specific Method { If (LEqual (Arg2, Zero)) { Return (Buffer (One) { 0x03 }) } Store (Package (0x1B) { "AAPL,slot-name", Buffer (0x09) { "Built In" }, "built-in", Buffer (One) { 0x00 }, "device-id", Buffer (0x04) { 0x42, 0x21, 0x00, 0x00 }, "name", Buffer (0x17) { "ASMedia XHC Controller" }, "model", Buffer (0x2E) { "ASMedia ASM3142 #2 2x USB 3.1 Type-A External" }, "AAPL,current-available", 0x0834, "AAPL,current-extra", 0x0A8C, "AAPL,current-in-sleep", 0x0A8C, "AAPL,max-port-current-in-sleep", 0x0834, "AAPL,device-internal", Zero, "AAPL,clock-id", Buffer (One) { 0x01 }, "AAPL,root-hub-depth", 0x1A, "AAPL,XHC-clock-id", One, Buffer (One) { 0x00 } }, Local0) DTGP (Arg0, Arg1, Arg2, Arg3, RefOf (Local0)) Return (Local0) } } Name (_SB.PCI0.RP05.PXSX._STA, Zero) // _STA: Status Device (\_SB.PCI0.RP07.XHC4) { Name (_ADR, Zero) // _ADR: Address Method (_DSM, 4, NotSerialized) // _DSM: Device-Specific Method { If (LEqual (Arg2, Zero)) { Return (Buffer (One) { 0x03 }) } Store (Package (0x1B) { "AAPL,slot-name", Buffer (0x09) { "Built In" }, "built-in", Buffer (One) { 0x00 }, "device-id", Buffer (0x04) { 0x42, 0x21, 0x00, 0x00 }, "name", Buffer (0x17) { "ASMedia XHC Controller" }, "model", Buffer (0x4A) { "ASMedia ASM3142 #3 1x USB 3.1 Type-A / ASM1543 1x USB 3.1 Type-C External" }, "AAPL,current-available", 0x0834, "AAPL,current-extra", 0x0A8C, "AAPL,current-in-sleep", 0x0A8C, "AAPL,max-port-current-in-sleep", 0x0834, "AAPL,device-internal", Zero, "AAPL,clock-id", Buffer (One) { 0x01 }, "AAPL,root-hub-depth", 0x1A, "AAPL,XHC-clock-id", One, Buffer (One) { 0x00 } }, Local0) DTGP (Arg0, Arg1, Arg2, Arg3, RefOf (Local0)) Return (Local0) } } Name (_SB.PCI0.RP07.PXSX._STA, Zero) // _STA: Status Device (\_SB.PCI0.RP09.ANS2) { Name (_ADR, Zero) // _ADR: Address Method (_DSM, 4, NotSerialized) // _DSM: Device-Specific Method { If (LEqual (Arg2, Zero)) { Return (Buffer (One) { 0x03 }) } Store (Package (0x08) { "AAPL,slot-name", Buffer (0x09) { "Built In" }, "built-in", Buffer (One) { 0x00 }, "name", Buffer (0x14) { "AppleANS2Controller" }, "model", Buffer (0x12) { "Apple SSD AP1024M" } }, Local0) DTGP (Arg0, Arg1, Arg2, Arg3, RefOf (Local0)) Return (Local0) } } Name (_SB.PCI0.RP09.PXSX._STA, Zero) // _STA: Status Scope (\_SB.PCI0.SAT1) { Method (_DSM, 4, NotSerialized) // _DSM: Device-Specific Method { Store (Package (0x0C) { "AAPL,slot-name", Buffer (0x09) { "Built In" }, "built-in", Buffer (One) { 0x00 }, "name", Buffer (0x16) { "Intel AHCI Controller" }, "model", Buffer (0x1F) { "Intel X299 Series Chipset SATA" }, "device_type", Buffer (0x15) { "AHCI SATA Controller" }, "device-id", Buffer (0x04) { 0x82, 0xA2, 0x00, 0x00 } }, Local0) DTGP (Arg0, Arg1, Arg2, Arg3, RefOf (Local0)) Return (Local0) } } Scope (\_SB.PCI0.ETH0) { Method (_DSM, 4, NotSerialized) // _DSM: Device-Specific Method { Store (Package (0x10) { "AAPL,slot-name", Buffer (0x09) { "Built In" }, "built-in", Buffer (One) { 0x00 }, "name", Buffer (0x16) { "Intel I219V2 Ethernet" }, "model", Buffer (0x2A) { "Intel I219V2 PCI Express Gigabit Ethernet" }, "location", Buffer (0x02) { "1" }, "subsystem-id", Buffer (0x04) { 0x72, 0x86, 0x00, 0x00 }, "device-id", Buffer (0x04) { 0xB8, 0x15, 0x00, 0x00 }, "subsystem-vendor-id", Buffer (0x04) { 0x43, 0x10, 0x00, 0x00 } }, Local0) DTGP (Arg0, Arg1, Arg2, Arg3, RefOf (Local0)) Return (Local0) } } Scope (\_SB.PCI0.RP02.ETH1) { Method (_DSM, 4, NotSerialized) // _DSM: Device-Specific Method { Store (Package (0x10) { "AAPL,slot-name", Buffer (0x09) { "Built In" }, "built-in", Buffer (One) { 0x00 }, "name", Buffer (0x16) { "Intel I211VA Ethernet" }, "model", Buffer (0x2A) { "Intel I211VA PCI Express Gigabit Ethernet" }, "location", Buffer (0x02) { "2" }, "subsystem-id", Buffer (0x04) { 0xF0, 0x85, 0x00, 0x00 }, "device-id", Buffer (0x04) { 0x39, 0x15, 0x00, 0x00 }, "subsystem-vendor-id", Buffer (0x04) { 0x43, 0x10, 0x00, 0x00 } }, Local0) DTGP (Arg0, Arg1, Arg2, Arg3, RefOf (Local0)) Return (Local0) } } Scope (_SB.PC03.BR3D.ARPT) { OperationRegion (PCIS, PCI_Config, Zero, 0x0100) Field (PCIS, AnyAcc, NoLock, Preserve) { PVID, 16, PDID, 16 } Method (_PRW, 0, NotSerialized) // _PRW: Power Resources for Wake { Return (GPRW (0x69, 0x04)) } Method (_DSM, 4, NotSerialized) // _DSM: Device-Specific Method { Store (Package (0x0E) { "built-in", Buffer (One) { 0x00 }, "device-id", Buffer (0x04) { 0xA0, 0x43, 0x00, 0x00 }, "AAPL,slot-name", Buffer (0x07) { "Slot-3" }, "device_type", Buffer (0x13) { "AirPort Controller" }, "model", Buffer (0x4A) { "OSX WIFI Broadcom BCM94360CD 802.11 a/b/g/n/ac + Bluetooth 4.0 Controller" }, "compatible", Buffer (0x0D) { "pci14e4,43a0" }, "name", Buffer (0x10) { "AirPort Extreme" } }, Local0) DTGP (Arg0, Arg1, Arg2, Arg3, RefOf (Local0)) Return (Local0) } } Scope (\_SB.PC01.BR1A) { Scope (SL01) { Name (_STA, Zero) // _STA: Status } Scope (PEGP) { Name (_STA, Zero) // _STA: Status } Device (UPSB) { Name (_ADR, Zero) // _ADR: Address Method (_DSM, 4, NotSerialized) // _DSM: Device-Specific Method { If (LNot (Arg2)) { Return (Buffer (One) { 0x03 }) } Return (Package (0x02) { "PCI-Thunderbolt", One }) } Name (_RMV, One) // _RMV: Removal Status Device (DSB0) { Name (_ADR, Zero) // _ADR: Address Method (_DSM, 4, NotSerialized) // _DSM: Device-Specific Method { If (LNot (Arg2)) { Return (Buffer (One) { 0x03 }) } Return (Package (0x02) { "PCIHotplugCapable", One }) } Device (NHI0) { Name (_ADR, Zero) // _ADR: Address Name (_STR, Unicode ("Thunderbolt")) // _STR: Description String Method (_DSM, 4, NotSerialized) // _DSM: Device-Specific Method { If (LEqual (Arg2, Zero)) { Return (Buffer (One) { 0x03 }) } Return (Package (0x0D) { "built-in", Buffer (One) { 0x00 }, "device_type", Buffer (0x19) { "Thunderbolt 3 Controller" }, "AAPL,slot-name", Buffer (0x07) { "Slot-4" }, "model", Buffer (0x30) { "ThunderboltEX 3 Intel DSL6540 Thunderbolt 3 NHI" }, "name", Buffer (0x37) { "ThunderboltEX 3 Intel DSL6540 Thunderbolt 3 Controller" }, "power-save", One, Buffer (One) { 0x00 } }) } } } Device (DSB1) { Name (_ADR, 0x00010000) // _ADR: Address Name (_SUN, 0x04) // _SUN: Slot User Number OperationRegion (A1E0, PCI_Config, Zero, 0x40) Field (A1E0, ByteAcc, NoLock, Preserve) { AVND, 32, BMIE, 3, Offset (0x18), PRIB, 8, SECB, 8, SUBB, 8, Offset (0x1E), , 13, MABT, 1 } Method (_BBN, 0, NotSerialized) // _BBN: BIOS Bus Number { Return (SECB) } Method (_STA, 0, NotSerialized) // _STA: Status { Return (0x0F) } Method (_RMV, 0, NotSerialized) // _RMV: Removal Status { Return (Zero) } Device (UPS0) { Name (_ADR, Zero) // _ADR: Address OperationRegion (ARE0, PCI_Config, Zero, 0x04) Field (ARE0, ByteAcc, NoLock, Preserve) { AVND, 16 } Method (_RMV, 0, NotSerialized) // _RMV: Removal Status { If (OSDW ()) { Return (One) } Return (Zero) } Device (DSB0) { Name (_ADR, Zero) // _ADR: Address OperationRegion (A1E0, PCI_Config, Zero, 0x40) Field (A1E0, ByteAcc, NoLock, Preserve) { AVND, 32, BMIE, 3, Offset (0x18), PRIB, 8, SECB, 8, SUBB, 8, Offset (0x1E), , 13, MABT, 1, Offset (0x3E), , 6, SBRS, 1 } Method (_BBN, 0, NotSerialized) // _BBN: BIOS Bus Number { Return (SECB) } Method (_STA, 0, NotSerialized) // _STA: Status { Return (0x0F) } Method (_RMV, 0, NotSerialized) // _RMV: Removal Status { Return (One) } Device (DEV0) { Name (_ADR, Zero) // _ADR: Address Method (_STA, 0, NotSerialized) // _STA: Status { Return (0x0F) } Method (_RMV, 0, NotSerialized) // _RMV: Removal Status { Return (One) } } } Device (DSB1) { Name (_ADR, 0x00010000) // _ADR: Address OperationRegion (A1E0, PCI_Config, Zero, 0x40) Field (A1E0, ByteAcc, NoLock, Preserve) { AVND, 32, BMIE, 3, Offset (0x18), PRIB, 8, SECB, 8, SUBB, 8, Offset (0x1E), , 13, MABT, 1 } Method (_BBN, 0, NotSerialized) // _BBN: BIOS Bus Number { Return (SECB) } Method (_STA, 0, NotSerialized) // _STA: Status { Return (0x0F) } Method (_RMV, 0, NotSerialized) // _RMV: Removal Status { Return (One) } Device (DEV0) { Name (_ADR, Zero) // _ADR: Address Method (_STA, 0, NotSerialized) // _STA: Status { Return (0x0F) } Method (_RMV, 0, NotSerialized) // _RMV: Removal Status { Return (One) } } } Device (DSB2) { Name (_ADR, 0x00020000) // _ADR: Address OperationRegion (A1E0, PCI_Config, Zero, 0x40) Field (A1E0, ByteAcc, NoLock, Preserve) { AVND, 32, BMIE, 3, Offset (0x18), PRIB, 8, SECB, 8, SUBB, 8, Offset (0x1E), , 13, MABT, 1 } Method (_BBN, 0, NotSerialized) // _BBN: BIOS Bus Number { Return (SECB) } Method (_STA, 0, NotSerialized) // _STA: Status { Return (0x0F) } Method (_RMV, 0, NotSerialized) // _RMV: Removal Status { Return (One) } Device (DEV0) { Name (_ADR, Zero) // _ADR: Address Method (_STA, 0, NotSerialized) // _STA: Status { Return (0x0F) } Method (_RMV, 0, NotSerialized) // _RMV: Removal Status { Return (One) } } } Device (DSB3) { Name (_ADR, 0x00030000) // _ADR: Address OperationRegion (A1E0, PCI_Config, Zero, 0x40) Field (A1E0, ByteAcc, NoLock, Preserve) { AVND, 32, BMIE, 3, Offset (0x18), PRIB, 8, SECB, 8, SUBB, 8, Offset (0x1E), , 13, MABT, 1 } Method (_BBN, 0, NotSerialized) // _BBN: BIOS Bus Number { Return (SECB) } Method (_STA, 0, NotSerialized) // _STA: Status { Return (0x0F) } Method (_RMV, 0, NotSerialized) // _RMV: Removal Status { Return (One) } Device (DEV0) { Name (_ADR, Zero) // _ADR: Address Method (_STA, 0, NotSerialized) // _STA: Status { Return (0x0F) } Method (_RMV, 0, NotSerialized) // _RMV: Removal Status { Return (One) } } } Device (DSB4) { Name (_ADR, 0x00040000) // _ADR: Address OperationRegion (A1E0, PCI_Config, Zero, 0x40) Field (A1E0, ByteAcc, NoLock, Preserve) { AVND, 32, BMIE, 3, Offset (0x18), PRIB, 8, SECB, 8, SUBB, 8, Offset (0x1E), , 13, MABT, 1 } Method (_BBN, 0, NotSerialized) // _BBN: BIOS Bus Number { Return (SECB) } Method (_STA, 0, NotSerialized) // _STA: Status { Return (0x0F) } Method (_RMV, 0, NotSerialized) // _RMV: Removal Status { Return (One) } Device (DEV0) { Name (_ADR, Zero) // _ADR: Address Method (_STA, 0, NotSerialized) // _STA: Status { Return (0x0F) } Method (_RMV, 0, NotSerialized) // _RMV: Removal Status { Return (One) } } } Device (DSB5) { Name (_ADR, 0x00050000) // _ADR: Address OperationRegion (A1E0, PCI_Config, Zero, 0x40) Field (A1E0, ByteAcc, NoLock, Preserve) { AVND, 32, BMIE, 3, Offset (0x18), PRIB, 8, SECB, 8, SUBB, 8, Offset (0x1E), , 13, MABT, 1 } Method (_BBN, 0, NotSerialized) // _BBN: BIOS Bus Number { Return (SECB) } Method (_STA, 0, NotSerialized) // _STA: Status { Return (0x0F) } Method (_RMV, 0, NotSerialized) // _RMV: Removal Status { Return (One) } Device (DEV0) { Name (_ADR, Zero) // _ADR: Address Method (_STA, 0, NotSerialized) // _STA: Status { Return (0x0F) } Method (_RMV, 0, NotSerialized) // _RMV: Removal Status { Return (One) } } } } } Device (DSB2) { Name (_ADR, 0x00020000) // _ADR: Address Device (XHC5) { Name (_ADR, Zero) // _ADR: Address Method (_DSM, 4, NotSerialized) // _DSM: Device-Specific Method { If (LEqual (Arg2, Zero)) { Return (Buffer (One) { 0x03 }) } Return (Package (0x12) { "built-in", Buffer (One) { 0x00 }, "AAPL,slot-name", Buffer (0x07) { "Slot-4" }, "model", Buffer (0x41) { "ThunderboltEX 3 Texas Instruments TPS65982 USB 3.1 Type-A/Type-C" }, "name", Buffer (0x31) { "ThunderboltEX 3 Texas Instruments XHC Controller" }, "device_type", Buffer (0x13) { "USB 3.1 Controller" }, "device-id", Buffer (0x04) { 0xB6, 0x15, 0x00, 0x00 }, "USBBusNumber", Zero, "UsbCompanionControllerPresent", One, "AAPL,XHCI-clock-id", One }) } Device (RHUB) { Name (_ADR, Zero) // _ADR: Address Device (SSP1) { Name (_ADR, One) // _ADR: Address Name (_UPC, Package (0x04) // _UPC: USB Port Capabilities { 0xFF, 0x09, Zero, Zero }) Name (_PLD, Package (0x01) // _PLD: Physical Location of Device { Buffer (0x10) { /* 0000 */ 0x81, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 0008 */ 0x31, 0x1C, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 } }) Method (_DSM, 4, NotSerialized) // _DSM: Device-Specific Method { If (LEqual (Arg2, Zero)) { Return (Buffer (One) { 0x03 }) } Return (Package (0x02) { "UsbCPortNumber", One }) } } Device (SSP2) { Name (_ADR, 0x02) // _ADR: Address Name (_UPC, Package (0x04) // _UPC: USB Port Capabilities { 0xFF, 0x09, Zero, Zero }) Name (_PLD, Package (0x01) // _PLD: Physical Location of Device { Buffer (0x10) { /* 0000 */ 0x81, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 0008 */ 0x31, 0x1C, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 } }) Method (_DSM, 4, NotSerialized) // _DSM: Device-Specific Method { If (LEqual (Arg2, Zero)) { Return (Buffer (One) { 0x03 }) } Return (Package (0x02) { "UsbCPortNumber", 0x02 }) } } Device (HS01) { Name (_ADR, 0x03) // _ADR: Address Name (_UPC, Package (0x04) // _UPC: USB Port Capabilities { 0xFF, 0x09, Zero, Zero }) Name (_PLD, Package (0x01) // _PLD: Physical Location of Device { Buffer (0x10) { /* 0000 */ 0x81, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 0008 */ 0x31, 0x1C, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 } }) } Device (HS02) { Name (_ADR, 0x04) // _ADR: Address Name (_UPC, Package (0x04) // _UPC: USB Port Capabilities { 0xFF, 0x09, Zero, Zero }) Name (_PLD, Package (0x01) // _PLD: Physical Location of Device { Buffer (0x10) { /* 0000 */ 0x81, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 0008 */ 0x31, 0x1C, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 } }) } } } } Device (DSB3) { Name (_ADR, 0x00030000) // _ADR: Address } Device (DSB4) { Name (_ADR, 0x00040000) // _ADR: Address } } } Method (DTGP, 5, NotSerialized) { If (LEqual (Arg0, ToUUID ("a0b5b7c6-1318-441c-b0c9-fe695eaf949b"))) { If (LEqual (Arg1, One)) { If (LEqual (Arg2, Zero)) { Store (Buffer (One) { 0x03 }, Arg4) Return (One) } If (LEqual (Arg2, One)) { Return (One) } } } Store (Buffer (One) { 0x00 }, Arg4) Return (Zero) } } SSDT-X299-iMacPro.aml.zip Cheers, KGP
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