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Time2Retire

HP G72

21 posts in this topic

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I no longer have this notebook. Have a real MacBookPro to work with. Don't intent to do anything with this anymore

 

Prepare Yourself For A Shocker

We recently got new HP G72-a12AS notebooks from school. Comes with an Intel i3 350m CPU, and we want OS X installed on it. Some of us, we're a bunch of talented school students, already use Mac's and OS X. Others have desktop hacks running OS X on it and we would all love to see OS X running on the new notebooks.

 

Enter this new study project. We'll be using various types of Mac hardware, including Sam's 17-inch MacBook Pro and some of the schools hardware, including the all new and shiny 27-inch iMac. Please remember that this is just our way of having fun and learn new stuff. A way for some of us to relax after intensive training sessions (up to five per week). A way of using new media, and to hopefully get some additional study points. Which some of us may need later on due to all off-school time.

 

We chose DutchHockeyPro as our team captain since she is the most experienced person in our team, but also uses OS X the longest (has her own 17-inch MacBookPro). She also happens to have a nice aluminum drive enclosure :P which we'll be using for our testing, this due to a restriction from school. In short: We're not allowed to replace the content of the internal hard drive (with MS Windows 7 factory installed on it). No. We have to use an external USB enclosure. Making it a daunting slow task at times.

 

This text, a collection, numerous postings, will change in rapid succession. Edited by several different people, but it will be mostly Sam's work here (it is her account after all).

 

Anyway. We first used OS X 10.6.4 but did update to OS X 10.6.5 as soon as it became available. Not exactly a simple mouse click, because we'll have to replace /boot and in our case also compile a new kernel. This sucks and should change over time. We have an idea to fix this in the boot loader, and we tried a few tricks, but it isn't working yet. Might however, hopefully, materialize eventually into the possibility to skip building (compiling) a kernel after each and every update.

 

Let's move on to the list with the good and the bad stuff:

 

CPU: You'll either need: "cpus=1 busration=17" in com.apple.Boot.plist (under 'Kernel Flags') or patch the kernel with this patch. That will lift the cpus=1 boot restriction. Thanks to TonyMacX86.com for the tip.

 

Notes: Good news after all. I compiled the XNU kernel. Yah. I finally learned how to do it myself. A good starting point, because mine is now something like 500K smaller (there's no PCC code in it, which we don't need anyway). I could even make it smaller, by making two kernels. One for 32 and one for 64 bit booting. This way you can reduce the boot time. Especially on USB sticks. I'm surprised that this wasn't mentioned here.

 

And here's the result. Both cores up and running (4–way multitask processing):

tmbut1pvyfbfavgznrgn.png

Just awesome!

 

LCD Panel The HD+ (1600 x 900) TN-LCD panel (B173RW01) is a 2 channel LVDS (reference found in the EDID) which may or may not work (we're still trying to get it going here).

 

Update: Pfff. We had a dead pixel from day one, which later turned into a dead line so the HP was replaced with a new one, and this time it (same series/model) came with a different LCD panel. Now we have a LGDisplay LP173WD1-TLC3 (we need a link here) instead of the AUO B173RW01 V3 in the broken one. I'm not sure if this is a good thing, but at least Apple is also using LG displays (be it different panels).

 

ATI_GRAPHICS: Isn't working. Major pain.

Notes: Can only use my HP Notebook with shares screen and remote login.

 

INTEL_HD_GRAPHICS: Isn't working. Major pain, but at least I get a mangled screen. And... preventing it from loading AppleIntelFramebufferFB.kext gives me the 1024 x 768 boot display. That's a start isn't it. Also. IOGraphicsFamily.kext (link to source code) is key to get the native resolution (1600 x 900) going. I went nuts and copied the EDID of my MacBookPro6,1 into it. That gives a better screen output (for when the frame buffer kext is loaded).

 

The only way to get anything on a screen right now, is to use something called Screen Sharing or by removing (read deleting) AppleIntelHDGraphicsFB.kext be cause then we do have a working display (this simple one is also used during the initial installation).

 

KEYBOARD: Didn't work OOTB – fixed with kext.

 

TRACKPAD: Didn't work OOTB – fixed with kext.

 

Note: Thanks to JBraddock for his help. Making me understand this part of the puzzle.

 

LAN: Wasn't working OOTB – fixed with a kext (we need a link here).

 

WLAN: Broadcom (pci14e4,4727) isn't working.

- Injecting the device-id 4727 into the two AppleAirportBrcmxxx.kexts doesn't work.

- Injecting device=id 4727/4313 from DSTD doesn't work.

- Injecting device-id 4727/4313 from com.apple.Boot.plist doesn't work (only this will change 'compatible).

Notes: Kext is loading but not matched (might need a bin change first). WLAN FCC ID in BIOS is QDS-BRCM1050, which leads me to believe that this is effectively a Broadcom BCM94313HMG2L (BCM94313HMG2LP1 printed on sticker).

 

I even tried to rebrand the WLAN mini-PCI/e as AirPort, after reading this info, but it failed to locate the required device here. And yes it was Ubuntu I used. Might have to replace the module itself, but that might be difficult because HP appears to white list their adapters. Well. If that is true then I don't know what else to do.

 

Update: The main problem was that the LED on F12 didn't turn blue when you pressed it, but a newer UEFI BIOS made that work. Let's give it another try shall we :P

 

AUDIO: Not working. See also this post for additional info.

 

WEBCAM: Works OOTB (tested with QuickTime).

 

DigitalMediaReader: Works OOTB (tested with a 4GB SanDisk Extreme III - 30MB/s Edition).

 

DSDT: Is massively big and needs to be patched.

 

Notes: Pruned over 65% of useless code so far. Still working on further improvements / reduction. Will share it when I'm done with it, but what I do is basically trial and error. Needs to be verified and confirmed to be right by a more experienced hacker.

 

APIC: Shows unused/disabled cores. This is a cosmetic only issue, and can be solved by patching the APIC table. I used Revolution, but any boot loader capable of loading / overriding ACPI tables will do.

 

ABOUT_THIS_MAC: Shows "unknown" processor and is therefor marked orange. This problem might go away with a next OS X upgrade.

 

Update: And indeed. This issue has been resolved in OS X 10.6.5 Thank you Apple :D

 

SHUTDOWN: Works OOTB.

 

REBOOT: Bad FACP table. Works fine with a patched boot loader (Chameleon, Revolution et all).

 

SLEEP: Works like a reset / reboot.

 

Notes: The problem here might be the fact that we have to use an external USB connected HDD. Another thing I found out was this: pmset -g log shows something I may have to solve:

* Domain: sleep
- Message: Sleep: Platform Failure - AC <= found this one in system.log
- Time: 9/28/10 1:23:45 PM
- Signature: Platform Failure
- UUID: XXXXXXXX-XXXX-XXXX-XXXX-XXXXXXXXXXXX
- Result: Failure

Sleep on battery power does more. It goes to sleep (turns off the display / flashing power LED , but I cannot wake (resume) it. Wake results in a restart. Just another thing to solve (at a later stage).

 

ENERGY SAVER SETTING: Needs the following DSDT patch:

    // 18 Bytes.
   Method (MCDP, 2, NotSerialized)                                              // New Method V1.1 – By Master Chief.
   {
       If (LEqual (Arg0, Zero))                                                 // Function index: 0
       {
           Store (Buffer (One)
           {
               0x03
           }, Arg1)
       }
   }

   Scope (\_SB)
   {
       Device (PNLF)
       {
           Name (_HID, EisaId ("APP0002"))
           Name (_CID, "backlight")
           Name (_UID, 0x0A)
           Name (_STA, 0x0B)
       }
   }

And after you have applied the above patch, the "AppleDisplay" under display0 changes into "AppleBacklightDisplay" but what's more importantly is that it gives you a new / additional check box on the Energy Saver pref pane. The one with the text "Automatically reduce brightness before display goes to sleep".

 

BATTERY STATUS: Non functional.

Notes: I might need VoodooBattery.kext but 1.) I cannot locate the source code and 2.) superhai stopped working on it, and removed all download links to it. Now what?

 

P-STATES: Didn't work OOTB. Had to patch the DSDT. See also DSDT Patching - Part III for additional info.

 

Notes: There's a lot of handy information available about this in the P5K PRO thread where you can find a great deal of tips. It's a must read. This was my Intel SpeedStep bible. Same thing for the Intel SpeedStep thread. Thanks to all people involved there. Great job. Well done.

 

C-STATES: Didn't work OOTB. Had to patch the DSDT. See also DSDT Patching - Part III for additional info.

 

Notes: We don't have to patch the DSDT to get AppleLPC.kext loaded. This one works right out of the box. You only need to add/change your _PR scope and off you go.

 

SBUS: Didn't work OOTB. Had to patch the DSDT and Voilà. All three kexts loaded.

 

Additional info:

 

The HP is a sub-par notebook, for a low 700 Euro, but nevertheless performs quite well. Well above average. Leaving a lot of real Mac's behind. Including the new MacBook Air and some MacBook Pro's. And here's the Geekbench result summary to show you what I mean:

 

wayjcjpa5v2x72qc2fda.png

 

Now. The first Geekbench score of 2854 was not that impressive, but it felt a lot snappier than my desktop hack (triples the score of the HP notebook). Good thing I got a PM from dgsga telling me that his throbber (the rotating spinner below the Apple logo) in Revolution was way too quick. That's when I started to investigate it, and found the culprit. A few Chameleon trunk patches later and we've got a winner. A new top score of 3828. Crushed by almost 1000 points. But that was not the end of it, because the latest score tops 4012. Just over the magically 4000 border. Now that's more like it.

 

Update: The latest Geekbench top score is now 4033.

 

Corrections: Cleanups. Typo's. Tip: Use "we" instead of "I" whenever possible, since we are a team :P

 

Continue reading after the break...

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Collected Information:

 

This post will be used to share the information I gathered. And right now I have four dumps to share with you. Most of them are made after booting from a Linux (Ubuntu) LiveCD – after reading this thread – so I spare you this somewhat time consuming task. More dumps might eventually be added, but only when the need arises. Or on request, but for now, let's just start with the first dump:

 

sudo lspci -xx -vv -nnn output:

00:00.0 Host bridge [0600]: Intel Corporation Core Processor DRAM Controller [8086:0044] (rev 02)
Subsystem: Hewlett-Packard Company Device [103c:143a]
Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
Status: Cap+ 66MHz- UDF- FastB2B+ ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort+ >SERR- <PERR- INTx-
Latency: 0
Capabilities: [e0] Vendor Specific Information <?>
Kernel driver in use: agpgart-intel
Kernel modules: intel-agp
00: 86 80 44 00 06 00 90 20 02 00 00 06 00 00 00 00
10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
20: 00 00 00 00 00 00 00 00 00 00 00 00 3c 10 3a 14
30: 00 00 00 00 e0 00 00 00 00 00 00 00 00 00 00 00

00:01.0 PCI bridge [0604]: Intel Corporation Core Processor PCI Express x16 Root Port [8086:0045] (rev 02)
Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx+
Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0, Cache Line Size: 64 bytes
Bus: primary=00, secondary=01, subordinate=01, sec-latency=0
I/O behind bridge: 00003000-00003fff
Memory behind bridge: c4400000-c44fffff
Prefetchable memory behind bridge: 00000000a0000000-00000000afffffff
Secondary status: 66MHz- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- <SERR- <PERR-
BridgeCtl: Parity- SERR- NoISA- VGA- MAbort- >Reset- FastB2B-
	PriDiscTmr- SecDiscTmr- DiscTmrStat- DiscTmrSERREn-
Capabilities: [88] Subsystem: Hewlett-Packard Company Device [103c:143a]
Capabilities: [80] Power Management version 3
	Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0+,D1-,D2-,D3hot+,D3cold+)
	Status: D0 PME-Enable- DSel=0 DScale=0 PME-
Capabilities: [90] Message Signalled Interrupts: Mask- 64bit- Queue=0/0 Enable+
	Address: fee0f00c  Data: 4189
Capabilities: [a0] Express (v2) Root Port (Slot+), MSI 00
	DevCap:	MaxPayload 128 bytes, PhantFunc 0, Latency L0s <64ns, L1 <1us
		ExtTag- RBE+ FLReset-
	DevCtl:	Report errors: Correctable- Non-Fatal- Fatal- Unsupported-
		RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop-
		MaxPayload 128 bytes, MaxReadReq 128 bytes
	DevSta:	CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend-
	LnkCap:	Port #2, Speed 2.5GT/s, Width x16, ASPM L0s L1, Latency L0 <256ns, L1 <4us
		ClockPM- Suprise- LLActRep- BwNot+
	LnkCtl:	ASPM L0s L1 Enabled; RCB 64 bytes Disabled- Retrain- CommClk+
		ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
	LnkSta:	Speed 2.5GT/s, Width x16, TrErr- Train- SlotClk+ DLActive- BWMgmt+ ABWMgmt-
	SltCap:	AttnBtn- PwrCtrl- MRL- AttnInd- PwrInd- HotPlug- Surpise-
		Slot # 11, PowerLimit 75.000000; Interlock- NoCompl+
	SltCtl:	Enable: AttnBtn- PwrFlt- MRL- PresDet- CmdCplt- HPIrq- LinkChg-
		Control: AttnInd Unknown, PwrInd Unknown, Power- Interlock-
	SltSta:	Status: AttnBtn- PowerFlt- MRL- CmdCplt- PresDet+ Interlock-
		Changed: MRL- PresDet+ LinkState-
	RootCtl: ErrCorrectable- ErrNon-Fatal- ErrFatal- PMEIntEna- CRSVisible-
	RootCap: CRSVisible-
	RootSta: PME ReqID 0000, PMEStatus- PMEPending-
Capabilities: [100] Virtual Channel <?>
Kernel driver in use: pcieport
Kernel modules: shpchp
00: 86 80 45 00 07 04 10 00 02 00 04 06 10 00 01 00
10: 00 00 00 00 00 00 00 00 00 01 01 00 30 30 00 00
20: 40 c4 40 c4 01 a0 f1 af 00 00 00 00 00 00 00 00
30: 00 00 00 00 88 00 00 00 00 00 00 00 ff 01 00 00

00:02.0 VGA compatible controller [0300]: Intel Corporation Core Processor Integrated Graphics Controller [8086:0046] (rev 02)
Subsystem: Hewlett-Packard Company Device [103c:143a]
Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx+
Status: Cap+ 66MHz- UDF- FastB2B+ ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0
Interrupt: pin A routed to IRQ 34
Region 0: Memory at c0000000 (64-bit, non-prefetchable) [size=4]
Region 2: Memory at b0000000 (64-bit, prefetchable) [size=256]
Region 4: I/O ports at 4050 [size=8]
Capabilities: [90] Message Signalled Interrupts: Mask- 64bit- Queue=0/0 Enable+
	Address: fee0c00c  Data: 41c1
Capabilities: [d0] Power Management version 2
	Flags: PMEClk- DSI+ D1- D2- AuxCurrent=0mA PME(D0-,D1-,D2-,D3hot-,D3cold-)
	Status: D0 PME-Enable- DSel=0 DScale=0 PME-
Capabilities: [a4] PCIe advanced features <?>
Kernel driver in use: i915
Kernel modules: i915
00: 86 80 46 00 07 04 90 00 02 00 00 03 00 00 00 00
10: 04 00 00 c0 00 00 00 00 0c 00 00 b0 00 00 00 00
20: 51 40 00 00 00 00 00 00 00 00 00 00 3c 10 3a 14
30: 00 00 00 00 90 00 00 00 00 00 00 00 05 01 00 00

00:16.0 Communication controller [0780]: Intel Corporation 5 Series/3400 Series Chipset HECI Controller [8086:3b64] (rev 06)
Subsystem: Hewlett-Packard Company Device [103c:143a]
Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0
Interrupt: pin A routed to IRQ 5
Region 0: Memory at c4506100 (64-bit, non-prefetchable) [size=16]
Capabilities: [50] Power Management version 3
	Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0+,D1-,D2-,D3hot+,D3cold+)
	Status: D0 PME-Enable- DSel=0 DScale=0 PME-
Capabilities: [8c] Message Signalled Interrupts: Mask- 64bit+ Queue=0/0 Enable-
	Address: 0000000000000000  Data: 0000
00: 86 80 64 3b 06 00 10 00 06 00 80 07 00 00 80 00
10: 04 61 50 c4 00 00 00 00 00 00 00 00 00 00 00 00
20: 00 00 00 00 00 00 00 00 00 00 00 00 3c 10 3a 14
30: 00 00 00 00 50 00 00 00 00 00 00 00 05 01 00 00

00:1a.0 USB Controller [0c03]: Intel Corporation 5 Series/3400 Series Chipset USB2 Enhanced Host Controller [8086:3b3c] (rev 05) (prog-if 20)
Subsystem: Hewlett-Packard Company Device [103c:143a]
Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
Status: Cap+ 66MHz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0
Interrupt: pin A routed to IRQ 16
Region 0: Memory at c4505c00 (32-bit, non-prefetchable) [size=1K]
Capabilities: [50] Power Management version 2
	Flags: PMEClk- DSI- D1- D2- AuxCurrent=375mA PME(D0+,D1-,D2-,D3hot+,D3cold+)
	Status: D0 PME-Enable- DSel=0 DScale=0 PME-
Capabilities: [58] Debug port: BAR=1 offset=00a0
Capabilities: [98] PCIe advanced features <?>
Kernel driver in use: ehci_hcd
00: 86 80 3c 3b 06 00 90 02 05 20 03 0c 00 00 00 00
10: 00 5c 50 c4 00 00 00 00 00 00 00 00 00 00 00 00
20: 00 00 00 00 00 00 00 00 00 00 00 00 3c 10 3a 14
30: 00 00 00 00 50 00 00 00 00 00 00 00 05 01 00 00

00:1b.0 Audio device [0403]: Intel Corporation 5 Series/3400 Series Chipset High Definition Audio [8086:3b56] (rev 05)
Subsystem: Hewlett-Packard Company Device [103c:143a]
Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0, Cache Line Size: 64 bytes
Interrupt: pin A routed to IRQ 22
Region 0: Memory at c4500000 (64-bit, non-prefetchable) [size=16K]
Capabilities: [50] Power Management version 2
	Flags: PMEClk- DSI- D1- D2- AuxCurrent=55mA PME(D0+,D1-,D2-,D3hot+,D3cold+)
	Status: D0 PME-Enable- DSel=0 DScale=0 PME-
Capabilities: [60] Message Signalled Interrupts: Mask- 64bit+ Queue=0/0 Enable-
	Address: 0000000000000000  Data: 0000
Capabilities: [70] Express (v1) Root Complex Integrated Endpoint, MSI 00
	DevCap:	MaxPayload 128 bytes, PhantFunc 0, Latency L0s <64ns, L1 <1us
		ExtTag- RBE- FLReset+
	DevCtl:	Report errors: Correctable- Non-Fatal- Fatal- Unsupported-
		RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop+
		MaxPayload 128 bytes, MaxReadReq 128 bytes
	DevSta:	CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr+ TransPend-
	LnkCap:	Port #0, Speed unknown, Width x0, ASPM unknown, Latency L0 <64ns, L1 <1us
		ClockPM- Suprise- LLActRep- BwNot-
	LnkCtl:	ASPM Disabled; Disabled- Retrain- CommClk-
		ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
	LnkSta:	Speed unknown, Width x0, TrErr- Train- SlotClk- DLActive- BWMgmt- ABWMgmt-
Capabilities: [100] Virtual Channel <?>
Capabilities: [130] Root Complex Link <?>
Kernel driver in use: HDA Intel
Kernel modules: snd-hda-intel
00: 86 80 56 3b 06 00 10 00 05 00 03 04 10 00 00 00
10: 04 00 50 c4 00 00 00 00 00 00 00 00 00 00 00 00
20: 00 00 00 00 00 00 00 00 00 00 00 00 3c 10 3a 14
30: 00 00 00 00 50 00 00 00 00 00 00 00 0b 01 00 00

00:1c.0 PCI bridge [0604]: Intel Corporation 5 Series/3400 Series Chipset PCI Express Root Port 1 [8086:3b42] (rev 05)
Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx+
Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0, Cache Line Size: 64 bytes
Bus: primary=00, secondary=02, subordinate=02, sec-latency=0
I/O behind bridge: 00002000-00002fff
Memory behind bridge: c3400000-c43fffff
Prefetchable memory behind bridge: 00000000c0400000-00000000c13fffff
Secondary status: 66MHz- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- <SERR- <PERR-
BridgeCtl: Parity- SERR- NoISA- VGA- MAbort- >Reset- FastB2B-
	PriDiscTmr- SecDiscTmr- DiscTmrStat- DiscTmrSERREn-
Capabilities: [40] Express (v2) Root Port (Slot+), MSI 00
	DevCap:	MaxPayload 128 bytes, PhantFunc 0, Latency L0s <64ns, L1 <1us
		ExtTag- RBE+ FLReset-
	DevCtl:	Report errors: Correctable- Non-Fatal- Fatal- Unsupported-
		RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop-
		MaxPayload 128 bytes, MaxReadReq 128 bytes
	DevSta:	CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr+ TransPend-
	LnkCap:	Port #1, Speed 2.5GT/s, Width x1, ASPM L0s L1, Latency L0 <256ns, L1 <4us
		ClockPM- Suprise- LLActRep+ BwNot-
	LnkCtl:	ASPM Disabled; RCB 64 bytes Disabled- Retrain- CommClk+
		ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
	LnkSta:	Speed 2.5GT/s, Width x1, TrErr- Train- SlotClk+ DLActive+ BWMgmt- ABWMgmt-
	SltCap:	AttnBtn- PwrCtrl- MRL- AttnInd- PwrInd- HotPlug+ Surpise+
		Slot #  0, PowerLimit 10.000000; Interlock- NoCompl+
	SltCtl:	Enable: AttnBtn- PwrFlt- MRL- PresDet+ CmdCplt- HPIrq- LinkChg-
		Control: AttnInd Unknown, PwrInd Unknown, Power- Interlock-
	SltSta:	Status: AttnBtn- PowerFlt- MRL- CmdCplt- PresDet+ Interlock-
		Changed: MRL- PresDet- LinkState-
	RootCtl: ErrCorrectable- ErrNon-Fatal- ErrFatal- PMEIntEna- CRSVisible-
	RootCap: CRSVisible-
	RootSta: PME ReqID 0000, PMEStatus- PMEPending-
Capabilities: [80] Message Signalled Interrupts: Mask- 64bit- Queue=0/0 Enable+
	Address: fee0f00c  Data: 4191
Capabilities: [90] Subsystem: Hewlett-Packard Company Device [103c:143a]
Capabilities: [a0] Power Management version 2
	Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0+,D1-,D2-,D3hot+,D3cold+)
	Status: D0 PME-Enable- DSel=0 DScale=0 PME-
Kernel driver in use: pcieport
Kernel modules: shpchp
00: 86 80 42 3b 07 04 10 00 05 00 04 06 10 00 81 00
10: 00 00 00 00 00 00 00 00 00 02 02 00 20 20 00 00
20: 40 c3 30 c4 41 c0 31 c1 00 00 00 00 00 00 00 00
30: 00 00 00 00 40 00 00 00 00 00 00 00 ff 01 00 00

00:1c.2 PCI bridge [0604]: Intel Corporation 5 Series/3400 Series Chipset PCI Express Root Port 3 [8086:3b46] (rev 05)
Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx+
Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0, Cache Line Size: 64 bytes
Bus: primary=00, secondary=03, subordinate=03, sec-latency=0
I/O behind bridge: 00001000-00001fff
Memory behind bridge: c2400000-c33fffff
Prefetchable memory behind bridge: 00000000c1400000-00000000c23fffff
Secondary status: 66MHz- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- <SERR- <PERR-
BridgeCtl: Parity- SERR- NoISA- VGA- MAbort- >Reset- FastB2B-
	PriDiscTmr- SecDiscTmr- DiscTmrStat- DiscTmrSERREn-
Capabilities: [40] Express (v2) Root Port (Slot+), MSI 00
	DevCap:	MaxPayload 128 bytes, PhantFunc 0, Latency L0s <64ns, L1 <1us
		ExtTag- RBE+ FLReset-
	DevCtl:	Report errors: Correctable- Non-Fatal- Fatal- Unsupported-
		RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop-
		MaxPayload 128 bytes, MaxReadReq 128 bytes
	DevSta:	CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr+ TransPend-
	LnkCap:	Port #3, Speed 2.5GT/s, Width x1, ASPM L0s L1, Latency L0 <256ns, L1 <4us
		ClockPM- Suprise- LLActRep+ BwNot-
	LnkCtl:	ASPM L0s L1 Enabled; RCB 64 bytes Disabled- Retrain- CommClk+
		ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
	LnkSta:	Speed 2.5GT/s, Width x1, TrErr- Train- SlotClk+ DLActive+ BWMgmt- ABWMgmt-
	SltCap:	AttnBtn- PwrCtrl- MRL- AttnInd- PwrInd- HotPlug+ Surpise+
		Slot #  2, PowerLimit 10.000000; Interlock- NoCompl+
	SltCtl:	Enable: AttnBtn- PwrFlt- MRL- PresDet- CmdCplt- HPIrq- LinkChg-
		Control: AttnInd Unknown, PwrInd Unknown, Power- Interlock-
	SltSta:	Status: AttnBtn- PowerFlt- MRL- CmdCplt- PresDet+ Interlock-
		Changed: MRL- PresDet+ LinkState+
	RootCtl: ErrCorrectable- ErrNon-Fatal- ErrFatal- PMEIntEna- CRSVisible-
	RootCap: CRSVisible-
	RootSta: PME ReqID 0000, PMEStatus- PMEPending-
Capabilities: [80] Message Signalled Interrupts: Mask- 64bit- Queue=0/0 Enable+
	Address: fee0f00c  Data: 4199
Capabilities: [90] Subsystem: Hewlett-Packard Company Device [103c:143a]
Capabilities: [a0] Power Management version 2
	Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0+,D1-,D2-,D3hot+,D3cold+)
	Status: D0 PME-Enable- DSel=0 DScale=0 PME-
Kernel driver in use: pcieport
Kernel modules: shpchp
00: 86 80 46 3b 07 04 10 00 05 00 04 06 10 00 81 00
10: 00 00 00 00 00 00 00 00 00 03 03 00 10 10 00 00
20: 40 c2 30 c3 41 c1 31 c2 00 00 00 00 00 00 00 00
30: 00 00 00 00 40 00 00 00 00 00 00 00 ff 03 00 00

00:1d.0 USB Controller [0c03]: Intel Corporation 5 Series/3400 Series Chipset USB2 Enhanced Host Controller [8086:3b34] (rev 05) (prog-if 20)
Subsystem: Hewlett-Packard Company Device [103c:143a]
Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
Status: Cap+ 66MHz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0
Interrupt: pin A routed to IRQ 23
Region 0: Memory at c4505800 (32-bit, non-prefetchable) [size=1K]
Capabilities: [50] Power Management version 2
	Flags: PMEClk- DSI- D1- D2- AuxCurrent=375mA PME(D0+,D1-,D2-,D3hot+,D3cold+)
	Status: D0 PME-Enable- DSel=0 DScale=0 PME+
Capabilities: [58] Debug port: BAR=1 offset=00a0
Capabilities: [98] PCIe advanced features <?>
Kernel driver in use: ehci_hcd
00: 86 80 34 3b 06 00 90 02 05 20 03 0c 00 00 00 00
10: 00 58 50 c4 00 00 00 00 00 00 00 00 00 00 00 00
20: 00 00 00 00 00 00 00 00 00 00 00 00 3c 10 3a 14
30: 00 00 00 00 50 00 00 00 00 00 00 00 05 01 00 00

00:1e.0 PCI bridge [0604]: Intel Corporation 82801 Mobile PCI Bridge [8086:2448] (rev a5) (prog-if 01)
Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR+ FastB2B- DisINTx-
Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0
Bus: primary=00, secondary=04, subordinate=04, sec-latency=32
I/O behind bridge: 0000f000-00000fff
Memory behind bridge: fff00000-000fffff
Prefetchable memory behind bridge: 00000000fff00000-00000000000fffff
Secondary status: 66MHz- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort+ <SERR- <PERR-
BridgeCtl: Parity- SERR+ NoISA- VGA- MAbort- >Reset- FastB2B-
	PriDiscTmr- SecDiscTmr- DiscTmrStat- DiscTmrSERREn-
Capabilities: [50] Subsystem: Hewlett-Packard Company Device [103c:143a]
00: 86 80 48 24 07 01 10 00 a5 01 04 06 00 00 01 00
10: 00 00 00 00 00 00 00 00 00 04 04 20 f0 00 80 22
20: f0 ff 00 00 f1 ff 01 00 00 00 00 00 00 00 00 00
30: 00 00 00 00 50 00 00 00 00 00 00 00 ff 00 02 00

00:1f.0 ISA bridge [0601]: Intel Corporation Mobile 5 Series Chipset LPC Interface Controller [8086:3b09] (rev 05)
Subsystem: Hewlett-Packard Company Device [103c:143a]
Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0
Capabilities: [e0] Vendor Specific Information <?>
Kernel modules: iTCO_wdt
00: 86 80 09 3b 07 00 10 02 05 00 01 06 00 00 80 00
10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
20: 00 00 00 00 00 00 00 00 00 00 00 00 3c 10 3a 14
30: 00 00 00 00 e0 00 00 00 00 00 00 00 00 00 00 00

00:1f.2 SATA controller [0106]: Intel Corporation 5 Series/3400 Series Chipset 4 port SATA AHCI Controller [8086:3b29] (rev 05) (prog-if 01)
Subsystem: Hewlett-Packard Company Device [103c:143a]
Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx+
Status: Cap+ 66MHz+ UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0
Interrupt: pin B routed to IRQ 33
Region 0: I/O ports at 4048 [size=8]
Region 1: I/O ports at 405c [size=4]
Region 2: I/O ports at 4040 [size=8]
Region 3: I/O ports at 4058 [size=4]
Region 4: I/O ports at 4020 [size=32]
Region 5: Memory at c4505000 (32-bit, non-prefetchable) [size=2K]
Capabilities: [80] Message Signalled Interrupts: Mask- 64bit- Queue=0/0 Enable+
	Address: fee0300c  Data: 41b9
Capabilities: [70] Power Management version 3
	Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0-,D1-,D2-,D3hot+,D3cold-)
	Status: D0 PME-Enable- DSel=0 DScale=0 PME-
Capabilities: [a8] SATA HBA <?>
Capabilities: [b0] PCIe advanced features <?>
Kernel driver in use: ahci
Kernel modules: ahci
00: 86 80 29 3b 07 04 b0 02 05 01 06 01 00 00 00 00
10: 49 40 00 00 5d 40 00 00 41 40 00 00 59 40 00 00
20: 21 40 00 00 00 50 50 c4 00 00 00 00 3c 10 3a 14
30: 00 00 00 00 80 00 00 00 00 00 00 00 0a 02 00 00

00:1f.3 SMBus [0c05]: Intel Corporation 5 Series/3400 Series Chipset SMBus Controller [8086:3b30] (rev 05)
Subsystem: Hewlett-Packard Company Device [103c:143a]
Control: I/O+ Mem+ BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
Status: Cap- 66MHz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Interrupt: pin C routed to IRQ 10
Region 0: Memory at c4506000 (64-bit, non-prefetchable) [size=256]
Region 4: I/O ports at 4000 [size=32]
Kernel modules: i2c-i801
00: 86 80 30 3b 03 00 80 02 05 00 05 0c 00 00 00 00
10: 04 60 50 c4 00 00 00 00 00 00 00 00 00 00 00 00
20: 01 40 00 00 00 00 00 00 00 00 00 00 3c 10 3a 14
30: 00 00 00 00 00 00 00 00 00 00 00 00 0a 03 00 00

00:1f.6 Signal processing controller [1180]: Intel Corporation 5 Series/3400 Series Chipset Thermal Subsystem [8086:3b32] (rev 05)
Subsystem: Hewlett-Packard Company Device [103c:143a]
Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0
Interrupt: pin A routed to IRQ 11
Region 0: Memory at c4504000 (64-bit, non-prefetchable) [size=4K]
Capabilities: [50] Power Management version 3
	Flags: PMEClk- DSI+ D1- D2- AuxCurrent=0mA PME(D0-,D1-,D2-,D3hot-,D3cold-)
	Status: D0 PME-Enable- DSel=0 DScale=0 PME-
Capabilities: [80] Message Signalled Interrupts: Mask- 64bit- Queue=0/0 Enable-
	Address: 00000000  Data: 0000
00: 86 80 32 3b 06 00 10 00 05 00 80 11 00 00 00 00
10: 04 40 50 c4 00 00 00 00 00 00 00 00 00 00 00 00
20: 00 00 00 00 00 00 00 00 00 00 00 00 3c 10 3a 14
30: 00 00 00 00 50 00 00 00 00 00 00 00 0b 01 00 00

01:00.0 VGA compatible controller [0300]: ATI Technologies Inc Manhattan [Mobility Radeon HD 5000 Series] [1002:68e0]
Subsystem: Hewlett-Packard Company Device [103c:143a]
Control: I/O- Mem- BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Interrupt: pin A routed to IRQ 5
Region 0: Memory at a0000000 (64-bit, prefetchable) [disabled] [size=256M]
Region 2: Memory at c4400000 (64-bit, non-prefetchable) [disabled] [size=128K]
Region 4: I/O ports at 3000 [disabled] [size=256]
Expansion ROM at c4440000 [disabled] [size=128K]
Capabilities: [50] Power Management version 3
	Flags: PMEClk- DSI- D1+ D2+ AuxCurrent=0mA PME(D0-,D1-,D2-,D3hot-,D3cold-)
	Status: D0 PME-Enable- DSel=0 DScale=0 PME-
Capabilities: [58] Express (v2) Legacy Endpoint, MSI 00
	DevCap:	MaxPayload 256 bytes, PhantFunc 0, Latency L0s <4us, L1 unlimited
		ExtTag+ AttnBtn- AttnInd- PwrInd- RBE+ FLReset-
	DevCtl:	Report errors: Correctable- Non-Fatal- Fatal- Unsupported-
		RlxdOrd+ ExtTag- PhantFunc- AuxPwr- NoSnoop+
		MaxPayload 128 bytes, MaxReadReq 512 bytes
	DevSta:	CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend-
	LnkCap:	Port #0, Speed 5GT/s, Width x16, ASPM L0s L1, Latency L0 <64ns, L1 <1us
		ClockPM- Suprise- LLActRep- BwNot-
	LnkCtl:	ASPM L0s L1 Enabled; RCB 64 bytes Disabled- Retrain- CommClk+
		ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
	LnkSta:	Speed 2.5GT/s, Width x16, TrErr- Train- SlotClk+ DLActive- BWMgmt- ABWMgmt-
Capabilities: [a0] Message Signalled Interrupts: Mask- 64bit+ Queue=0/0 Enable-
	Address: 0000000000000000  Data: 0000
Capabilities: [100] Vendor Specific Information <?>
00: 02 10 e0 68 00 00 10 00 00 00 00 03 10 00 80 00
10: 0c 00 00 a0 00 00 00 00 04 00 40 c4 00 00 00 00
20: 01 30 00 00 00 00 00 00 00 00 00 00 3c 10 3a 14
30: 00 00 fe ff 50 00 00 00 00 00 00 00 05 01 00 00

01:00.1 Audio device [0403]: ATI Technologies Inc Manhattan HDMI Audio [Mobility Radeon HD 5000 Series] [1002:aa68]
Subsystem: Hewlett-Packard Company Device [103c:143a]
Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0, Cache Line Size: 64 bytes
Interrupt: pin B routed to IRQ 17
Region 0: Memory at c4420000 (64-bit, non-prefetchable) [size=16K]
Capabilities: [50] Power Management version 3
	Flags: PMEClk- DSI- D1+ D2+ AuxCurrent=0mA PME(D0-,D1-,D2-,D3hot-,D3cold-)
	Status: D0 PME-Enable- DSel=0 DScale=0 PME-
Capabilities: [58] Express (v2) Legacy Endpoint, MSI 00
	DevCap:	MaxPayload 256 bytes, PhantFunc 0, Latency L0s <4us, L1 unlimited
		ExtTag+ AttnBtn- AttnInd- PwrInd- RBE+ FLReset-
	DevCtl:	Report errors: Correctable- Non-Fatal- Fatal- Unsupported-
		RlxdOrd+ ExtTag- PhantFunc- AuxPwr- NoSnoop+
		MaxPayload 128 bytes, MaxReadReq 512 bytes
	DevSta:	CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend-
	LnkCap:	Port #0, Speed 5GT/s, Width x16, ASPM L0s L1, Latency L0 <64ns, L1 <1us
		ClockPM- Suprise- LLActRep- BwNot-
	LnkCtl:	ASPM L0s L1 Enabled; RCB 64 bytes Disabled- Retrain- CommClk+
		ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
	LnkSta:	Speed 2.5GT/s, Width x16, TrErr- Train- SlotClk+ DLActive- BWMgmt- ABWMgmt-
Capabilities: [a0] Message Signalled Interrupts: Mask- 64bit+ Queue=0/0 Enable-
	Address: 0000000000000000  Data: 0000
Capabilities: [100] Vendor Specific Information <?>
Kernel driver in use: HDA Intel
Kernel modules: snd-hda-intel
00: 02 10 68 aa 07 00 10 00 00 00 03 04 10 00 80 00
10: 04 00 42 c4 00 00 00 00 00 00 00 00 00 00 00 00
20: 00 00 00 00 00 00 00 00 00 00 00 00 3c 10 3a 14
30: 00 00 00 00 50 00 00 00 00 00 00 00 0a 02 00 00

02:00.0 Ethernet controller [0200]: Realtek Semiconductor Co., Ltd. RTL8101E/RTL8102E PCI Express Fast Ethernet controller [10ec:8136] (rev 02)
Subsystem: Hewlett-Packard Company Device [103c:143a]
Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx+
Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0, Cache Line Size: 64 bytes
Interrupt: pin A routed to IRQ 32
Region 0: I/O ports at 2000 [size=256]
Region 2: Memory at c0410000 (64-bit, prefetchable) [size=4K]
Region 4: Memory at c0400000 (64-bit, prefetchable) [size=64K]
Expansion ROM at c0420000 [disabled] [size=128K]
Capabilities: [40] Power Management version 3
	Flags: PMEClk- DSI- D1+ D2+ AuxCurrent=375mA PME(D0+,D1+,D2+,D3hot+,D3cold+)
	Status: D0 PME-Enable- DSel=0 DScale=0 PME-
Capabilities: [50] Message Signalled Interrupts: Mask- 64bit+ Queue=0/0 Enable+
	Address: 00000000fee0f00c  Data: 41a9
Capabilities: [70] Express (v2) Endpoint, MSI 01
	DevCap:	MaxPayload 128 bytes, PhantFunc 0, Latency L0s <128ns, L1 <2us
		ExtTag- AttnBtn- AttnInd- PwrInd- RBE+ FLReset-
	DevCtl:	Report errors: Correctable- Non-Fatal- Fatal- Unsupported-
		RlxdOrd+ ExtTag- PhantFunc- AuxPwr- NoSnoop-
		MaxPayload 128 bytes, MaxReadReq 4096 bytes
	DevSta:	CorrErr+ UncorrErr- FatalErr- UnsuppReq+ AuxPwr+ TransPend-
	LnkCap:	Port #0, Speed 2.5GT/s, Width x1, ASPM L0s L1, Latency L0 <512ns, L1 <64us
		ClockPM+ Suprise- LLActRep- BwNot-
	LnkCtl:	ASPM Disabled; RCB 64 bytes Disabled- Retrain- CommClk+
		ExtSynch- ClockPM+ AutWidDis- BWInt- AutBWInt-
	LnkSta:	Speed 2.5GT/s, Width x1, TrErr- Train- SlotClk+ DLActive- BWMgmt- ABWMgmt-
Capabilities: [ac] MSI-X: Enable- Mask- TabSize=2
	Vector table: BAR=4 offset=00000000
	PBA: BAR=4 offset=00000800
Capabilities: [cc] Vital Product Data <?>
Capabilities: [100] Advanced Error Reporting <?>
Capabilities: [140] Virtual Channel <?>
Capabilities: [160] Device Serial Number xx-xx-xx-xx-xx-xx-xx-xx
Kernel driver in use: r8169
Kernel modules: r8169
00: ec 10 36 81 07 04 10 00 02 00 00 02 10 00 00 00
10: 01 20 00 00 00 00 00 00 0c 00 41 c0 00 00 00 00
20: 0c 00 40 c0 00 00 00 00 00 00 00 00 3c 10 3a 14
30: 00 00 fe ff 40 00 00 00 00 00 00 00 05 01 00 00

03:00.0 Network controller [0280]: Broadcom Corporation Device [14e4:4727] (rev 01)
Subsystem: Hewlett-Packard Company Device [103c:145c]
Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0, Cache Line Size: 64 bytes
Interrupt: pin A routed to IRQ 11
Region 0: Memory at c2400000 (64-bit, non-prefetchable) [size=16K]
Capabilities: [40] Power Management version 3
	Flags: PMEClk- DSI- D1+ D2+ AuxCurrent=0mA PME(D0-,D1-,D2-,D3hot-,D3cold-)
	Status: D0 PME-Enable- DSel=0 DScale=2 PME-
Capabilities: [58] Vendor Specific Information <?>
Capabilities: [48] Message Signalled Interrupts: Mask- 64bit+ Queue=0/0 Enable-
	Address: 0000000000000000  Data: 0000
Capabilities: [d0] Express (v1) Endpoint, MSI 00
	DevCap:	MaxPayload 128 bytes, PhantFunc 0, Latency L0s <4us, L1 unlimited
		ExtTag+ AttnBtn- AttnInd- PwrInd- RBE+ FLReset-
	DevCtl:	Report errors: Correctable- Non-Fatal- Fatal- Unsupported-
		RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop-
		MaxPayload 128 bytes, MaxReadReq 128 bytes
	DevSta:	CorrErr+ UncorrErr- FatalErr- UnsuppReq+ AuxPwr+ TransPend-
	LnkCap:	Port #0, Speed 2.5GT/s, Width x1, ASPM L0s L1, Latency L0 <4us, L1 <64us
		ClockPM+ Suprise- LLActRep+ BwNot-
	LnkCtl:	ASPM L0s L1 Enabled; RCB 64 bytes Disabled- Retrain- CommClk+
		ExtSynch- ClockPM+ AutWidDis- BWInt- AutBWInt-
	LnkSta:	Speed 2.5GT/s, Width x1, TrErr- Train- SlotClk+ DLActive+ BWMgmt- ABWMgmt-
Capabilities: [100] Advanced Error Reporting <?>
Capabilities: [13c] Virtual Channel <?>
Capabilities: [160] Device Serial Number xx-xx-xx-xx-xx-xx-xx-xx
Capabilities: [16c] Power Budgeting <?>
00: e4 14 27 47 06 00 10 00 01 00 80 02 10 00 00 00
10: 04 00 40 c2 00 00 00 00 00 00 00 00 00 00 00 00
20: 00 00 00 00 00 00 00 00 00 00 00 00 3c 10 5c 14
30: 00 00 00 00 40 00 00 00 00 00 00 00 0b 01 00 00

7f:00.0 Host bridge [0600]: Intel Corporation Core Processor QuickPath Architecture Generic Non-core Registers [8086:2c62] (rev 02)
Subsystem: Hewlett-Packard Company Device [103c:143a]
Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
Status: Cap- 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0
00: 86 80 62 2c 06 00 00 00 02 00 00 06 00 00 80 00
10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
20: 00 00 00 00 00 00 00 00 00 00 00 00 3c 10 3a 14
30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

7f:00.1 Host bridge [0600]: Intel Corporation Core Processor QuickPath Architecture System Address Decoder [8086:2d01] (rev 02)
Subsystem: Hewlett-Packard Company Device [103c:143a]
Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
Status: Cap- 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0
00: 86 80 01 2d 06 00 00 00 02 00 00 06 00 00 80 00
10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
20: 00 00 00 00 00 00 00 00 00 00 00 00 3c 10 3a 14
30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

7f:02.0 Host bridge [0600]: Intel Corporation Core Processor QPI Link 0 [8086:2d10] (rev 02)
Subsystem: Hewlett-Packard Company Device [103c:143a]
Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
Status: Cap- 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0
00: 86 80 10 2d 06 00 00 00 02 00 00 06 00 00 80 00
10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
20: 00 00 00 00 00 00 00 00 00 00 00 00 3c 10 3a 14
30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

7f:02.1 Host bridge [0600]: Intel Corporation Core Processor QPI Physical 0 [8086:2d11] (rev 02)
Subsystem: Hewlett-Packard Company Device [103c:143a]
Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
Status: Cap- 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0
00: 86 80 11 2d 06 00 00 00 02 00 00 06 00 00 80 00
10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
20: 00 00 00 00 00 00 00 00 00 00 00 00 3c 10 3a 14
30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

7f:02.2 Host bridge [0600]: Intel Corporation Core Processor Reserved [8086:2d12] (rev 02)
Subsystem: Hewlett-Packard Company Device [103c:143a]
Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
Status: Cap- 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0
00: 86 80 12 2d 06 00 00 00 02 00 00 06 00 00 80 00
10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
20: 00 00 00 00 00 00 00 00 00 00 00 00 3c 10 3a 14
30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

7f:02.3 Host bridge [0600]: Intel Corporation Core Processor Reserved [8086:2d13] (rev 02)
Subsystem: Hewlett-Packard Company Device [103c:143a]
Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
Status: Cap- 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0
00: 86 80 13 2d 06 00 00 00 02 00 00 06 00 00 80 00
10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
20: 00 00 00 00 00 00 00 00 00 00 00 00 3c 10 3a 14
30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

cat /proc/asound/card0/codec#0 output:

[color="#000000"][b]Codec: Realtek ID 270[/b][/color]
Address: [color="#FF0000"][b]0[/b][/color]
Function Id: 0x1
Vendor Id: [color="#FF0000"][b]0x10ec0270[/b][/color]
Subsystem Id: [color="#2E8B57"][b]0x103c143a[/b][/color]
Revision Id: 0x100100
No Modem Function Group found
Default PCM:
rates [0x560]: 44100 48000 96000 192000
bits [0xe]: 16 20 24
formats [0x1]: PCM
Default Amp-In caps: N/A
Default Amp-Out caps: N/A
GPIO: io=2, o=0, i=0, unsolicited=1, wake=0
IO[0]: enable=0, dir=0, wake=0, sticky=0, data=0, unsol=0
IO[1]: enable=0, dir=0, wake=0, sticky=0, data=0, unsol=0
Node 0x02 [Audio Output] wcaps 0x1d: Stereo Amp-Out
Amp-Out caps: ofs=0x57, nsteps=0x57, stepsize=0x02, mute=0
Amp-Out vals: [0x46 0x46]
Converter: stream=0, channel=0
PCM:
rates [0x560]: 44100 48000 96000 192000
bits [0xe]: 16 20 24
formats [0x1]: PCM
Node 0x03 [Audio Output] wcaps 0x1d: Stereo Amp-Out
Amp-Out caps: ofs=0x57, nsteps=0x57, stepsize=0x02, mute=0
Amp-Out vals: [0x57 0x57]
Converter: stream=0, channel=0
PCM:
rates [0x560]: 44100 48000 96000 192000
bits [0xe]: 16 20 24
formats [0x1]: PCM
Node 0x04 [Vendor Defined Widget] wcaps 0xf00000: Mono
Node 0x05 [Vendor Defined Widget] wcaps 0xf00000: Mono
Node 0x06 [Audio Output] wcaps 0x211: Stereo Digital
Converter: stream=0, channel=0
Digital:
Digital category: 0x0
PCM:
rates [0x5e0]: 44100 48000 88200 96000 192000
bits [0xe]: 16 20 24
formats [0x1]: PCM
Node 0x07 [Vendor Defined Widget] wcaps 0xf00000: Mono
Node 0x08 [Audio Input] wcaps 0x10011b: Stereo Amp-In
Amp-In caps: ofs=0x0b, nsteps=0x1f, stepsize=0x05, mute=1
Amp-In vals: [0x14 0x14]
Converter: stream=0, channel=0
SDI-Select: 0
PCM:
rates [0x560]: 44100 48000 96000 192000
bits [0xe]: 16 20 24
formats [0x1]: PCM
Connection: 1
0x23
Node 0x09 [Audio Input] wcaps 0x10011b: Stereo Amp-In
Amp-In caps: ofs=0x0b, nsteps=0x1f, stepsize=0x05, mute=1
Amp-In vals: [0x8b 0x8b]
Converter: stream=0, channel=0
SDI-Select: 0
PCM:
rates [0x560]: 44100 48000 96000 192000
bits [0xe]: 16 20 24
formats [0x1]: PCM
Connection: 1
0x22
Node 0x0a [Vendor Defined Widget] wcaps 0xf00000: Mono
Node 0x0b [Audio Mixer] wcaps 0x20010b: Stereo Amp-In
Amp-In caps: ofs=0x17, nsteps=0x1f, stepsize=0x05, mute=1
Amp-In vals: [0x97 0x97] [0x97 0x97] [0x97 0x97] [0x97 0x97] [0x97 0x97]
Connection: 5
0x18 0x19 0x1a 0x1b 0x1d
Node 0x0c [Audio Mixer] wcaps 0x20010b: Stereo Amp-In
Amp-In caps: ofs=0x00, nsteps=0x00, stepsize=0x00, mute=1
Amp-In vals: [0x00 0x00] [0x80 0x80]
Connection: 2
0x02 0x0b
Node 0x0d [Audio Mixer] wcaps 0x20010b: Stereo Amp-In
Amp-In caps: ofs=0x00, nsteps=0x00, stepsize=0x00, mute=1
Amp-In vals: [0x00 0x00] [0x80 0x80]
Connection: 2
0x03 0x0b
Node 0x0e [Vendor Defined Widget] wcaps 0xf00000: Mono
Node 0x0f [Audio Mixer] wcaps 0x20010a: Mono Amp-In
Amp-In caps: ofs=0x00, nsteps=0x00, stepsize=0x00, mute=1
Amp-In vals: [0x00] [0x80]
Connection: 2
0x02 0x0b
Node 0x10 [Vendor Defined Widget] wcaps 0xf00000: Mono
Node 0x11 [Vendor Defined Widget] wcaps 0xf00000: Mono
Node 0x12 [Pin Complex] wcaps 0x40000b: Stereo Amp-In
Amp-In caps: ofs=0x00, nsteps=0x03, stepsize=0x2f, mute=0
Amp-In vals: [0x00 0x00]
Pincap 0x00000020: IN
Pin Default 0x411111f0: [N/A] Speaker at Ext Rear
Conn = 1/8, Color = Black
DefAssociation = 0xf, Sequence = 0x0
Misc = NO_PRESENCE
Pin-ctls: 0x00:
Node 0x13 [Vendor Defined Widget] wcaps 0xf00000: Mono
Node 0x14 [Pin Complex] wcaps 0x40018d: Stereo Amp-Out
Amp-Out caps: ofs=0x00, nsteps=0x00, stepsize=0x00, mute=1
Amp-Out vals: [0x00 0x00]
Pincap 0x00010014: OUT EAPD Detect
EAPD 0x0:
Pin Default 0x99130110: [Fixed] Speaker at Int ATAPI
Conn = ATAPI, Color = Unknown
DefAssociation = 0x1, Sequence = 0x0
Misc = NO_PRESENCE
Pin-ctls: 0x40: OUT
Unsolicited: tag=00, enabled=0
Connection: 2
0x0c* 0x0d
Node 0x15 [Vendor Defined Widget] wcaps 0xf00000: Mono
Node 0x16 [Vendor Defined Widget] wcaps 0xf00000: Mono
Node 0x17 [Pin Complex] wcaps 0x40010c: Mono Amp-Out
Amp-Out caps: ofs=0x00, nsteps=0x00, stepsize=0x00, mute=1
Amp-Out vals: [0x80]
Pincap 0x00000010: OUT
Pin Default 0x411111f0: [N/A] Speaker at Ext Rear
Conn = 1/8, Color = Black
DefAssociation = 0xf, Sequence = 0x0
Misc = NO_PRESENCE
Pin-ctls: 0x00:
Connection: 1
0x0f
Node 0x18 [Pin Complex] wcaps 0x40018f: Stereo Amp-In Amp-Out
Amp-In caps: ofs=0x00, nsteps=0x03, stepsize=0x2f, mute=0
Amp-In vals: [0x03 0x03]
Amp-Out caps: ofs=0x00, nsteps=0x00, stepsize=0x00, mute=1
Amp-Out vals: [0x80 0x80]
Pincap 0x00001734: IN OUT Detect
Vref caps: HIZ 50 GRD 80
Pin Default 0x03a11820: [Jack] Mic at Ext Left
Conn = 1/8, Color = Black
DefAssociation = 0x2, Sequence = 0x0
Pin-ctls: 0x24: IN VREF_80
Unsolicited: tag=00, enabled=0
Connection: 1
0x0d
Node 0x19 [Pin Complex] wcaps 0x40008b: Stereo Amp-In
Amp-In caps: ofs=0x00, nsteps=0x03, stepsize=0x2f, mute=0
Amp-In vals: [0x00 0x00]
Pincap 0x00001724: IN Detect
Vref caps: HIZ 50 GRD 80
Pin Default 0x99a3092f: [Fixed] Mic at Int ATAPI
Conn = ATAPI, Color = Unknown
DefAssociation = 0x2, Sequence = 0xf
Misc = NO_PRESENCE
Pin-ctls: 0x20: IN VREF_HIZ
Unsolicited: tag=00, enabled=0
Node 0x1a [Pin Complex] wcaps 0x40018f: Stereo Amp-In Amp-Out
Amp-In caps: ofs=0x00, nsteps=0x03, stepsize=0x2f, mute=0
Amp-In vals: [0x00 0x00]
Amp-Out caps: ofs=0x00, nsteps=0x00, stepsize=0x00, mute=1
Amp-Out vals: [0x80 0x80]
Pincap 0x0000003c: IN OUT HP Detect
Pin Default 0x411111f0: [N/A] Speaker at Ext Rear
Conn = 1/8, Color = Black
DefAssociation = 0xf, Sequence = 0x0
Misc = NO_PRESENCE
Pin-ctls: 0x20: IN
Unsolicited: tag=00, enabled=0
Connection: 2
0x0c* 0x0d
Node 0x1b [Pin Complex] wcaps 0x40018f: Stereo Amp-In Amp-Out
Amp-In caps: ofs=0x00, nsteps=0x03, stepsize=0x2f, mute=0
Amp-In vals: [0x00 0x00]
Amp-Out caps: ofs=0x00, nsteps=0x00, stepsize=0x00, mute=1
Amp-Out vals: [0x80 0x80]
Pincap 0x00000034: IN OUT Detect
Pin Default 0x411111f0: [N/A] Speaker at Ext Rear
Conn = 1/8, Color = Black
DefAssociation = 0xf, Sequence = 0x0
Misc = NO_PRESENCE
Pin-ctls: 0x20: IN
Unsolicited: tag=00, enabled=0
Connection: 2
0x0c* 0x0d
Node 0x1c [Vendor Defined Widget] wcaps 0xf00000: Mono
Node 0x1d [Pin Complex] wcaps 0x400000: Mono
Pincap 0x00000020: IN
Pin Default 0x40179a2d: [N/A] Speaker at Ext N/A
Conn = Analog, Color = Pink
DefAssociation = 0x2, Sequence = 0xd
Pin-ctls: 0x20: IN
Node 0x1e [Pin Complex] wcaps 0x400381: Stereo Digital
Pincap 0x00000014: OUT Detect
Pin Default 0x411111f0: [N/A] Speaker at Ext Rear
Conn = 1/8, Color = Black
DefAssociation = 0xf, Sequence = 0x0
Misc = NO_PRESENCE
Pin-ctls: 0x40: OUT
Unsolicited: tag=00, enabled=0
Connection: 1
0x06
Node 0x1f [Vendor Defined Widget] wcaps 0xf00000: Mono
Node 0x20 [Vendor Defined Widget] wcaps 0xf00040: Mono
Processing caps: benign=0, ncoeff=25
Node 0x21 [Pin Complex] wcaps 0x40018d: Stereo Amp-Out
Amp-Out caps: ofs=0x00, nsteps=0x00, stepsize=0x00, mute=1
Amp-Out vals: [0x00 0x00]
Pincap 0x0000001c: OUT HP Detect
Pin Default 0x0321101f: [Jack] HP Out at Ext Left
Conn = 1/8, Color = Black
DefAssociation = 0x1, Sequence = 0xf
Pin-ctls: 0xc0: OUT HP
Unsolicited: tag=00, enabled=0
Connection: 2
0x0c* 0x0d
Node 0x22 [Audio Selector] wcaps 0x30010b: Stereo Amp-In
Amp-In caps: N/A
Amp-In vals: [0x00 0x00] [0x00 0x00] [0x00 0x00] [0x00 0x00] [0x00 0x00] [0x00 0x00] [0x00 0x00]
Connection: 7
0x18* 0x19 0x1a 0x1b 0x1d 0x0b 0x12
Node 0x23 [Audio Mixer] wcaps 0x20010b: Stereo Amp-In
Amp-In caps: ofs=0x00, nsteps=0x00, stepsize=0x00, mute=1
Amp-In vals: [0x00 0x00] [0x80 0x80] [0x80 0x80] [0x80 0x80] [0x80 0x80] [0x80 0x80]
Connection: 6
0x18 0x19 0x1a 0x1b 0x1d 0x0b

cat /proc/asound/card1/codec#1 output:

[color="#000000"][b]Codec: ATI R6xx HDMI[/b][/color]
Address: [color="#FF0000"][b]0[/b][/color]
Function Id: 0x1
Vendor Id: [color="#FF0000"][b]0x1002aa01[/b][/color]
Subsystem Id: [color="#2E8B57"][b]0x00aa0100[/b][/color]
Revision Id: 0x100200
No Modem Function Group found
Default PCM:
rates [0x70]: 32000 44100 48000
bits [0x2]: 16
formats [0x1]: PCM
Default Amp-In caps: N/A
Default Amp-Out caps: N/A
GPIO: io=0, o=0, i=0, unsolicited=0, wake=0
Node 0x02 [Audio Output] wcaps 0x201: Stereo Digital
Converter: stream=0, channel=0
Digital:
Digital category: 0x0
Node 0x03 [Pin Complex] wcaps 0x400381: Stereo Digital
Pincap 0x00000094: OUT Detect HDMI
Pin Default 0x18560010: [Jack] Digital Out at Int HDMI
Conn = Digital, Color = Unknown
DefAssociation = 0x1, Sequence = 0x0
Pin-ctls: 0x40: OUT
Unsolicited: tag=00, enabled=0
Connection: 1
0x02

dmidecode output:

# dmidecode 2.9
SMBIOS 2.6 present.
33 structures occupying 1401 bytes.
Table at 0x000EA650.

Handle 0x0000, DMI type 0, 24 bytes
BIOS Information
Vendor: Hewlett-Packard
Version: F.0B                 
Release Date: 06/28/2010
ROM Size: 2048 kB
Characteristics:
	PCI is supported
	BIOS is upgradeable
	BIOS shadowing is allowed
	Boot from CD is supported
	Selectable boot is supported
	EDD is supported
	Japanese floppy for NEC 9800 1.2 MB is supported (int 13h)
	Japanese floppy for Toshiba 1.2 MB is supported (int 13h)
	5.25"/360 KB floppy services are supported (int 13h)
	5.25"/1.2 MB floppy services are supported (int 13h)
	3.5"/720 KB floppy services are supported (int 13h)
	3.5"/2.88 MB floppy services are supported (int 13h)
	8042 keyboard services are supported (int 9h)
	CGA/mono video services are supported (int 10h)
	ACPI is supported
	USB legacy is supported
	BIOS boot specification is supported
	Targeted content distribution is supported
BIOS Revision: 15.18
Firmware Revision: 60.34

Handle 0x0001, DMI type 1, 27 bytes
System Information
Manufacturer: Hewlett-Packard
Product Name: HP G72 Notebook PC              
Version: 0497100000252710001020000
Serial Number: REMOVED
UUID: REMOVED
Wake-up Type: Power Switch
SKU Number: WU870EA#ABH
Family: 103C_5335KV

Handle 0x0002, DMI type 2, 16 bytes
Base Board Information
Manufacturer: Hewlett-Packard
Product Name: 143A
Version: 60.22
Serial Number: REMOVED
Asset Tag: Base Board Asset Tag
Features:
	Board is a hosting board
	Board is replaceable
Location In Chassis: Base Board Chassis Location
Chassis Handle: 0x0003
Type: Motherboard
Contained Object Handles: 0

Handle 0x0003, DMI type 3, 22 bytes
Chassis Information
Manufacturer: Hewlett-Packard
Type: Notebook
Lock: Not Present
Version: Chassis Version
Serial Number: Chassis Serial Number
Asset Tag: Chassis Asset Tag
Boot-up State: Safe
Power Supply State: Safe
Thermal State: Safe
Security Status: None
OEM Information: 0x00000127
Height: Unspecified
Number Of Power Cords: 1
Contained Elements: 0

Handle 0x0004, DMI type 9, 17 bytes
System Slot Information
Designation: J5C1
Type: x16 <OUT OF SPEC>
Current Usage: Available
Length: Other
Characteristics:
	PME signal is supported
	Hot-plug devices are supported

Handle 0x0005, DMI type 9, 17 bytes
System Slot Information
Designation: J6C1
Type: x1 <OUT OF SPEC>
Current Usage: Available
Length: Other
Characteristics:
	PME signal is supported
	Hot-plug devices are supported

Handle 0x0006, DMI type 9, 17 bytes
System Slot Information
Designation: J6C2
Type: x1 <OUT OF SPEC>
Current Usage: Available
Length: Other
Characteristics:
	PME signal is supported
	Hot-plug devices are supported

Handle 0x0007, DMI type 9, 17 bytes
System Slot Information
Designation: J6D2
Type: x1 <OUT OF SPEC>
Current Usage: Available
Length: Other
Characteristics:
	PME signal is supported
	Hot-plug devices are supported

Handle 0x0008, DMI type 9, 17 bytes
System Slot Information
Designation: J7C1
Type: x1 <OUT OF SPEC>
Current Usage: Available
Length: Other
Characteristics:
	PME signal is supported
	Hot-plug devices are supported

Handle 0x0009, DMI type 9, 17 bytes
System Slot Information
Designation: J7D2
Type: x1 <OUT OF SPEC>
Current Usage: Available
Length: Other
Characteristics:
	PME signal is supported
	Hot-plug devices are supported

Handle 0x000A, DMI type 9, 17 bytes
System Slot Information
Designation: J8C2
Type: x16 <OUT OF SPEC>
Current Usage: Available
Length: Other
Characteristics:
	PME signal is supported
	Hot-plug devices are supported

Handle 0x000B, DMI type 9, 17 bytes
System Slot Information
Designation: J8C1
Type: x1 <OUT OF SPEC>
Current Usage: Available
Length: Other
Characteristics:
	PME signal is supported
	Hot-plug devices are supported

Handle 0x000C, DMI type 11, 5 bytes
OEM Strings
String 1: $HP$
String 2: LOC#ABH
String 3: ABS 70/71 79 7A 7B 7C
String 4: CNB1 0497100000252710001020000

Handle 0x000D, DMI type 21, 7 bytes
Built-in Pointing Device
Type: Touch Pad
Interface: PS/2
Buttons: 4

Handle 0x000E, DMI type 22, 26 bytes
Portable Battery
Location: In the back
Manufacturer: 11-85
Name: MU06047
Design Capacity: 47000 mWh
Design Voltage: 10800 mV
SBDS Version: 1.0
Maximum Error: 0%
SBDS Serial Number: 68BE
SBDS Manufacture Date: 2010-06-09
SBDS Chemistry: Li-ion
OEM-specific Information: 0x0000FFFF

Handle 0x000F, DMI type 32, 20 bytes
System Boot Information
Status: No errors detected

Handle 0x0010, DMI type 41, 11 bytes
Unknown Type
Header and Data:
	29 0B 10 00 01 03 00 01 00 7F FF
Strings:
	Video Graphics Controller

Handle 0x0011, DMI type 41, 11 bytes
Unknown Type
Header and Data:
	29 0B 11 00 01 05 00 01 00 7F FF
Strings:
	Realtek Lan Controller

Handle 0x0012, DMI type 16, 15 bytes
Physical Memory Array
Location: System Board Or Motherboard
Use: System Memory
Error Correction Type: None
Maximum Capacity: 8 GB
Error Information Handle: No Error
Number Of Devices: 2

Handle 0x0013, DMI type 17, 28 bytes
Memory Device
Array Handle: 0x0012
Error Information Handle: 0x0014
Total Width: 64 bits
Data Width: 64 bits
Size: 2048 MB
Form Factor: SODIMM
Set: None
Locator: DIMM0
Bank Locator: BANK 0
Type: <OUT OF SPEC>
Type Detail: Synchronous
Speed: 1067 MHz (0.9 ns)
Manufacturer: Ramaxel
Serial Number: REMOVED
Asset Tag: Unknown
Part Number: RMT1970ED48E8F1333

Handle 0x0014, DMI type 18, 23 bytes
32-bit Memory Error Information
Type: OK
Granularity: Unknown
Operation: Unknown
Vendor Syndrome: Unknown
Memory Array Address: Unknown
Device Address: Unknown
Resolution: Unknown

Handle 0x0015, DMI type 20, 19 bytes
Memory Device Mapped Address
Starting Address: 0x00000000000
Ending Address: 0x0007FFFFFFF
Range Size: 2 GB
Physical Device Handle: 0x0013
Memory Array Mapped Address Handle: 0x001A
Partition Row Position: 2
Interleave Position: 1
Interleaved Data Depth: 1

Handle 0x0016, DMI type 17, 28 bytes
Memory Device
Array Handle: 0x0012
Error Information Handle: 0x0017
Total Width: 64 bits
Data Width: 64 bits
Size: 2048 MB
Form Factor: SODIMM
Set: None
Locator: DIMM1
Bank Locator: BANK 2
Type: <OUT OF SPEC>
Type Detail: Synchronous
Speed: 1067 MHz (0.9 ns)
Manufacturer: Ramaxel
Serial Number: REMOVED
Asset Tag: Unknown
Part Number: RMT1970ED48E8F1333

Handle 0x0017, DMI type 18, 23 bytes
32-bit Memory Error Information
Type: OK
Granularity: Unknown
Operation: Unknown
Vendor Syndrome: Unknown
Memory Array Address: Unknown
Device Address: Unknown
Resolution: Unknown

Handle 0x0018, DMI type 20, 19 bytes
Memory Device Mapped Address
Starting Address: 0x00000000000
Ending Address: 0x0007FFFFFFF
Range Size: 2 GB
Physical Device Handle: 0x0016
Memory Array Mapped Address Handle: 0x001A
Partition Row Position: 2
Interleave Position: 2
Interleaved Data Depth: 1

Handle 0x0019, DMI type 18, 23 bytes
32-bit Memory Error Information
Type: OK
Granularity: Unknown
Operation: Unknown
Vendor Syndrome: Unknown
Memory Array Address: Unknown
Device Address: Unknown
Resolution: Unknown

Handle 0x001A, DMI type 19, 15 bytes
Memory Array Mapped Address
Starting Address: 0x00000000000
Ending Address: 0x000FFFFFFFF
Range Size: 4 GB
Physical Array Handle: 0x0012
Partition Width: 0

Handle 0x001B, DMI type 4, 42 bytes
Processor Information
Socket Designation: CPU
Type: Central Processor
Family: <OUT OF SPEC>
Manufacturer: Intel® Corporation
ID: 52 06 02 00 FF FB EB BF
Version: Intel® Core(tm) i3 CPU       M 350  @ 2.27GHz
Voltage: 0.0 V
External Clock: 1066 MHz
Max Speed: 2266 MHz
Current Speed: 2272 MHz
Status: Populated, Enabled
Upgrade: ZIF Socket
L1 Cache Handle: 0x001F
L2 Cache Handle: 0x001E
L3 Cache Handle: 0x001C
Serial Number: Not Specified
Asset Tag: FFFF
Part Number: Not Specified
Core Count: 2
Core Enabled: 2
Thread Count: 4
Characteristics:
	64-bit capable

Handle 0x001C, DMI type 7, 19 bytes
Cache Information
Socket Designation: L3 Cache
Configuration: Enabled, Not Socketed, Level 3
Operational Mode: Write Through
Location: Internal
Installed Size: 3072 KB
Maximum Size: 3072 KB
Supported SRAM Types:
	Synchronous
Installed SRAM Type: Synchronous
Speed: Unknown
Error Correction Type: Single-bit ECC
System Type: Unified
Associativity: Other

Handle 0x001D, DMI type 7, 19 bytes
Cache Information
Socket Designation: L1 Cache
Configuration: Enabled, Not Socketed, Level 1
Operational Mode: Write Through
Location: Internal
Installed Size: 32 KB
Maximum Size: 32 KB
Supported SRAM Types:
	Synchronous
Installed SRAM Type: Synchronous
Speed: Unknown
Error Correction Type: Single-bit ECC
System Type: Data
Associativity: 8-way Set-associative

Handle 0x001E, DMI type 7, 19 bytes
Cache Information
Socket Designation: L2 Cache
Configuration: Enabled, Not Socketed, Level 2
Operational Mode: Write Through
Location: Internal
Installed Size: 256 KB
Maximum Size: 256 KB
Supported SRAM Types:
	Synchronous
Installed SRAM Type: Synchronous
Speed: Unknown
Error Correction Type: Single-bit ECC
System Type: Unified
Associativity: 8-way Set-associative

Handle 0x001F, DMI type 7, 19 bytes
Cache Information
Socket Designation: L1 Cache
Configuration: Enabled, Not Socketed, Level 1
Operational Mode: Write Through
Location: Internal
Installed Size: 32 KB
Maximum Size: 32 KB
Supported SRAM Types:
	Synchronous
Installed SRAM Type: Synchronous
Speed: Unknown
Error Correction Type: Single-bit ECC
System Type: Instruction
Associativity: 4-way Set-associative

Handle 0x0020, DMI type 127, 4 bytes
End Of Table

 

[/size]Supported Video Modes:

I skimmed through the HP's VGA BIOS (0046.035C.C000.vga.rom) and found the following info with HexEdit. These are what I believe to be the (17) native / supported video modes of the Intel HD Graphics. Which I think can be used to change the native video mode (inspired by this post).

 

The black values are the index at which point the data can be found:

[b]1502[/b] : [color="#0000FF"]80 02 e0 01[/color] = [color="#2E8B57"][b]640 * 480[/b][/color]
[color="#0000FF"]80 02 E0 01[/color] 80 11 0E 00 00 03 00 00 08 72 0C 00 D0 07 58 02 0C 72 0C 00 D0 07 F4 01 10 72 0C 00 05 
0F 27 00 FF FF D6 09 80 90 20 E0 1D 10 08 60 22 00 00 00 00 00 00 1E 36 7F 01 00 01 00 00 00 00 0C 

[b]1544[/b] : [color="#0000FF"]20 03 58 02[/color] = [color="#2E8B57"][b]800 * 600[/b][/color]
[color="#0000FF"]20 03 58 02[/color] 80 11 0E 00 00 03 00 00 08 72 0C 00 D0 07 58 02 0C 72 0C 00 D0 07 F4 01 10 72 0C 00 05 
0F 27 00 FF FF A0 0F 20 00 31 58 1C 20 28 80 14 00 00 00 00 00 00 1E 36 7F 02 00 02 00 00 00 00 0C 

[b]1586[/b] : [color="#0000FF"]40 06 84 03[/color] = [color="#2E8B57"][b]1600 * 900[/b][/color]
[color="#0000FF"]40 06 84 03[/color] 80 11 0E 00 3C 03 30 00 08 72 0C 00 D0 07 58 02 0C 72 0C 00 D0 07 F4 01 10 72 0C 00 05 
0F 27 00 FF FF 1C 2A 40 72 61 84 0C 30 30 20 36 00 7E D6 10 00 00 18 06 AF 9E 03 00 00 00 00 01 13 

[b]15c8[/b] : [color="#0000FF"]00 05 00 04[/color] = [color="#2E8B57"][b]1280 * 1024[/b][/color]
[color="#0000FF"]00 05 00 04[/color] 80 11 0E 00 3C 03 00 00 08 72 0C 00 D0 07 58 02 0C 72 0C 00 D0 07 F4 01 10 72 0C 00 05 
0F 27 00 FF FF 30 2A 00 98 51 00 30 40 30 70 13 00 00 00 00 00 00 1E 36 7F 05 00 04 00 00 00 00 0C 

[b]160a[/b] : [color="#0000FF"]78 05 1a 04[/color] = [color="#2E8B57"][b]1400 * 1050[/b][/color]
[color="#0000FF"]78 05 1A 04[/color] 80 11 0E 00 3C 03 00 00 08 72 0C 00 D0 07 58 02 0C 72 0C 00 D0 07 F4 01 10 72 0C 00 05 
0F 27 00 FF FF 30 2A 78 20 51 1A 10 40 10 70 13 00 00 00 00 00 00 1E 36 7F 01 90 05 00 00 00 00 0C 

[b]164e[/b] : [color="#0000FF"]78 05 1a 04[/color] = [color="#2E8B57"][b]1400 * 1050[/b][/color]
[color="#0000FF"]78 05 1A 04[/color] 80 11 0E 00 3C 03 00 00 08 72 0C 00 D0 07 58 02 0C 72 0C 00 D0 07 F4 01 10 72 0C 00 05 
0F 27 00 FF FF A8 2F 78 E0 51 1A 26 40 58 98 13 00 00 00 00 00 00 1E 36 7F 01 90 06 00 00 00 00 0C 

[b]164c[/b] : [color="#0000FF"]78 05 1a 04[/color] = [color="#2E8B57"][b]1400 * 1050[/b][/color]
[color="#0000FF"]78 05 1A 04[/color] 80 11 0E 00 3C 03 00 00 08 72 0C 00 D0 07 58 02 0C 72 0C 00 D0 07 F4 01 10 72 0C 00 05 
0F 27 00 FF FF A8 2F 78 E0 51 1A 26 40 58 98 13 00 00 00 00 00 00 1E 36 7F 01 90 06 00 00 00 00 0C 

[b]168e[/b] : [color="#0000FF"]40 06 b0 04[/color] = [color="#2E8B57"][b]1600 * 1200[/b][/color]
[color="#0000FF"]40 06 B0 04[/color] 80 11 0E 00 3C 03 00 00 08 72 0C 00 D0 07 58 02 0C 72 0C 00 D0 07 F4 01 10 72 0C 00 05 
0F 27 00 FF FF 48 3F 40 30 62 B0 32 40 40 C0 13 00 00 00 00 00 00 1E 36 7F 06 00 07 00 00 00 00 0C 

[b]16d0[/b] : [color="#0000FF"]56 05 00 03[/color] = [color="#2E8B57"][b]1366 * 768[/b][/color]
[color="#0000FF"]56 05 00 03[/color] 80 11 0E 00 00 03 00 00 08 72 0C 00 D0 07 58 02 0C 72 0C 00 D0 07 F4 01 10 72 0C 00 05 
0F 27 00 FF FF 66 21 56 AA 51 00 1E 30 46 90 14 00 00 00 00 00 00 18 36 7F 03 90 08 00 00 00 00 01 

[b]1712[/b] : [color="#0000FF"]90 06 1a 04[/color] = [color="#2E8B57"][b]1680 * 1050[/b][/color]
[color="#0000FF"]90 06 1A 04[/color] 80 11 0E 00 3C 03 00 00 08 72 0C 00 D0 07 58 02 0C 72 0C 00 D0 07 F4 01 10 72 0C 00 05 
0F 27 00 FF FF 7C 2E 90 A0 60 1A 1E 40 30 20 36 00 00 00 00 00 00 1E 36 7F 04 90 09 00 00 00 00 0C 

[b]1754[/b] : [color="#0000FF"]80 07 b0 04[/color] = [color="#2E8B57"][b]1920 * 1200[/b][/color]
[color="#0000FF"]80 07 B0 04[/color] 80 11 0E 00 3C 03 00 00 08 72 0C 00 D0 07 58 02 0C 72 0C 00 D0 07 F4 01 10 72 0C 00 05 
0F 27 00 FF FF 28 3C 80 A0 70 B0 23 40 30 20 2A 00 00 00 00 00 00 1E 36 7F 05 90 0A 00 00 00 00 0C 

[b]1796[/b] : [color="#0000FF"]a0 05 84 03[/color] = [color="#2E8B57"][b]1440 * 900[/b][/color]
[color="#0000FF"]A0 05 84 03[/color] 80 11 0E 00 00 03 00 00 08 72 0C 00 D0 07 58 02 0C 72 0C 00 D0 07 F4 01 10 72 0C 00 05 
0F 27 00 FF FF 9A 29 A0 D0 51 84 22 30 50 99 17 00 00 00 00 00 00 1E 36 7F 03 00 0B 00 00 00 00 0C 

[b]17d8[/b] : [color="#0000FF"]40 06 84 03[/color] = [color="#2E8B57"][b]1600 * 900[/b][/color]
[color="#0000FF"]40 06 84 03[/color] 80 11 0E 00 00 03 00 00 08 72 0C 00 D0 07 58 02 0C 72 0C 00 D0 07 F4 01 10 72 0C 00 05 
0F 27 00 FF FF 30 2A 40 C8 60 84 64 30 18 51 04 00 00 00 00 00 00 1E 36 7F 03 00 0C 00 00 00 00 0C 

[b]181a[/b] : [color="#0000FF"]04 00 00 03[/color] = [color="#2E8B57"][b]1024 * 768[/b][/color]
[color="#0000FF"]00 04 00 03[/color] 80 11 0E 00 00 03 00 00 08 72 0C 00 D0 07 58 02 0C 72 0C 00 D0 07 F4 01 10 72 0C 00 05 
0F 27 00 FF FF 64 19 00 40 41 00 26 30 18 88 36 00 00 00 00 00 00 1E 36 7F 03 00 0D 00 00 00 00 0C 

[b]185c[/b] : [color="#0000FF"]05 00 20 03[/color] = [color="#2E8B57"][b]1280 * 800[/b][/color]
[color="#0000FF"]00 05 20 03[/color] 80 11 0E 00 00 03 00 00 08 72 0C 00 D0 07 58 02 0C 72 0C 00 D0 07 F4 01 10 72 0C 00 05 
0F 27 00 FF FF EA 1A 00 A0 50 20 17 30 0C 30 43 00 00 00 00 00 00 1E 36 7F 03 90 0E 00 00 00 00 0C 

[b]189e[/b] : [color="#0000FF"]80 07 38 04[/color] = [color="#2E8B57"][b]1920 * 1080[/b][/color]
[color="#0000FF"]80 07 38 04[/color] 80 11 0E 00 00 03 00 00 08 72 0C 00 D0 07 58 02 0C 72 0C 00 D0 07 F4 01 10 72 0C 00 05 
0F 27 00 FF FF 02 3A 80 18 71 38 2D 40 58 2D 36 00 00 00 00 00 00 1E 36 7F 03 00 0F 00 00 00 00 0C 

[b]18e0[/b] : [color="#0000FF"]00 08 00 06[/color] = [color="#2E8B57"][b]2048 * 1536[/b][/color]
[color="#0000FF"]00 08 00 06[/color] 80 11 0E 00 3C 03 00 00 08 72 0C 00 D0 07 58 02 0C 72 0C 00 D0 07 F4 01 10 72 0C 00 05 
0F 27 00 FF FF 29 40 00 60 80 00 13 60 10 10 11 00 00 00 00 00 00 1E 36 7F 03 00 10 00 00 00 00 0C 

The supported video modes may change over time, or be completely different in your BIOS, but I think that people get the idea of what I did. I simply search for "80 11 0E 00" (after I found out what to look for) and this is what I got.

 

VESA Modes:

Revolution (the boot loader I am using) reports the following VESA modes in the VGA BIOS:

 

257 (0x0101) 640 x 480 x 8

259 (0x0103) 800 x 600 x 8

261 (0x0105) 1024 x 768 x 8

263 (0x0107) 1280 x 1024 x 8

273 (0x0111) 640 x 480 x 16

274 (0x0112) 640 x 480 x 32

276 (0x0114) 800 x 600 x 16

277 (0x0115) 800 x 600 x 32

279 (0x0117) 1024 x 768 x 16

280 (0x0118) 1024 x 768 x 32

282 (0x011a) 1280 x 1024 x 16

283 (0x011b) 1280 x 1024 x 32

314 (0x013a) 1600 x 1200 x 8

331 (0x014b) 1600 x 1200 x 16

346 (0x015a) 1600 x 1200 x 32

 

The red onces here clearly exceed the LCD panel specification. And I also found the following data in the VGA ROM, just in front of the VESA modes reported above:

60 01 61 01 62 01 63 01 64 01 65 01 66 01 67 01 68 01 69 01 6A 01 6B 01 6C 01 6D 01 6E 01 6F 01 70 01 71 01 3C 01 4D 01 5C 01

I need to have a second look at a later time, and report back when I found out if this is correct or not.

 

Files :

To be added... I also made a codec graph which I will attach soon. Hopefully tonight already.

 

Continue reading after the break...

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AUDIO patching

 

Both System Profiler and System Preferences (Sound: Output/Input panes) are empty after installation of OX S 10.6.4 and thus there was work to be done. I started by reading this which basically told me to make codec dumps. Which I did (see: 'Collected Information' in the previous post).

 

There's also a second thread, which I've also read. Not everything was clear to me, but this is what I am looking at right now:

9g72sh8vlw033hbduh3f.png

 

That I must admit was a bit of a surprise. No. I sure wasn't expecting anything to happen. I mean the only thing I really did was basically to add two missing properties in my DSDT. Here's how I did it.

 

Let's start by looking at the factory Device (HDEF) from my notebook's DSDT:

            Device (HDEF)
           {
               Name (_ADR, 0x001B0000)
               OperationRegion (HDAR, PCI_Config, 0x4C, 0x10)
               Field (HDAR, WordAcc, NoLock, Preserve)
               {
                   DCKA,   1, 
                           Offset (0x01), 
                   DCKM,   1, 
                       ,   6, 
                   DCKS,   1, 
                           Offset (0x08), 
                       ,   15, 
                   PMES,   1
               }

               Method (_PRW, 0, NotSerialized)
               {
                   If (WKMD)
                   {
                       Return (Package (0x02)
                       {
                           0x0D, 
                           0x04
                       })
                   }
                   Else
                   {
                       Return (Package (0x02)
                       {
                           0x0D, 
                           Zero
                       })
                   }
               }
           }

And here's the one from a MacBookPro6,1:

            Device (HDEF)
           {
               Name (_ADR, 0x001B0000)
               OperationRegion (HDAR, PCI_Config, 0x00, 0x60)
               Field (HDAR, WordAcc, NoLock, Preserve)
               {
                   VID0,   16, 
                   DID0,   16, 
                           Offset (0x4C), 
                   DCKA,   1, 
                           Offset (0x4D), 
                   DCKM,   1, 
                       ,   6, 
                   DCKS,   1, 
                           Offset (0x54), 
                       ,   15, 
                   PMES,   1
               }

               Method (_DSM, 4, NotSerialized)
               {
                   If (LEqual (Arg0, Buffer (0x10)
                           {
                               /* 0000 */    0xC6, 0xB7, 0xB5, 0xA0, 0x18, 0x13, 0x1C, 0x44, 
                               /* 0008 */    0xB0, 0xC9, 0xFE, 0x69, 0x5E, 0xAF, 0x94, 0x9B
                           }))
                   {
                       If (LNotEqual (And (VID0, 0xFFFF), 0xFFFF))
                       {
                           Store (Package (0x02)
                               {
                                   "hda-gfx", 
                                   Buffer (0x0A)
                                   {
                                       "onboard-1"
                                   }
                               }, Local0)
                           DTGP (Arg0, Arg1, Arg2, Arg3, RefOf (Local0))
                           Return (Local0)
                       }
                   }

                   Return (0x80000002)
               }

               Name (_PRW, Package (0x02)
               {
                   0x09, 
                   0x04
               })
           }

I figured what the heck and thus I started copying stuff. Combining things. Making a new one out of the two:

            Device (HDEF)
           {
               Name (_ADR, 0x001B0000)
               Name (_PRW, Package (0x02)
               {
                   0x09, 
                   0x04
               })
               OperationRegion (HDAR, PCI_Config, [color="#0000FF"]0x00[/color], 0x60)
               Field (HDAR, WordAcc, NoLock, Preserve)
               {
                   [color="#0000FF"]VID0,   16, 
                   DID0,   16, 
                           Offset (0x4C), [/color]
                   DCKA,   1, 
                           Offset ([color="#0000FF"]0x4D[/color]), 
                   DCKM,   1, 
                       ,   6, 
                   DCKS,   1, 
                           Offset ([color="#0000FF"]0x54[/color]), 
                       ,   15, 
                   PMES,   1
               }

               [color="#0000FF"]Method (_DSM, 4, NotSerialized)
               {
                   If (LEqual (Arg0, Buffer (0x10)
                           {
                               /* 0000 */    0xC6, 0xB7, 0xB5, 0xA0, 0x18, 0x13, 0x1C, 0x44, 
                               /* 0008 */    0xB0, 0xC9, 0xFE, 0x69, 0x5E, 0xAF, 0x94, 0x9B
                           }))
                   {
                       If (LNotEqual (And (VID0, 0xFFFF), 0xFFFF))
                       {
                           Store (Package ([color="#2E8B57"]0x06[/color])
                               {
                                   [color="#2E8B57"]"PinConfigurations",
                                   Buffer (One)
                                   {
                                       0x00
                                   },

                                   "layout-id",
                                   Unicode ("Q"),[/color]

                                   "hda-gfx", 
                                   Buffer (0x0A)
                                   {
                                       "onboard-1"
                                   }
                               }, Local0)
                           [color="#2E8B57"]MCDP (Arg2, RefOf (Local0))[/color]
                           Return (Local0)
                       }
                   }
                   Return (0x80000002)
               }[/color]
           }

Notes: All changes are marked with two separate colors, being blue and green. This to make it easier for you to spot the differences. Green is used for my changes, compared to the MacBookPro6,1 lines. Like the call to method MCDP which FYI was written by Master Chief. Not mine. I just copied it.

 

Method _DSM is called twice (see P5K PRO thread) and that is why there are two if (...) clauses. To let it set the device properties in a controlled manner.

 

Then I fired up IORegistryExplorer and check the PinConfigurations property, to find out that my 0x00 was replaced with:

<f0 11 11 41 10 01 13 99 f0 11 11 41 20 18 a1 03 2f 09 a3 99 f0 11 11 41 f0 11 11 41 2d 9a 17 40 f0 11 11 41 1f 10 21 03>

I didn't pay much attention to it. Not at this time, but that changed later on...

 

Hey. Not that audio worked already. Of course not. This all is just cosmetic. The Sound pref pane under System Preferences is still empty. No wonder since this is where the hard work starts. Especially for people with unsupported hardware. Anyway. We have our codec dumps and codec graph (available in post #2) and thus we now can continue with getting the required ConfigData, by following the two guides I linked to at the top of this post.

 

And before you jump in deep. Like I did. There's a more convenient way of getting this data. It's a simple script called Verbit written by Signal64. please note that you'll have to remove the check, at the top, or it will error out. And here's mine:

Verbs from Linux Codec Dump File: codec_dump.txt

Codec: Realtek ID 270   Address: 0   DevID: 283902576 (0x10ec0270)

  Jack   Color  Description                  Node     PinDefault             Original Verbs
--------------------------------------------------------------------------------------------------------
   1/8   Black  Speaker at Ext Rear         18 0x12   0x411111f0   01271cf0 01271d11 01271e11 01271f41
 ATAPI Unknown  Speaker at Int ATAPI        20 0x14   0x99130110   01471c10 01471d01 01471e13 01471f99
   1/8   Black  Speaker at Ext Rear         23 0x17   0x411111f0   01771cf0 01771d11 01771e11 01771f41
   1/8   Black  Mic at Ext Left                0x18   0x03a11820   01871c20 01871d18 01871ea1 01871f03                              
 ATAPI Unknown  Mic at Int ATAPI            25 0x19   0x99a3092f   01971c2f 01971d09 01971ea3 01971f99
   1/8   Black  Speaker at Ext Rear         26 0x1a   0x411111f0   01a71cf0 01a71d11 01a71e11 01a71f41
   1/8   Black  Speaker at Ext Rear         27 0x1b   0x411111f0   01b71cf0 01b71d11 01b71e11 01b71f41
Analog    Pink  Speaker at Ext N/A          29 0x1d   0x40179a2d   01d71c2d 01d71d9a 01d71e17 01d71f40
   1/8   Black  Speaker at Ext Rear         30 0x1e   0x411111f0   01e71cf0 01e71d11 01e71e11 01e71f41
   1/8   Black  HP Out at Ext Left             0x21   0x0321101f   02171c1f 02171d10 02171e21 02171f03                              
   1/8   Black  Mic at Ext Left                0x18   0x03a11820   01871c20 01871d18 01871ea1 01871f03                            
   1/8   Black  HP Out at Ext Left             0x21   0x0321101f   02171c1f 02171d10 02171e21 02171f03                                
--------------------------------------------------------------------------------------------------------

Important note: This script adds modified verbs, which I've removed from the output, but we need the originals starting with OS X 10.6.3

 

And this is it. Here are the verbs aka our ConfigData. Verified on Windows 7 by searching for PinConfigOverrides in RegEdit:

01271c[b]f0[/b] 01271d[b]11[/b] 01271e[b]11[/b] 01271f[b]41[/b] 
01471c[b]10[/b] 01471d[b]01[/b] 01471e[b]13[/b] 01471f[b]99[/b] 
01771c[b]f0[/b] 01771d[b]11[/b] 01771e[b]11[/b] 01771f[b]41[/b] 
01871c[b]20[/b] 01871d[b]18[/b] 01871e[b]a1[/b] 01871f[b]03[/b] 
01971c[b]2f[/b] 01971d[b]09[/b] 01971e[b]a3[/b] 01971f[b]99[/b] 
01a71c[b]f0[/b] 01a71d[b]11[/b] 01a71e[b]11[/b] 01a71f[b]41[/b] 
01b71c[b]f0[/b] 01b71d[b]11[/b] 01b71e[b]11[/b] 01b71f[b]41[/b] 
01d71c[b]2d[/b] 01d71d[b]9a[/b] 01d71e[b]17[/b] 01d71f[b]40[/b] 
01e71c[b]f0[/b] 01e71d[b]11[/b] 01e71e[b]11[/b] 01e71f[b]41[/b] 
02171c[b]1f[/b] 02171d[b]10[/b] 02171e[b]21[/b] 02171f[b]03[/b]

Now look at the last two digits (used in the PinConfigurations property) which means that Master Chief was right when he wrote: "PinConfigurations are constructed from the last two digits of each codec verb"... and that I actually did something right this time. However. We might not need it after all. I mean my codec-id isn't matching anything, yet the PinConfigurations shows up. Voodoo? Black magic? :)

 

That's also why I think that we should use the original / unmodified verbs now. Simply because they match. Makes sense doesn't it.

 

The next step was to save the above snippet as ConfigData.hex (with HexEdit) and to convert it with the following terminal command:

openssl base64 -e -in ConfigData.hex

Giving me:

AScc8AEnHREBJx4RAScfQQFHHBABRx0AAUceEwFHH5ABdxzwAXcdEQF3HhEBdx9B
AYccIAGHHRgBhx6hAYcfAwGXHC8Blx0JAZceowGXH5kBpxzwAacdEQGnHhEBpx9B
Abcc8AG3HREBtx4RAbcfQQHXHC0B1x2aAdceFwHXH0AB5xzwAecdEQHnHhEB5x9B
AhccHwIXHRACFx4hAhcfAwEnHPABJx0RASceEQEnH0EBRxwQAUcdAAFHHhMBRx+Q
AXcc8AF3HREBdx4RAXcfQQGHHCABhx0YAYceoQGHHwMBlxwvAZcdCQGXHqMBlx+Z
Aacc8AGnHREBpx4RAacfQQG3HPABtx0RAbceEQG3H0EB1xwtAdcdmgHXHhcB1x9A
Aecc8AHnHREB5x4RAecfQQIXHB8CFx0QAhceIQIXHwM=

Don't use on-line converter like this one for example because the output is not what we want!

 

Tip: Use this on-line converter. That's one that works. And one that also shares the PHP source code (see bottom of page) so if you want to run it locally... you now can.

 

And that inserted into a previously copied XML snippet from the target Info.plist gives me:

   
                            [color="#FF0000"]<[/color]dict[color="#FF0000"]>[/color]
                                       [color="#FF0000"]<[/color]data[color="#FF0000"]>[/color]
                                       AwAAAA==
                                       [color="#FF0000"]<[/color]/data[color="#FF0000"]>[/color]
                                       [color="#FF0000"]<[/color]key[color="#FF0000"]>[/color]CodecID[color="#FF0000"]<[/color]/key[color="#FF0000"]>[/color]
                                       [color="#FF0000"]<[/color]integer[color="#FF0000"]>[/color][color="#0000FF"]283902576[/color][color="#FF0000"]<[/color]/integer[color="#FF0000"]>[/color]
                                       [color="#FF0000"]<[/color]key[color="#FF0000"]>[/color]ConfigData[color="#FF0000"]<[/color]/key[color="#FF0000"]>[/color]
                                       [color="#FF0000"]<[/color]data[color="#FF0000"]>[/color]
                                       AScc8AEnHREBJx4RAScfQQFHHBABRx0AAUce
                                       EwFHH5ABdxzwAXcdEQF3HhEBdx9BAYccIAGH
                                       HRgBhx6hAYcfAwGXHC8Blx0JAZceowGXH5kB
                                       pxzwAacdEQGnHhEBpx9BAbcc8AG3HREBtx4R
                                       AbcfQQHXHC0B1x2aAdceFwHXH0AB5xzwAecd
                                       EQHnHhEB5x9BAhccHwIXHRACFx4hAhcfAwEn
                                       HPABJx0RASceEQEnH0EBRxwQAUcdAAFHHhMB
                                       Rx+QAXcc8AF3HREBdx4RAXcfQQGHHCABhx0Y
                                       AYceoQGHHwMBlxwvAZcdCQGXHqMBlx+ZAacc
                                       8AGnHREBpx4RAacfQQG3HPABtx0RAbceEQG3
                                       H0EB1xwtAdcdmgHXHhcB1x9AAecc8AHnHREB
                                       5x4RAecfQQIXHB8CFx0QAhceIQIXHwM=
                                       [color="#FF0000"]<[/color]/data[color="#FF0000"]>[/color]
                                       [color="#FF0000"]<[/color]key[color="#FF0000"]>[/color]FuncGroup[color="#FF0000"]<[/color]/key[color="#FF0000"]>[/color]
                                       [color="#FF0000"]<[/color]integer[color="#FF0000"]>[/color][color="#0000FF"]1[/color][color="#FF0000"]<[/color]/integer[color="#FF0000"]>[/color]
                                       [color="#FF0000"]<[/color]key[color="#FF0000"]>[/color]LayoutID[color="#FF0000"]<[/color]/key[color="#FF0000"]>[/color]
                                       [color="#FF0000"]<[/color]integer[color="#FF0000"]>[/color][color="#0000FF"]270[/color][color="#FF0000"]<[/color]/integer[color="#FF0000"]>[/color]
                               [color="#FF0000"]<[/color]/dict[color="#FF0000"]>[/color]

Note: Don't use the above code snippet because that also includes color coding and other markup!

 

The CodecID (283902576) is my codec's Vendor Id: 0x10ec0270 (converted with calculator.app) and the LayoutID (270) can be any number, but I used it as a reference to the used hardware (Realtek ID 270). And because of this I had to change my DSDT a little:

[b][color="#FF0000"]"layout-id",
Unicode ("Q"),[/color][/b]

[b][color="#2E8B57"]"layout-id",
Buffer (0x04)
{
   0x0e, 0x01, 0x00, 0x00
},[/color][/b]

This to match "layout-id" with the changed "LayoutID".

 

The next step was to add it to:

AppleHDA.kext/Contents/PlugIns/.AppleHDAHardwareConfigDriver.kext/Contents/Info.plist

Please note that I used the original one, for now, but in the end we want to create our own legacy plist. Which I plan to explain in detail later on but (LOL) I am still trying to figure out the unknown myself).

 

Adding this new code snippet can be done with: sudo nano Info.plist (a terminal command) which I use because I know how to do it (worked with Ubuntu for a few years) but it is probably better to use the Property List Editor that comes with Xcode. One major advantage is that you can skip terminal commands like: openssl base64, but you'll have to install Xcode first. Which is easy, but requires you to register (free) as Apple developer first.

 

Update: Another day. Another update. Get Apple's Plist Edit Pro for free. Download it here. No need to download and install Xcode. Easy.

 

Continue reading after the break...

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AUDIO Patching : Part 2

 

So far so good. Unfortunately this was also when I hit a wall. The wall of the unknown. Sure. I have my codec dump and I made the codec graph, but girl was I in for a surprise. Little did I know. I went back and forth. Read everything I could find, but in the end failed to understand what I had to do next. Luckily I got a little guidance from big brother. Lucky me. Anyway. Let's start with an explanation of the used symbols in codec graphs:

 

1.) Green square: Pin Complex.

2.) Red ellipse: Input node (microphone).

3.) Blue ellipse: Output node (speaker, headphone).

4.) Gray hexagon: Audio Mixer.

5.) Gray rhombus: Audio Selector (input selector).

6.) Blue triangle: Amplifier.

 

And here's my little cheat sheet. Which I use to convert numbers:

 

dwevx5lrs6h8zvlcflox.png

 

This way I don't need to use the calculator. And we need to do conversions much, since all values on codec graphs are hexadecimals. We however use decimals in our Info.plist That's where this image comes in handy. Simply print it out, or write it down.

 

Will add more text later. When I made some progress :censored2:

 

Update: This has to wait (for now) because I am fully concentrating on getting the Intel HD graphics going first.

 

Continue reading after the break...

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AUDIO Patching : Part 3

 

The first two posts became a little crowded so I decided to add another one. This way making additions and changes will be easier for me, and I hope a little more readable for you.

 

Adding The Missing Bits

 

There are certain things missing in the on-line guides. For example; audio has improved since OS X 10.6.3 and thus you don't have to fix verbs anymore and thus I effectively wasted precious little time due to taking the guided a bit too literally. Seriously. Some of the provided info is simply outdated. Not that I'm complaining. I can't. Apple keeps changing things too often. Making it even more difficult for people to keep up with. One day you think to know something and the next day... poof.

 

Amplifiers:

There's not a single word about Amplifiers in the guide by TheKing, and not in the two I found here and here by Master Chief. He merely touched it, but I think I'm on something. Let's start with an oversimplified version of my codec dump:

[color="#000000"][b]Audio Outputs:[/b][/color]

Node 0x02 [Audio Output] wcaps 0x1d: Stereo [color="#2E8B57"]Amp-Out[/color]
Node 0x03 [Audio Output] wcaps 0x1d: Stereo [color="#2E8B57"]Amp-Out[/color]
Node 0x06 [Audio Output] wcaps 0x211: Stereo Digital

[color="#000000"][b]Audio Inputs:[/b][/color]

Node 0x08 [Audio Input] wcaps 0x10011b: Stereo [color="#2E8B57"]Amp-In[/color]
Node 0x09 [Audio Input] wcaps 0x10011b: Stereo [color="#2E8B57"]Amp-In[/color]

[color="#000000"][b]Audio Mixers:[/b][/color]

Node 0x0b [Audio Mixer] wcaps 0x20010b: Stereo [color="#2E8B57"]Amp-In[/color]
Node 0x0c [Audio Mixer] wcaps 0x20010b: Stereo [color="#2E8B57"]Amp-In[/color]
Node 0x0d [Audio Mixer] wcaps 0x20010b: Stereo [color="#2E8B57"]Amp-In[/color]
Node 0x0f [Audio Mixer] wcaps 0x20010a: Mono [color="#2E8B57"]Amp-In[/color]
Node 0x23 [Audio Mixer] wcaps 0x20010b: Stereo [color="#2E8B57"]Amp-In[/color]

[color="#000000"][b]Audio Selector:[/b][/color]

Node 0x22 [Audio Selector] wcaps 0x30010b: Stereo [color="#2E8B57"]Amp-In[/color]

[color="#000000"][b]Pin Complex:[/b][/color]

Node 0x12 [Pin Complex] wcaps 0x40000b: Stereo [color="#2E8B57"]Amp-In[/color]
Node 0x14 [Pin Complex] wcaps 0x40018d: Stereo [color="#2E8B57"]Amp-Out[/color]
Node 0x17 [Pin Complex] wcaps 0x40010c: Mono [color="#2E8B57"]Amp-Out[/color]
Node 0x18 [Pin Complex] wcaps 0x40018f: Stereo [color="#2E8B57"]Amp-In Amp-Out[/color]
Node 0x19 [Pin Complex] wcaps 0x40008b: Stereo [color="#2E8B57"]Amp-In[/color]
Node 0x1a [Pin Complex] wcaps 0x40018f: Stereo [color="#2E8B57"]Amp-In Amp-Out[/color]
Node 0x1b [Pin Complex] wcaps 0x40018f: Stereo [color="#2E8B57"]Amp-In Amp-Out[/color]
Node 0x1d [Pin Complex] wcaps 0x400000: Mono
Node 0x1e [Pin Complex] wcaps 0x400381: Stereo Digital
Node 0x21 [Pin Complex] wcaps 0x40018d: Stereo [color="#2E8B57"]Amp-Out[/color]

Note the green Amp related text. Is that what I am looking for? Is this the way to skip the: "Installing Software" section here? I think it is. Let me try and figure out how it works.

 

Pages 157 - 159 of the Intel HDA datasheet revealed that the text "Amp-In" / "Amp-Out" represents bit 1 / bit 2 in the Audio Widget Capabilities (wcaps) field. Meaning that the widget contains an input, output amplifier, or both. Nothing really earth shocking since amplifiers can be found on codec graphcs (represented by blue triangles) but more importantly; this info is not linked with the Amp dictionary in our Info.plist

 

There's also a third bit (bit 3 - Amp Param Override) which might be what I am looking for, but this has yet to be investigated / acknowledged.

 

Notes: Not having Amp dictionaries, or in the wrong spot in the Info.plist may results in the following error (in your kernel.log):

Sound assertion "0 != pathSet->getWidgetAmplifierGainRange (&zeroValue, &minValue, &maxValue, &minDB, &maxDB, kPATH_CONTROL_SPATIAL_CHANNELID_Master)" failed in "/SourceCache/AppleHDA/AppleHDA-187.4.1/AppleHDA/AppleHDAEngine.cpp" at line 365 goto handler

muteGPIO:

There's also not a single word about muteGPIO. What is it? When should it be used? And links to the Intel HDA datasheet aren't helpful either. Much too time consuming and complicated. Where's the experts? Also. I don't want have to wait another year for a few silly lines of text. Do you?

 

VREF:

Another one bites the dust. More about this later on.

 

The Finishing Touch:

Gathered the data is one thing, but adding it to a plist is still black magic. Not surprisingly, because yet again, there's not a single word about it in any of the guides. You are supposed to be an expert right away. Just silly.

 

Conclusion:

Please forgive me <grin>and my somewhat pessimistic view on things here</grin> but it's a fact that the most essential information to get audio going on your hack cannot be found with a simple search. Which is pretty lame. But instead of just complaining... I will keep on trying and do everything I can. I however keep hoping on some expert guidance. Yeah. I'm pretty much stuck at the moment. What a disappointment (:

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DSDT patching - Part I

 

There are two things I want. DSDT patching and DSDT cleanups. The original DSDT.dsl is a whopping 378,239 bytes. A massive 46115 bytes of AML code in the BIOS. The good news is that I am currently at 20,591 bytes (65% less) which in turn will eventually be even lower (need more time for it).

 

During my quest to get audio working on the HP I came across a few items in IORegistryExplorer that had no name. And having a MacBookPro6,1 next to it makes it easy and thus I've made some adjustments to the DSDT. One of the first things I noticed was that the SATA port was missing. Well. It was there but had no name so I've add a little snippet.

    Scope (_SB.PCI0)
   {
       [color="#2E8B57"]Device (SATA) 				// Newly added. Copied from MacBookPro6,1
       {
           Name (_ADR, 0x001F0002)
       }[/color]

       Device (SBUS)
       {
           Name (_ADR, 0x001F0003)

Just the green lines, but don't expect miracles to happen. It won't get faster or anything. It's just a name thing. Another one that was missing was MCHC which I've add like this:

            }
           [color="#2E8B57"]Device (MCHC) 				// Newly added. Copied from MacBookPro6,1
           {
               Name (_ADR, 0x00)
           }[/color]

           Device (P0P2)
           {
               Name (_ADR, 0x00010000)

But there is one extra / new property called acpi-path which may do something I'm not aware of. I know I've seen in it in the P5K PRO thread so it might do something good after all.

 

Another thing I did was to add PNLF like this

    Scope (\_SB)
   {
       [color="#2E8B57"]Device (PNLF)
       {
           Name (_HID, EisaId ("APP0002"))
           Name (_CID, "backlight")
           Name (_UID, 0x0A)
           Name (_STA, 0x0B)
       }[/color]

We apparently need this to get graphics going. And it doesn't matter which Scope (\_SB) you put it in (yes, there are a couple).

 

Update: Cool. I was right. Confirmed here.

 

And lastly.... I've add a couple of these _DTM methods:

                    Method (_DSM, 4, NotSerialized)
                   {
                       [color="#FF0000"]If (LNotEqual (And (VID0, 0xFFFF), 0xFFFF))
                       {[/color]
                           Store (Package ([color="#FF8C00"]0x02[/color])
                           {
[color="#FF8C00"]                                "hda-gfx", 
                               Buffer (0x0A)
                               {
                                   "onboard-2"
                               }[/color]
                           }, Local0)
                           MCDP (Arg2, RefOf (Local0))
                           /* DTGP (Arg0, Arg1, Arg2, Arg3, RefOf (Local0)) */
                           Return (Local0)
                       [color="#FF0000"]}

                       Return (0x80000002)[/color]
                   }

Where the orange bits change from case to case, but you'll see when I attach my DSDT. Anyway. The reason for adding this method is to add some new, and to change some existing properties. The red lines will be removed (most likely) during following cleanups (we don't need them).

 

Note that I don't use the rather bulky DTGP method, with its need of five parameters, but I use a smaller counterpart called MCDP. Taking only two parameters. Much better. Here it is:

}
   [color="#2E8B57"]Method (MCDP, 2, NotSerialized)
   {
       If (LEqual (Arg0, Zero))
       {
           Store (Buffer (One)
               {
                   0x03
               }, Arg1)
       }
   }[/color]
}

That's at the end of my DSDT yes. And again. Only the green lines. Next up. Device HPET cleanups. Here's mine:

                Device (HPET)
               {
                   Name (_HID, EisaId ("PNP0103"))
                   Name (_STA, 0x0F)
                   Name (_CRS, ResourceTemplate ()
                   {
                       IRQNoFlags ()
                           {0}
                       IRQNoFlags ()
                           {8}
                       Memory32Fixed (ReadOnly,
                           0xFED00000,         // Address Base
                           0x00000400,         // Address Length
                           )
                   })
               }

Which I simply copied from the P5KPRO thread. That's also where I found the following cleanup.

 

PR0n removal

Time to remove all occurrences of Name (PRnn.... And all of them (since we don't need them). Resulting in a much shorter and thus more readable DSDT. But make sure to match the AR0n numbers in method _PRT. Here's an example:

Method (_PRT, 0, NotSerialized)
{
Return (AR05)
}

Which looking at Master Chief's work (his insane DSDT's) can be replaced by a one liner:

Alias (AR05, _PRT)

 

Removed Devices

RP05

RP07

RP08

WMID

TSZ0

TPM

PEG3

PEG5

PEG6

 

Renamed Devices

GFX0 -> IGPU

VGA -> GFX0

 

Note: Removing Devices and/or Methods also requires you to remove the callers. And please note that I inject a modified copy of the ATI SSDT table in Revolution, where the callers also have been renamed.

 

Also. There is way too much code in scope's and otherwise placed in a funny way. Time to move stuff around. Let's make it much easier to read. And it's also time to move EHC1/2 out of the DSDT into SSDT-1.dsl (like Apple does). I'm also going to move Scope (_PR) out of the DSDT into SSDT (like MC did).

 

Files

We don't have anything in the file department. Not yet. We do however plan to attach a zipped DSDT.dsl when things are a bit more streamlined, and above all... everything works. Which is clearly not the case yet.

 

Update: More DSDT patching in post #10.

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Intel HD Graphics

 

Note: This will take some time to get everything document...

 

What's the point of hacking when there is no graphics output? Good question. And I asked myself this one too. That is why I am changed my priorities and now concentrate on getting the Intel HD graphics going. It will look messy, but I need time to figure everything out and document it so please bear with me.

 

Now. The first things I noticed in IORegistry Explorer was that there are a number of new / different properties. So far I have back traced the following properties on AppleBacklightDisplay: DisplayProductID, DisplayVendorID, IODisplayConnectFlags, IODisplayEDID, IODisplayParameters and IODisplayPrefsKey

 

I did this by using grep like this: grep -r -e AAPL,display-alias .

Binary file ./AppleBacklight.kext/Contents/MacOS/AppleBacklight matches
Binary file ./AppleGraphicsControl.kext/Contents/MacOS/AppleGraphicsControl matches
Binary file ./AppleIntelGMAX3100FB.kext/AppleIntelGMAX3100FB matches
Binary file ./AppleIntelHDGraphicsFB.kext/Contents/MacOS/AppleIntelHDGraphicsFB matches
Binary file ./AppleIntelIntegratedFramebuffer.kext/AppleIntelIntegratedFramebuffer matches
Binary file ./ATIFramebuffer.kext/Contents/MacOS/ATIFramebuffer matches
Binary file ./IOGraphicsFamily.kext/IOGraphicsFamily matches

This makes it clear what kexts are reading/setting this "AAPL,display-alias" property on AppleIntelFramebuffer. And leads to the source code of IOGraphicsFamily which happens to be open source, and thus is freely available.

 

I'll do this for every property I find...

 

DisplayProductID: 0x39e (926) on the HP and 0x9cce (40142) on a MacBookPro6,1 Taken from IODisplayEDID. Can be changed in IOGraphicsFamily.kext/Info.plist

 

The matching / available panels can be found in: AppleBacklight.kext/Content/Info.plist (under AppleIntelPanelA/ApplePanels).

 

DisplayVendorID: 0x6af (1711) on the HP and 0x610 (1552) on a MacBookPro6,1 Taken from IODisplayEDID. Can be changed in IOGraphicsFamily.kext/Info.plist

 

IODisplayConnectFlags: Read from IODisplayConnect. Is "00 08 00 00" on both the HP and a MacBookPro6,1 Which simply means that it is a built in panel (see: kIOConnectionBuiltIn in IOGraphicsTypes.h). Can be changed with "flgs" (see:for

 

IODisplayEDID: Read by readFramebufferEDID() in IODisplay.cpp Can be changed in IOGraphicsFamily.kext/Info.plist

 

More background info about 'Extended Display Identification Data' can be found here (Wikipedia).

 

Here's the HP's original EDID:

00 FF FF FF FF FF FF 00 06 AF 9E 03 00 00 00 00
01 13 01 03 80 26 15 78 0A C4 95 9E 57 53 92 26
0F 50 54 00 00 00 01 01 01 01 01 01 01 01 01 01
01 01 01 01 01 01 1C 2A 40 72 61 84 0C 30 30 20
36 00 7E D6 10 00 00 18 00 00 00 0F 00 00 00 00
00 00 00 00 00 00 00 00 00 20 00 00 00 FE 00 41
55 4F 0A 20 20 20 20 20 20 20 20 20 00 00 00 FE
00 42 31 37 33 52 57 30 31 20 56 33 20 0A 00 30

Which I changed into:

00 FF FF FF FF FF FF 00 06 10 CE 9C 00 00 00 00
01 13 01 03 80 26 15 78 0A C4 95 9E 57 53 92 26
0F 50 54 00 00 00 01 01 01 01 01 01 01 01 01 01
01 01 01 01 01 01 1C 2A 40 72 61 84 0C 30 30 20
36 00 7E D6 10 00 00 18 00 00 00 0F 00 00 00 00
00 00 00 00 00 00 00 00 00 20 00 00 00 FE 00 41
55 4F 0A 20 20 20 20 20 20 20 20 20 00 00 00 FE
00 42 31 37 33 52 57 30 31 20 56 33 20 0A 00 30

And after this change (0x6af -> 0x610 / 0x39e -> 0x9cce) the HP LCD is now seen as an Apple (vendorID 0x610 / 1552 is Apple) built in panel. Giving you 1600 x 900 instead of... well whatever (can't remember).

 

Update: Here is the EDID from a 15-inch MacBookPro6.1 (as a reference / from school)

00 FF FF FF FF FF FF 00 06 10 CE 9C 00 00 00 00
00 13 01 03 80 25 17 78 0A E5 95 A3 54 4F 9C 26
01 50 54 00 00 00 01 01 01 01 01 01 01 01 01 01
01 01 01 01 01 01 28 3C 80 A0 70 B0 23 40 30 20
36 00 6F E6 10 00 00 18 00 00 00 01 00 06 10 30
00 00 00 00 00 00 00 00 0A 20 00 00 00 FE 00 4C
50 31 37 31 57 55 36 2D 54 4C 42 32 00 00 00 FE
00 43 6F 6C 6F 72 20 4C 43 44 0A 20 20 20 00 CF

 

IODisplayParameters: Can be changed in IOGraphicsFamily.kext/Info.plist

 

Injecting the following code snippet in IOGraphicsFamily.kext/Info.plist gives me the brightness slider on the display pref pane:

			<key>IODisplayParameters</key>
		<dict>
			<key>brightness</key>
			<dict>
				<key>max</key>
				<integer>255</integer>
				<key>min</key>
				<integer>10</integer>
				<key>value</key>
				<integer>200</integer>
			</dict>
		</dict>

But the slider doesn't work. Heck. I'm not even sure it will ever work on a hack, but at least now we know how it works. Well sort of.

 

IODisplayPrefsKey: Initialized in IODisplay.cpp and cannot be changed in IOGraphicsFamily.kext/Info.plist

 

AppleIntelHDGraphicsFB

 

Next up: AppleIntelHDGraphicsFB.kext. But this time I used HexEdit to find the AAPL property names. Much easier this way. And this is what I found in AppleIntelHDGraphicsFB:

AAPL,os-info
AAPL,boot-display
AAPL,SelfRefreshSupported
AAPL,display-alias

AAPL00,DualLink
AAPL00,PixelFormat
AAPL00,T1
AAPL00,T2
AAPL00,T3
AAPL00,T4
AAPL00,T5
AAPL00,T6
AAPL00,T7
AAPL00,InverterFrequency
AAPL00,BacklightIntensity
AAPL00,override-no-connect
AAPL00,override-has-edid
AAPL00,override-no-edid
AAPL00,override-has-edid-digital
AAPL00,no-hotplug-support
AAPL00,EDID
AAPL00,display-alias
AAPL00,IgnoreConnection
AAPL00,no-hotplug-interrupt

AAPL01,override-has-edid
AAPL01,override-no-edid
AAPL01,override-has-edid-digital
AAPL01,no-hotplug-support
AAPL01,display-alias
AAPL01,EDID
AAPL01,override-no-connect
AAPL01,IgnoreConnection
AAPL01,no-hotplug-interrupt

AAPL,os-info: Add the following snippet to your _DSM method:

	"AAPL,os-info", 
Buffer (0x14)
{
	0x30, 0x49, 0x01, 0x11, 0x01, 0x10, 0x08, 0x00, 0x00, 0x01, 
	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xff, 0xff, 0xff, 0xff
},

The result is an active display. Neat for people using unrecognized model identifiers, like: "MacOnCrack". Another thing I noticed. Well two actually is that the pref panel shows more / other options. Like the Battery pref pane. The screen resolutions are also what they should be.

 

Note: I still don't know what this does, other than changing the resolutions in the resolution changer on the menu bar. And the fact that these work...

 

Update: The following three can be found in AppleIntelHDGraphicsFB.kext:

30 49 01 11 01 10 08 00 00 01 00 00 00 00 00 00 FF FF FF FF 
30 49 00 14 14 14 08 04 00 00 00 00 00 00 00 00 FF FF FF FF 
30 49 01 01 01 00 08 00 00 00 00 00 00 00 00 00 FF FF FF FF

The second one activates the external monitor (VGA connector on the left side) and selects the correct resolution of 1920 x 1200 (of the external monitor) and the last line I presume selects the HDMI connector (not tested / need to be verified).

 

AAPL,display-alias: Add the following snippet to your _DSM method:

	"AAPL,display-alias", 
Buffer (0x04)
{
	0x00, 0x00, 0x00, 0x00
},

And the result will be a nice new alias:

Alias:0/AppleBacklightDisplay-610-39e

 

As can be found in a MacBookPro6.1 Now compare the above with this ugly long value:

IOService:/AppleACPIPlatformExpert/PCI0@0/AppleACPIPCI/IGPU@2/AppleIntelFramebuffer/

display0/AppleBacklightDisplay-610-39e

 

The value 610 (1552) here is the manufacturer (Apple) and 39e (962) the HP's LCD backlight panel. I also found the default values, for unsupported hardware in the file IOGraphicsTypes.h which defines the following:

enum {
kDisplayVendorIDUnknown	 = 'unkn',
kDisplayProductIDGeneric	= 0x717 (1815)
};

And that is why I want to be able to build IOFamilyGraphics myself. Clear? Anyway. OS X will use this info to lookup an override table in:

/System/Library/Displays/Overrides/DisplayVendorID-610/DisplayProductID-39e

 

Where you can inject a new name like so:

		<key>DisplayProductName</key>
	<string>HP Color Display</string>

Or inject a modified copy of your EDID with:

	<key>IODisplayEDID</key>
<data>
AP///////wAGEAadAQEBAQAIAQFoGxSw6GbpnFdMliYQSEwAAgABAQEBAQEBAQEBAQEB
AQEBiBOAwCDgIhAQQBMABMMQAAAeYBgg8DBYICAQUBMABMMQAAAeAAAA/QBLdTw8CAAK
ICAgICAgAAAA/ABpTWFjCiAgICAgICAgAGw=
</data>

And set the default resolution with:

	<key>default-resolution</key>
<data>
AAAEAAAAAwAAS///
</data>

And this is also where we find this:

		<key>dspc</key>
	<array>
		<data>
		HCpAcmGEDDAwIDYAftYQAAAY
		</data>
	</array>

Which coincidentally is the 18 byte long 'Descriptor Block 1' in our EDID table (byte 54-71 - see my EDID example above). I also replaced mine with a MacBookPro6.1 copy and that I tell you changed a lot. Double the width and allowing me to read parts of my screen LOL.

 

I also found tovr in IOGraphicsLib.c which looks like this:

	<key>tovr</key>
<dict>
	<key>140</key>
	<data>
	AAAAAAAAAAAAAAADAAACAA==
	</data>
	<key>150</key>
	<data>
	AAAAAAAAAAAAAAADAAACAA==
	</data>
	<key>170</key>
	<data>
	AAAAAAAAAAAAAAADAAACAA==
	</data>
	<key>180</key>
	<data>
	AAAAAAAAAAAAAAADAAACAA==
	</data>
	<key>182</key>
	<data>
	AAAAAAAAAAAAAAADAAACAA==
	</data>
	<key>190</key>
	<data>
	AAAAAAAAAAAAAAADAAACAA==
	</data>
	<key>200</key>
	<data>
	AAAAAAAAAAAAAAADAAACAA==
	</data>
	<key>204</key>
	<data>
	AAAAAAAAAAAAAAADAAACAA==
	</data>
	<key>210</key>
	<data>
	AAAAAAAAAAAAAAADAAACAA==
	</data>
</dict>

To override timing info (example from DisplayProductID-1f4) but I have yet to figure out how this works. I do know that the key's here are VESA timing ID's found in IOGraphicsTypes.h For example; 192 (0xc0) is used on a MacBookPro6.1

 

IOGFlags:

This flag is used in IOGraphicsLib.c

	<key>IOGFlags</key>
<integer>4</integer>

Possible values are in IOGraphicsTypes.h Like kDisplayModeDefaultFlag (4) in the above example. And when I set it to 5 on the HP, then I only have one table under IOFBDetailedTimings (see next post for a detailed explanation of it). The rest is cleared. And with this value, screen sharing starts up in the given resolution, which in my case is 1600 * 900

 

And lastly. Clearing bit 1 of byte 24 (preferred timing mode) gave me a frequency selector on the Display pref pane. Just like on my MacBook Pro.

 

> ========== ~ --- ~ --- ========= <

 

Well guys (sorry I don't see much girls here). This is it for now. Gonna play with and test some of the other properties. Let's see if I can find something interesting. I'll report back when I have news...

 

Update: I found some interesting, and very detailed, info (from Apple) about the properties set on AppleIntelFrameBuffer And this info will most certainly help me to understand what they do and are used for. Possibly even helping me to locate the error.

 

Again. If you can make IOGraphicsFamily to compile... then we're on to something!

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AppleIntelFramebuffer

 

Let me start by stating that this post is based on my own personal experience with an HP Notebook and OS X 10.6.4 on an external HD (USB connected) so your findings will most likely be somewhat different when you're using other hardware.

 

This journey will be business as usual. One with a slight academic twist; I have to find some sort of evidence for everything I write about. And it's all about properties again. And what I am looking at (in IORegistry Explorer) is this (left picture):

8plvdqa9xzqmtxsme8kb_thumb.png pi69sbk0bhau57frxplq_thumb.png

Instead of the right one. And in order to correct this, we first have to understand what the values do / are used for. How else can we fix it? I wouldn't know. Do you?

 

IOFBConfig (Dictionary) Detailed information available in FBDump v1.0.

There are five properties that I will be discussing separately below:

 

dims (Data) Dimensions aka screen resolution.

Here's the HP one:

<40 06 00 00 84 03 00 00 00 02 00 00 07 00 00 00>

And the first two values are the screen resolution aka 1600 (40 06 00 00) * 900 (84 03 00 00) on the HP. The last two are still unknown to me.

 

IODisplayAttributes (Data) meaning unknown.

The text variant of this property includes: gatv, sglf, rloc, cpb, cdq and qlfd.

 

IOFB0Hz (Boolean) suppressRefresh. Used in IOGraphicsLib.c

 

IOFBDetailedTimings (Array) See below.

 

IOFBModes (Array) Defines screen modes.

This I think may be one of the most interesting finds so far. It includes the following properties:

 

- DM (Data)

Defined as struct IODisplayModeInformation in IOGraphicsTypes.h Example (From MacBookPro6.1):

80 07 00 00 nominalWidth (1920)
b0 04 00 00 nominalHeight (1200)
3e f3 3b 00 refreshreate (two 16/16 values) 
00 00 00 00 maxDepthIndex
07 00 00 00 flags (kDisplayModeSafetyFlags)
00 00 00 00 reserved[0]
00 00 00 00 reserved[1]
00 00 00 00 reserved[2]
00 00 00 00 reserved[3]

Note: kDisplayModeSafetyFlags = (kDisplayModeValidFlag | kDisplayModeSafeFlag | kDisplayModeDefaultFlag) or simply: kDisplayModeSafetyFlags = (1 | 2 | 4)

 

- ID (Number) Constructed from the first 32-bit value of TM (see below).

 

- TM (Data) Timing Management.

See ID and IOFBDetailedTimings for the meaning of it. But here's the catch; TM is defined under std-modes in:

/System/Library/Frameworks/IOKit.framework/Resources/IOGraphicsProperties.plist

Some of the properties, like: std-modes, timing-ids and irb-timing are read (once at startup) by IOFramebufferServerStart and thus it has to be important. What if we add our IODisplayMode here? This may be the way of having the dual-link activated (have numLinks return 2). Yah. Let's find out tomorrow.

 

Update: This property is only there when the graphics adapter is active / selected!

 

IOFBCurrentPixelClock

This represents which the proper clock rate of 107.80 (do the math). The value on the HP is: 0x66ce5c0 (107800000) and on a MacBookPro6.1 0x92dda80 (154000000). A huge difference (due to the higher screen resolution on the MacBook Pro). And the following formula can be used to calculate the refresh rate:

 

Refresh rate in Hz = IOFBCurrentPixelClock / (HorizontalTotal x VerticalTotal)

 

Which gives: 107800000 / (1970 x 912) = 60 Hz

 

n.b. Thanks to this document.

 

IOFBCurrentPixelCount

This represents the total horizontal * vertical screen pixels. Including overhead. The value for this on the HP is: 0x1b6a20 (1796640) and on the MacBookPro6.1 0x273260 (2568800). Now look at the HP's EDID dump:

	Mode = 1600 x 900 @ 60.001 Hz
	Pixel Clock............. 107.80 MHz		Non-Interlaced

							Horizontal		Vertical
...
	Total................... 1970 pixels		 912 lines

There it is. 1970 * 912 = 1796640 (0x1B6A20). I'll repeat this with the value found on the MacBookPro6.1 Starting with the EDID:

	Mode = 1920 x 1200 @ 59.950 Hz
	Pixel Clock............. 154.00 MHz		Non-Interlaced

							Horizontal		Vertical
...
	Total................... 2080 pixels		 1235 lines

Giving us our 2568800. Now multiplying 2080 by 1235 and there it is. Easy isn't it.

 

IOFBDetailedTimings Detailed information available in FBDump v0.6.

LCD timing Array for LCD panel. Filled with 21 Data elements on the HP. Might be anything. The meaning of each value in the elements can be found below (thanks to IOGraphicsTypes.h and a lot of my time):

On the HP:
==================================================================================================
<00 10 00 80 AppleTimingID		// Industry standard VESA ID (0x80001000)
00 00 00 00 flags
00 00 00 00  __reservedA[3]		// Init to 0
00 00 00 00 horizontalScaledInset	// pixels
00 00 00 00 verticalScaledInset	// lines

00 00 00 00 scalerFlags
00 00 00 00 horizontalScaled
00 00 00 00 verticalScaled

00 00 00 00 signalConfig
00 00 00 00 signalLevels

c0 e5 6c 06 00 00 00 00 pixelClock	// Hz (IOFBCurrentPixelClock is 0x66ce5c0 on the HP)

c0 e5 6c 06 00 00 00 00 minPixelClock	// Hz - With error what is slowest actual clock
c0 e5 6c 06 00 00 00 00 maxPixelClock	// Hz - With error what is fasted actual clock

40 06 00 00 horizontalActive		// 1600 pixels
72 01 00 00 horizontalBlanking		// 370 pixels
30 00 00 00 horizontalSyncOffset	// 48 pixels
20 00 00 00 horizontalSyncPulseWidth	// 32 pixels

84 03 00 00 verticalActive		// 900 lines
0c 00 00 00 verticalBlanking		// 12 lines
03 00 00 00 verticalSyncOffset		// 3 lines
06 00 00 00 verticalSyncPulseWidth	// 6 lines

00 00 00 00 horizontalBorderLeft	// 0 pixels
00 00 00 00 horizontalBorderRight	// 0 pixels
00 00 00 00 horizontalSyncOffset	// 0 pixels
00 00 00 00 horizontalSyncPulseWidth	// 0 pixels

00 00 00 00 horizontalSyncConfig
00 00 00 00 horizontalSyncLevel	// Future use (init to 0)
00 00 00 00 verticalSyncConfig
00 00 00 00 verticalSyncLevel		// Future use (init to 0)
01 00 00 00 numLinks			// number of links to be used by a dual link timing, if zero, assume one link.

00 00 00 00 __reservedB[7]		// Init to 0
00 00 00 00 
00 00 00 00 
00 00 00 00 
00 00 00 00 
00 00 00 00 
00 00 00 00>

On a MacBookPro6.1:
==================================================================================================
<00 00 00 c0 AppleTimingID		// Industry standard VESA ID (0xC0000000)
00 00 00 00 flags
00 00 00 00 __reservedA[3]		// Init to 0
00 00 00 00 horizontalScaledInset	// pixels
00 00 00 00 verticalScaledInset	// lines

00 00 00 00 scalerFlags
00 00 00 00 horizontalScaled
00 00 00 00 verticalScaled

00 00 00 00 signalConfig
00 00 00 00 signalLevels

80 da 2d 09 00 00 00 00 pixelClock	// Hz (IOFBCurrentPixelClock is 0x92dda80 on a MacBookPro6.1)

68 87 1f 09 00 00 00 00 minPixelClock	// Hz (0x91F8768) - With error what is slowest actual clock
68 87 1f 09 00 00 00 00 maxPixelClock	// Hz (0x91F8768) - With error what is fasted actual clock

80 07 00 00 horizontalActive		// 1920 pixels
a0 00 00 00 horizontalBlanking		// 160 pixels
30 00 00 00 horizontalSyncOffset	// 48 pixels
20 00 00 00 horizontalSyncPulseWidth	// 32 pixels

b0 04 00 00 verticalActive		// 1200 lines
23 00 00 00 verticalBlanking		// 35 lines
03 00 00 00 verticalSyncOffset		// 3 lines
06 00 00 00 verticalSyncPulseWidth	// 6 lines

00 00 00 00 horizontalBorderLeft	// 0 pixels
00 00 00 00 horizontalBorderRight	// 0 pixels
00 00 00 00 verticalBorderTop		// 0 lines
00 00 00 00 verticalBorderBottom	// 0 lines

00 00 00 00 horizontalSyncConfig
00 00 00 00 horizontalSyncLevel	// Future use (init to 0)
00 00 00 00 verticalSyncConfig
00 00 00 00 verticalSyncLevel		// Future use (init to 0)
02 00 00 00 numLinks			// number of links to be used by a dual link timing, if zero, assume one link.

00 00 00 00 __reservedB[7]		// Init to 0
00 00 00 00 
00 00 00 00 
00 00 00 00 
00 00 00 00 
00 00 00 00 
00 00 00 00>

A few notes. First. The numLinks value here is important, because it must be 2 for all resolution above 1024 * 768. For non scaled resolutions that is. And on the HP I have a grand total of 21 detailed timing elements, of which all but the first are scaled resolution. Of which all of them are scaled back from 1920 * 1200. I don't think that this is right, but I'll figure it out, hopefully, at a later time.

 

Update: This property is only there (on a MacBookPro6.1) when the Intel HD Graphics (IGPU) is active. Not when the NVIDIA is active! Another observation on the MacBookPro6.1 is that both display and AppleBacklightDisplay under the deactivated GPU is made red and striked through.

 

IOFBMemorySize

Defined as: kIOFBMemorySizeKey in IOGraphicsTypes.h and initialized in IOFrameBuffer.cpp

 

The value I see on the HP is 0x10000000 (268435456) or 256 MB. Which happens to be the same on the MacBookPro6,1 so this should be fine I guess.

 

IOFBScalarInfo Detailed information available in FBDump v0.6.

Defined as kIOFBScalerInfoKey in IOGraphicsTypes.h (see also: struct IODisplayScalerInformation in IOGraphicsTypes.h):

On the HP:
==================================================
<00 00 00 00 __reservedA[1]	// Init to 0
00 00 00 00 version		// Init to 0
00 00 00 00 __reservedB[2]	// Init to 0
00 00 00 00 

0a 00 00 00 scalerFeatures

ff 0f 00 00 maxHorizontalPixels
ff 0f 00 00 maxVerticalPixels

00 00 00 00 __reservedC[5];         // Init to 0
00 00 00 00 
00 00 00 00 
00 00 00 00 
00 00 00 00>

 

IOFBTransform (Number) Detailed information available in FBDump v0.7.

Rotation information. Defined in IOGraphicsTypes.h as: 0 (kIOScaleRotate0), 90 (kIOScaleRotate90), 180 (kIOScaleRotate180) or 270 (kIOScaleRotate270) degrees.

 

startup-timing (Data) Detailed information available in FBDump v0.6.

Defined as kIOFBStartupTimingPrefsKey in IOGraphicsTypesPrivate.h

I don't think that this one need any further explanation. It should be pretty clear now (see: IODetailedTimings for additional info).

On the HP:
<[color="#2E8B57"]00 10 00 80[/color] 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 c0 e5 6c 06 00 00 00 00 c0 e5 6c 06 00 00 00 00 c0 e5 
6c 06 00 00 00 00 40 06 00 00 72 01 00 00 30 00 00 00 20 00 00 00 84 03 00 00 0c 00 00 
00 03 00 00 00 06 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 01 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00>

On a MacBook Pro:
<2a 00 00 00 00 00 00 c0 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 
00 00 00 80 07 00 00 b0 04 00 00 00 00 00 00 00 00 00 00 80 da 2d 09 00 00 00 00 98 d6 
2d 09 00 00 00 00 98 d6 2d 09 00 00 00 00 80 07 00 00 a0 00 00 00 30 00 00 00 20 00 00 
00 b0 04 00 00 23 00 00 00 03 00 00 00 06 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 02 00 00 00 00 00 00 00 00 
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00>

Mostly the same sort of info, with the exception of the following leadings values:

 

2a 00 00 00 = kIOTimingIDApple_FixedRateLCD

00 00 00 c0 = kIODisplayModeIDReservedBase | kIODisplayModeIDAliasBase

 

Note: These values are defined in IOGraphicsTypes.h and IOGraphicsTypesPrivate.h

 

FBDump

FBDump is a little command line tool to dump the content of certain objects. The current version (v0.6) can be found here but a newer version (v0.8) with detailed information for IOFBCursorInfo will be attached here soon.

 

We're already working on FBDump v1.0 which will add support for Dictionary objects like IOFBConfig. This however requires us to do some restructuring, and thus it will take some time to complete. But it will be released in the near future!

 

Please note that what we do here is really easy; we just take information from the freely available header files, and show that for each property. That's all, but it helps us to understand what all these properties are used for.

 

Update: Switching graphics adapter – which normally is done automatically (see the checkbox on the Energy Saver pref pane) – adds two properties called: saved-config and saved-timing0 under IGPU / GFX0 (but the latter only on IGPU).

 

And either AppleIntelFramebuffer or NVDA has a property called: "AAPL,primary-display" to denote the activation.

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I checked some of my findings today against the HP and found a few discrepancies in my IORegistry Explorer dump. Nope. It isn't matching the real MacBookPro6.1 one to one. Let's start with startup-timing:

00 00 00 00 00 00 00 80 [color="#FF0000"]00 10 00 80[/color] 00 00 
00 00 00 00 00 00 00 00 00 00 00 00 00 00 
00 00 00 00 00 00 00 00 00 00 00 00 00 00 
00 00 00 00 00 00 c0 e5 6c 06 00 00 00 00 
e7 22 6a 06 00 00 00 00 e7 22 6a 06 00 00 
00 00 [color="#2E8B57"][b]40 06[/b][/color] 00 00 72 01 00 00 30 00 00 00 
20 00 00 00 [color="#2E8B57"][b]84 03[/b][/color] 00 00 0c 00 00 00 03 00 
00 00 06 00 00 00 00 00 00 00 00 00 00 00 
00 00 00 00 00 00 00 00 00 00 00 00 00 00 
00 00 00 00 00 00 00 00 00 00 [color="#0000FF"][b]01[/b][/color] 00 00 00 
00 00 00 00 00 00 00 00 00 00 00 00 00 00 
00 00 00 00 00 00 00 00 00 00 00 00 00 00

The first byte value (index byte) in red (00 10 00 80) above tells me that it is using the first mode (00) under IOFBConfig -> IOFBModes when it starts up. And the blue value (01) simply means that we have only one link, instead of a dual-link. And we need (02) here, because of the higher resolution (see values in green).

 

And looking at the config data... my ID is 0x80001008 instead of 0xffffffff80001008 on the MacBookPro. This may or may not be important, but it is different and that is why I mention it here.

 

More surprisingly is the fact that my DM data is wrong. Apparently that is. Or should I say that it isn't what I am expecting? Let's have a look at it:

40 05 00 00 f4 02 00 00 3a 00 3c 00 00 00 00 00 03 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

The 40 05 (1344) and f4 02 (756) means that it somehow scales down (to a lower resolution). And that is not what I want. It should be 40 06 (1600) and 84 03 (900) since that is the resolution I choose to use. And they do not match the startup-timing. Now the two don't match.

 

Also. On the MacBookPro I have one IOFBDetailedTimings data block more than I have IOFBModes. Seems like it injects one that I'm not having on the HP. And the one missing starts with 00 00 00 c0 and there's dual link enabled. I now also know that this value is set in function matchController in IOFrameBuffer.cpp like so:

mode = kIODisplayModeIDReservedBase | kIODisplayModeIDAliasBase;

where kIODisplayModeIDReservedBase is 0x80000000 and kIODisplayModeIDAliasBase is 0x40000000 Giving us the 0xc0000000 found on the MacBookPro. Meaning that on the HP it bails out early, somewhere in the following code snippet (from IOFramebuffer.cpp):

		if (kIODetailedTimingValid & modeInfo.timingInfo.flags)
	{
		modeInfo.timingInfo.detailedInfo.v2.detailedTimingModeID
				= (kIODisplayModeIDReservedBase | kIODisplayModeIDAliasBase);
		modeInfo.timingInfo.detailedInfo.v2.minPixelClock
				= modeInfo.timingInfo.detailedInfo.v2.pixelClock;
		modeInfo.timingInfo.detailedInfo.v2.maxPixelClock
				= modeInfo.timingInfo.detailedInfo.v2.pixelClock;

		err = fb->validateDetailedTiming(&modeInfo, sizeof(modeInfo));
		if (kIOReturnSuccess != err)
		{
			DEBG1(fb->thisName, " validateDetailedTiming(%x)\n", err);
			break;
		}	
		data = OSData::withBytes(&modeInfo.timingInfo.detailedInfo.v2,
										  sizeof(modeInfo.timingInfo.detailedInfo.v2));
		array = OSArray::withObjects((const OSObject**) &data, 1, 1);
		data->release();
		err = fb->setDetailedTimings(array);
		if (kIOReturnSuccess != err)
		{
			DEBG1(fb->thisName, " setDetailedTimings(%x)\n", err);
			break;
		}	
		array->release();
		mode = kIODisplayModeIDReservedBase | kIODisplayModeIDAliasBase;
	}

Which means, yet again, that we have to get ready. Get the source code to compile rather sooner than later. Help here is urgently requested. We have to get these values right, or it won't work. Ever.

 

Update: The HP now panics on restarts at 1600 * 900 though it still works at 1344 * 756. And this used to work so I must have made an error somewhere. Will try to locate it and report back a.s.a.p.

 

It might be a good idea to add unknown resolutions, like my 1600 * 900 to IOGraphicsProperties.plist in:

/System/Library/Frameworks/IOKit.framework/Resources/

That should help identify it, because this is where TM is coming from I presume. Or at least gets validated against (I think).

 

And NO I won't stop just because a new MacBook Air is on its way. I'll keep digging and looking for solutions, and dump my findings here, because even I may need it one day soon.

 

Update: The startup-timing data was fine, but DM not. I went back to the original EDID and now things are ok again. I also noticed that AppleHMSensor.kext isn't loading (anymore?) and thus I will restore a few files (one by one) to see where I did go wrong. Will report back when I found out what I did wrong. I'm also going back a few steps. To get the supported VESA modes; I'll be using Revolution for it, but you can use Chameleon's ?video boot option for it.

 

p.s. Some of the values in this post may look wrong, but that's mainly due to the fact that you need to byte-flip them first, in order to get the values we're interested in.

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I recently started to do some C++ coding on OS X. Even wrote a few simple command line tools already. I am however still nowhere close to fixing anything seriously broken, but hope to be able to do more useful work at a later stage. Need to make a huge leap forward soon or else... I won't be able to contribute anything related to our Intel HD / ATI graphics brokenness.

 

DSDT Patching - part II

 

Today (Friday, 5 November) I was close to giving up. Seriously. There's simply too much to learn. And without outside help... everything seems to go very slow. That's when my big inspiration made me realize that I had to take a step back. When you're stuck, then you simply ask for help. And when nobody seems to care, or people are too busy, or simply don't know, get on with something else. Sam. Don't go sit and get angry. Enter a renewed interest is DSDT hacking. I already snooped off 65% of it (see post #6) so things are going great again.

 

I was wondering if and how my P-states and C-states are working. I do see CPUPLimit (Number 0x0) and PerformanceStateArray (Array with 11 Data objects) with IORgistryExplorer, but I don't have CSTInfo like on my Mac. I also don't have GPUMetaState and GPUPLimit. Time to figure out what is going on.

 

That is when I found out that I have one original HP factory SSDT loaded (the chain loader, the one loading the other SSDT tables) but that it didn't do anything because I was missing a few lines in my modified DSDT. Thing is you have to have all (externally) referred methods and objects, like Processor blocks for example. Which I of course did not have anymore. Nope. I thought to be smart and removed the ones for CPU4, CPU5, CPU6 and CPU7 simply because I only have 2 cores with two threads each.

 

This stupid error alone took me four hours off my radar. How did I found out what was wrong? Well. I tried to dump PDC0 in one of the _DSM methods, but each time I did this, it vanished completely (non of the other values where there anymore). That's when I called someone for help... and got it. Silly isn't it (not for getting help, because that's actually a smart thing to do).

 

Anyway. AppleLPC.kext is loaded here – without patching anything – and I don't have any C-state related errors in my log files. Which is good, but that doesn't make it work. I then checked the _CST method and learned that it checks CFGD, PDC0 and PWRS. The first one, being CFGD is defined in the chain loader as 0x01230653 so that's a simple one. The third one is also easy because that referrs to the AC Power Adapter plug (where One is on AC Power and Zero on Battery Power). The second one however is more challenging. It is defined as 0x80000000 but dumping it in a _DSM method simply shows the init value. Not good.

 

We know that only bits 8 (0x100) and 9 (0x200) of PDC0 are used / checked, but I have yet to figure out how to dump it after OSPM called method _PDC. Which is where it gets initialized properly. I know from looking at the chain loader, and the fact that the factory _PSS table loads, and thus the bits: 0, 3 and 4 must be are hight / set.

 

I also found out that bit 8 and 9 are set. And the meaning of the bits is explained here in the P5K PRO thread. Time to do some arm wrestling with this insane big _CST method:

Method (_CST, 0, NotSerialized)
       {
           If (LAnd (And (CFGD, 0x00200000), And (PDC0, 0x0200))) // C1, C2 and C3 support
           {
               If (LNot (PWRS)) // On Battery Power?
               {
                   [color="#FF0000"]If (And (CFGD, 0x20000000)) // Not true on the HP!
                   {
                       If (And (CFGD, 0x40))
                       {
                           Return (Package (0x04)
                           {
                               0x03, 
                               Package (0x04)
                               {
                                   ResourceTemplate ()
                                   {
                                       Register (FFixedHW, 
                                           0x01,               // Bit Width
                                           0x02,               // Bit Offset
                                           0x0000000000000000, // Address
                                           0x01,               // Access Size
                                           )
                                   }, 

                                   One, 
                                   0x03, 
                                   0x03E8
                               }, 

                               Package (0x04)
                               {
                                   ResourceTemplate ()
                                   {
                                       Register (FFixedHW, 
                                           0x01,               // Bit Width
                                           0x02,               // Bit Offset
                                           0x0000000000000010, // Address
                                           0x03,               // Access Size
                                           )
                                   }, 

                                   0x02, 
                                   0xCD, 
                                   0x01F4
                               }, 

                               Package (0x04)
                               {
                                   ResourceTemplate ()
                                   {
                                       Register (FFixedHW, 
                                           0x01,               // Bit Width
                                           0x02,               // Bit Offset
                                           0x0000000000000030, // Address
                                           0x03,               // Access Size
                                           )
                                   }, 

                                   0x03, 
                                   0xF5, 
                                   0xC8
                               }
                           })
                       }

                       Return (Package (0x03)
                       {
                           0x02, 
                           Package (0x04)
                           {
                               ResourceTemplate ()
                               {
                                   Register (FFixedHW, 
                                       0x01,               // Bit Width
                                       0x02,               // Bit Offset
                                       0x0000000000000000, // Address
                                       0x01,               // Access Size
                                       )
                               }, 

                               One, 
                               0x03, 
                               0x03E8
                           }, 

                           Package (0x04)
                           {
                               ResourceTemplate ()
                               {
                                   Register (FFixedHW, 
                                       0x01,               // Bit Width
                                       0x02,               // Bit Offset
                                       0x0000000000000030, // Address
                                       0x03,               // Access Size
                                       )
                               }, 

                               0x03, 
                               0xF5, 
                               0xC8
                           }
                       })
                   }
[/color]
                   [color="#2E8B57"]If (And (CFGD, 0x0200))
                   {
                       If (And (CFGD, 0x40))
                       {
                           Return (Package (0x04)
                           {
                               0x03, 
                               Package (0x04)
                               {
                                   ResourceTemplate ()
                                   {
                                       Register (FFixedHW, 
                                           0x01,               // Bit Width
                                           0x02,               // Bit Offset
                                           0x0000000000000000, // Address
                                           0x01,               // Access Size
                                           )
                                   }, 

                                   One, 
                                   0x03, 
                                   0x03E8
                               }, 

                               Package (0x04)
                               {
                                   ResourceTemplate ()
                                   {
                                       Register (FFixedHW, 
                                           0x01,               // Bit Width
                                           0x02,               // Bit Offset
                                           0x0000000000000010, // Address
                                           0x03,               // Access Size
                                           )
                                   }, 

                                   0x02, 
                                   0xCD, 
                                   0x01F4
                               }, 

                               Package (0x04)
                               {
                                   ResourceTemplate ()
                                   {
                                       Register (FFixedHW, 
                                           0x01,               // Bit Width
                                           0x02,               // Bit Offset
                                           0x0000000000000020, // Address
                                           0x03,               // Access Size
                                           )
                                   }, 

                                   0x03, 
                                   0xF5, 
                                   0x015E
                               }
                           })
                       }
[/color]
                       Return (Package (0x03)
                       {
                           0x02, 
                           Package (0x04)
                           {
                               ResourceTemplate ()
                               {
                                   Register (FFixedHW, 
                                       0x01,               // Bit Width
                                       0x02,               // Bit Offset
                                       0x0000000000000000, // Address
                                       0x01,               // Access Size
                                       )
                               }, 

                               One, 
                               0x03, 
                               0x03E8
                           }, 

                           Package (0x04)
                           {
                               ResourceTemplate ()
                               {
                                   Register (FFixedHW, 
                                       0x01,               // Bit Width
                                       0x02,               // Bit Offset
                                       0x0000000000000020, // Address
                                       0x03,               // Access Size
                                       )
                               }, 

                               0x03, 
                               0xF5, 
                               0x015E
                           }
                       })
                   }

                   If (And (CFGD, 0x40))
                   {
                       Return (Package (0x03)
                       {
                           0x02, 
                           Package (0x04)
                           {
                               ResourceTemplate ()
                               {
                                   Register (FFixedHW, 
                                       0x01,               // Bit Width
                                       0x02,               // Bit Offset
                                       0x0000000000000000, // Address
                                       0x01,               // Access Size
                                       )
                               }, 

                               One, 
                               0x03, 
                               0x03E8
                           }, 

                           Package (0x04)
                           {
                               ResourceTemplate ()
                               {
                                   Register (FFixedHW, 
                                       0x01,               // Bit Width
                                       0x02,               // Bit Offset
                                       0x0000000000000010, // Address
                                       0x03,               // Access Size
                                       )
                               }, 

                               0x02, 
                               0xCD, 
                               0x01F4
                           }
                       })
                   }

                   Return (Package (0x02)
                   {
                       One, 
                       Package (0x04)
                       {
                           ResourceTemplate ()
                           {
                               Register (FFixedHW, 
                                   0x01,               // Bit Width
                                   0x02,               // Bit Offset
                                   0x0000000000000000, // Address
                                   0x01,               // Access Size
                                   )
                           }, 

                           One, 
                           0x03, 
                           0x03E8
                       }
                   })
               }

               [color="#2E8B57"]If (And (CFGD, 0x0200)) // Used when on AC Power
               {
                   Return (Package (0x03)
                   {
                       0x02, 
                       Package (0x04)
                       {
                           ResourceTemplate ()
                           {
                               Register (FFixedHW, 
                                   0x01,               // Bit Width
                                   0x02,               // Bit Offset
                                   0x0000000000000000, // Address
                                   0x01,               // Access Size
                                   )
                           }, 

                           One, 
                           0x03, 
                           0x03E8
                       }, 

                       Package (0x04)
                       {
                           ResourceTemplate ()
                           {
                               Register (FFixedHW, 
                                   0x01,               // Bit Width
                                   0x02,               // Bit Offset
                                   0x0000000000000020, // Address
                                   0x03,               // Access Size
                                   )
                           }, 

                           0x03, 
                           0xF5, 
                           0x015E
                       }
                   })
               }[/color]

               If (And (CFGD, 0x40))
               {
                   Return (Package (0x03)
                   {
                       0x02, 
                       Package (0x04)
                       {
                           ResourceTemplate ()
                           {
                               Register (FFixedHW, 
                                   0x01,               // Bit Width
                                   0x02,               // Bit Offset
                                   0x0000000000000000, // Address
                                   0x01,               // Access Size
                                   )
                           }, 

                           One, 
                           0x03, 
                           0x03E8
                       }, 

                       Package (0x04)
                       {
                           ResourceTemplate ()
                           {
                               Register (FFixedHW, 
                                   0x01,               // Bit Width
                                   0x02,               // Bit Offset
                                   0x0000000000000010, // Address
                                   0x03,               // Access Size
                                   )
                           }, 

                           0x02, 
                           0xCD, 
                           0x01F4
                       }
                   })
               }

               Return (Package (0x02)
               {
                   One, 
                   Package (0x04)
                   {
                       ResourceTemplate ()
                       {
                           Register (FFixedHW, 
                               0x01,               // Bit Width
                               0x02,               // Bit Offset
                               0x0000000000000000, // Address
                               0x01,               // Access Size
                               )
                       }, 

                       One, 
                       0x03, 
                       0x03E8
                   }
               })
           }

           If (LAnd (And (CFGD, 0x00200000), And (PDC0, 0x0100))) // C1 and C2 support only.
           {
               If (LNot (PWRS)) // On Battery Power?
               {
                   [color="#FF0000"]If (And (CFGD, 0x20000000)) // Not true on the HP.
                   {
                       If (And (CFGD, 0x40))
                       {
                           Return (Package (0x04)
                           {
                               0x03, 
                               Package (0x04)
                               {
                                   ResourceTemplate ()
                                   {
                                       Register (FFixedHW, 
                                           0x01,               // Bit Width
                                           0x02,               // Bit Offset
                                           0x0000000000000000, // Address
                                           0x01,               // Access Size
                                           )
                                   }, 

                                   One, 
                                   0x03, 
                                   0x03E8
                               }, 

                               Package (0x04)
                               {
                                   ResourceTemplate ()
                                   {
                                       Register (SystemIO, 
                                           0x08,               // Bit Width
                                           0x00,               // Bit Offset
                                           0x0000000000000414, // Address
                                           ,)
                                   }, 

                                   0x02, 
                                   0xCD, 
                                   0x01F4
                               }, 

                               Package (0x04)
                               {
                                   ResourceTemplate ()
                                   {
                                       Register (SystemIO, 
                                           0x08,               // Bit Width
                                           0x00,               // Bit Offset
                                           0x0000000000000416, // Address
                                           ,)
                                   }, 

                                   0x03, 
                                   0xF5, 
                                   0xC8
                               }
                           })
                       }

                       Return (Package (0x03)
                       {
                           0x02, 
                           Package (0x04)
                           {
                               ResourceTemplate ()
                               {
                                   Register (FFixedHW, 
                                       0x01,               // Bit Width
                                       0x02,               // Bit Offset
                                       0x0000000000000000, // Address
                                       0x01,               // Access Size
                                       )
                               }, 

                               One, 
                               0x03, 
                               0x03E8
                           }, 

                           Package (0x04)
                           {
                               ResourceTemplate ()
                               {
                                   Register (SystemIO, 
                                       0x08,               // Bit Width
                                       0x00,               // Bit Offset
                                       0x0000000000000416, // Address
                                       ,)
                               }, 

                               0x03, 
                               0xF5, 
                               0xC8
                           }
                       })
                   }
[/color]
                   If (And (CFGD, 0x0200))
                   {
                       If (And (CFGD, 0x40))
                       {
                           Return (Package (0x04)
                           {
                               0x03, 
                               Package (0x04)
                               {
                                   ResourceTemplate ()
                                   {
                                       Register (FFixedHW, 
                                           0x01,               // Bit Width
                                           0x02,               // Bit Offset
                                           0x0000000000000000, // Address
                                           0x01,               // Access Size
                                           )
                                   }, 

                                   One, 
                                   0x03, 
                                   0x03E8
                               }, 

                               Package (0x04)
                               {
                                   ResourceTemplate ()
                                   {
                                       Register (SystemIO, 
                                           0x08,               // Bit Width
                                           0x00,               // Bit Offset
                                           0x0000000000000414, // Address
                                           ,)
                                   }, 

                                   0x02, 
                                   0xCD, 
                                   0x01F4
                               }, 

                               Package (0x04)
                               {
                                   ResourceTemplate ()
                                   {
                                       Register (SystemIO, 
                                           0x08,               // Bit Width
                                           0x00,               // Bit Offset
                                           0x0000000000000415, // Address
                                           ,)
                                   }, 

                                   0x03, 
                                   0xF5, 
                                   0x015E
                               }
                           })
                       }

                       Return (Package (0x03)
                       {
                           0x02, 
                           Package (0x04)
                           {
                               ResourceTemplate ()
                               {
                                   Register (FFixedHW, 
                                       0x01,               // Bit Width
                                       0x02,               // Bit Offset
                                       0x0000000000000000, // Address
                                       0x01,               // Access Size
                                       )
                               }, 

                               One, 
                               0x03, 
                               0x03E8
                           }, 

                           Package (0x04)
                           {
                               ResourceTemplate ()
                               {
                                   Register (SystemIO, 
                                       0x08,               // Bit Width
                                       0x00,               // Bit Offset
                                       0x0000000000000415, // Address
                                       ,)
                               }, 

                               0x03, 
                               0xF5, 
                               0x015E
                           }
                       })
                   }

                   If (And (CFGD, 0x40))
                   {
                       Return (Package (0x03)
                       {
                           0x02, 
                           Package (0x04)
                           {
                               ResourceTemplate ()
                               {
                                   Register (FFixedHW, 
                                       0x01,               // Bit Width
                                       0x02,               // Bit Offset
                                       0x0000000000000000, // Address
                                       0x01,               // Access Size
                                       )
                               }, 

                               One, 
                               0x03, 
                               0x03E8
                           }, 

                           Package (0x04)
                           {
                               ResourceTemplate ()
                               {
                                   Register (SystemIO, 
                                       0x08,               // Bit Width
                                       0x00,               // Bit Offset
                                       0x0000000000000414, // Address
                                       ,)
                               }, 

                               0x02, 
                               0xCD, 
                               0x01F4
                           }
                       })
                   }

                   Return (Package (0x02)
                   {
                       One, 
                       Package (0x04)
                       {
                           ResourceTemplate ()
                           {
                               Register (FFixedHW, 
                                   0x01,               // Bit Width
                                   0x02,               // Bit Offset
                                   0x0000000000000000, // Address
                                   0x01,               // Access Size
                                   )
                           }, 

                           One, 
                           0x03, 
                           0x03E8
                       }
                   })
               }

               If (And (CFGD, 0x0200))
               {
                   Return (Package (0x03)
                   {
                       0x02, 
                       Package (0x04)
                       {
                           ResourceTemplate ()
                           {
                               Register (FFixedHW, 
                                   0x01,               // Bit Width
                                   0x02,               // Bit Offset
                                   0x0000000000000000, // Address
                                   0x01,               // Access Size
                                   )
                           }, 

                           One, 
                           0x03, 
                           0x03E8
                       }, 

                       Package (0x04)
                       {
                           ResourceTemplate ()
                           {
                               Register (SystemIO, 
                                   0x08,               // Bit Width
                                   0x00,               // Bit Offset
                                   0x0000000000000415, // Address
                                   ,)
                           }, 

                           0x03, 
                           0xF5, 
                           0x015E
                       }
                   })
               }

               Return (Package (0x02)
               {
                   One, 
                   Package (0x04)
                   {
                       ResourceTemplate ()
                       {
                           Register (FFixedHW, 
                               0x01,               // Bit Width
                               0x02,               // Bit Offset
                               0x0000000000000000, // Address
                               0x01,               // Access Size
                               )
                       }, 

                       One, 
                       0x03, 
                       0x03E8
                   }
               })
           }

           If (LNot (PWRS))
           {
               If (And (CFGD, 0x20000000))
               {
                   If (And (CFGD, 0x40))
                   {
                       Return (Package (0x04)
                       {
                           0x03, 
                           Package (0x04)
                           {
                               ResourceTemplate ()
                               {
                                   Register (FFixedHW, 
                                       0x00,               // Bit Width
                                       0x00,               // Bit Offset
                                       0x0000000000000000, // Address
                                       ,)
                               }, 

                               One, 
                               0x03, 
                               0x03E8
                           }, 

                           Package (0x04)
                           {
                               ResourceTemplate ()
                               {
                                   Register (SystemIO, 
                                       0x08,               // Bit Width
                                       0x00,               // Bit Offset
                                       0x0000000000000414, // Address
                                       ,)
                               }, 

                               0x02, 
                               0xCD, 
                               0x01F4
                           }, 

                           Package (0x04)
                           {
                               ResourceTemplate ()
                               {
                                   Register (SystemIO, 
                                       0x08,               // Bit Width
                                       0x00,               // Bit Offset
                                       0x0000000000000416, // Address
                                       ,)
                               }, 

                               0x03, 
                               0xF5, 
                               0xC8
                           }
                       })
                   }

                   Return (Package (0x03)
                   {
                       0x02, 
                       Package (0x04)
                       {
                           ResourceTemplate ()
                           {
                               Register (FFixedHW, 
                                   0x00,               // Bit Width
                                   0x00,               // Bit Offset
                                   0x0000000000000000, // Address
                                   ,)
                           }, 

                           One, 
                           0x03, 
                           0x03E8
                       }, 

                       Package (0x04)
                       {
                           ResourceTemplate ()
                           {
                               Register (SystemIO, 
                                   0x08,               // Bit Width
                                   0x00,               // Bit Offset
                                   0x0000000000000416, // Address
                                   ,)
                           }, 

                           0x03, 
                           0xF5, 
                           0xC8
                       }
                   })
               }

               If (And (CFGD, 0x0200))
               {
                   If (And (CFGD, 0x40))
                   {
                       Return (Package (0x04)
                       {
                           0x03, 
                           Package (0x04)
                           {
                               ResourceTemplate ()
                               {
                                   Register (FFixedHW, 
                                       0x00,               // Bit Width
                                       0x00,               // Bit Offset
                                       0x0000000000000000, // Address
                                       ,)
                               }, 

                               One, 
                               0x03, 
                               0x03E8
                           }, 

                           Package (0x04)
                           {
                               ResourceTemplate ()
                               {
                                   Register (SystemIO, 
                                       0x08,               // Bit Width
                                       0x00,               // Bit Offset
                                       0x0000000000000414, // Address
                                       ,)
                               }, 

                               0x02, 
                               0xCD, 
                               0x01F4
                           }, 

                           Package (0x04)
                           {
                               ResourceTemplate ()
                               {
                                   Register (SystemIO, 
                                       0x08,               // Bit Width
                                       0x00,               // Bit Offset
                                       0x0000000000000415, // Address
                                       ,)
                               }, 

                               0x03, 
                               0xF5, 
                               0x015E
                           }
                       })
                   }

                   Return (Package (0x03)
                   {
                       0x02, 
                       Package (0x04)
                       {
                           ResourceTemplate ()
                           {
                               Register (FFixedHW, 
                                   0x00,               // Bit Width
                                   0x00,               // Bit Offset
                                   0x0000000000000000, // Address
                                   ,)
                           }, 

                           One, 
                           0x03, 
                           0x03E8
                       }, 

                       Package (0x04)
                       {
                           ResourceTemplate ()
                           {
                               Register (SystemIO, 
                                   0x08,               // Bit Width
                                   0x00,               // Bit Offset
                                   0x0000000000000415, // Address
                                   ,)
                           }, 

                           0x03, 
                           0xF5, 
                           0x015E
                       }
                   })
               }

               If (And (CFGD, 0x40))
               {
                   Return (Package (0x03)
                   {
                       0x02, 
                       Package (0x04)
                       {
                           ResourceTemplate ()
                           {
                               Register (FFixedHW, 
                                   0x00,               // Bit Width
                                   0x00,               // Bit Offset
                                   0x0000000000000000, // Address
                                   ,)
                           }, 

                           One, 
                           0x03, 
                           0x03E8
                       }, 

                       Package (0x04)
                       {
                           ResourceTemplate ()
                           {
                               Register (SystemIO, 
                                   0x08,               // Bit Width
                                   0x00,               // Bit Offset
                                   0x0000000000000414, // Address
                                   ,)
                           }, 

                           0x02, 
                           0xCD, 
                           0x01F4
                       }
                   })
               }

               Return (Package (0x02)
               {
                   One, 
                   Package (0x04)
                   {
                       ResourceTemplate ()
                       {
                           Register (FFixedHW, 
                               0x00,               // Bit Width
                               0x00,               // Bit Offset
                               0x0000000000000000, // Address
                               ,)
                       }, 

                       One, 
                       0x03, 
                       0x03E8
                   }
               })
           }

           If (And (CFGD, 0x0200))
           {
               Return (Package (0x03)
               {
                   0x02, 
                   Package (0x04)
                   {
                       ResourceTemplate ()
                       {
                           Register (FFixedHW, 
                               0x00,               // Bit Width
                               0x00,               // Bit Offset
                               0x0000000000000000, // Address
                               ,)
                       }, 

                       One, 
                       0x03, 
                       0x03E8
                   }, 

                   Package (0x04)
                   {
                       ResourceTemplate ()
                       {
                           Register (SystemIO, 
                               0x08,               // Bit Width
                               0x00,               // Bit Offset
                               0x0000000000000415, // Address
                               ,)
                       }, 

                       0x03, 
                       0xF5, 
                       0x015E
                   }
               })
           }

           If (And (CFGD, 0x40))
           {
               Return (Package (0x03)
               {
                   0x02, 
                   Package (0x04)
                   {
                       ResourceTemplate ()
                       {
                           Register (FFixedHW, 
                               0x00,               // Bit Width
                               0x00,               // Bit Offset
                               0x0000000000000000, // Address
                               ,)
                       }, 

                       One, 
                       0x03, 
                       0x03E8
                   }, 

                   Package (0x04)
                   {
                       ResourceTemplate ()
                       {
                           Register (SystemIO, 
                               0x08,               // Bit Width
                               0x00,               // Bit Offset
                               0x0000000000000414, // Address
                               ,)
                       }, 

                       0x02, 
                       0xCD, 
                       0x01F4
                   }
               })
           }

           Return (Package (0x02)
           {
               One, 
               Package (0x04)
               {
                   ResourceTemplate ()
                   {
                       Register (FFixedHW, 
                           0x00,               // Bit Width
                           0x00,               // Bit Offset
                           0x0000000000000000, // Address
                           ,)
                   }, 

                   One, 
                   0x03, 
                   0x03E8
               }
           })
       }

The red blocks are skipped on the HP due to the simple fact that And (0x01230653, 0x20000000) returns false. The green parts is what I use now, but I still don't have CSTInfo. Probably because AppleProfileOSHooks.kexts isn't loading anymore, and I have yet to figure out why. Anyone? I do have an older ioreg of the HP where it was loaded. Fun. Now I have to figure out if this is related to the changed kexts, the modified kernel or my modified DSDT. No fun actually :pirate2:

 

Update: I messed up. Had to restore a few modified kexts and all was fine again.

 

And now that we know that bits 3 and 4 are set we can strip Method PNOT even further – I already removed everything related to the non existing logical cores [4, 5, 6 and 7). Here's the original method, with the usual coloration:

    Method (PNOT, 0, Serialized)
   {
       [color="#FF0000"]If (LGreater (TCNT, One)) // More than one Core?
       {
           If (And (PDC0, 0x08)) // Bit 3 set (true on the HP)?
           {[/color]
               Notify (\_PR.CPU0, 0x80)
               [color="#FF0000"]If (And (PDC0, 0x10)) // Bit 4 set (true on the HP)?
               {[/color]
                   Sleep (0x64)
                   Notify (\_PR.CPU0, 0x81)
               [color="#FF0000"]}[/color]

               Sleep (0x64)
               Notify (\_PR.CPU0, 0x82)
           [color="#FF0000"]}

           If (And (PDC1, 0x08))
           {[/color]
               Notify (\_PR.CPU1, 0x80)
               [color="#FF0000"]If (And (PDC1, 0x10))
               {[/color]
                   Sleep (0x64)
                   Notify (\_PR.CPU1, 0x81)
               [color="#FF0000"]}[/color]

               Sleep (0x64)
               Notify (\_PR.CPU1, 0x82)
           [color="#FF0000"]}

           If (And (PDC2, 0x08))
           {[/color]
               Notify (\_PR.CPU2, 0x80)
               [color="#FF0000"]If (And (PDC2, 0x10))
               {[/color]
                   Sleep (0x64)
                   Notify (\_PR.CPU2, 0x81)
               [color="#FF0000"]}[/color]

               Sleep (0x64)
               Notify (\_PR.CPU2, 0x82)
           [color="#FF0000"]}

           If (And (PDC3, 0x08))
           {[/color]
               Notify (\_PR.CPU3, 0x80)
               [color="#FF0000"]If (And (PDC3, 0x10))
               {[/color]
                   Sleep (0x64)
                   Notify (\_PR.CPU3, 0x81)
               [color="#FF0000"]}[/color]

               Sleep (0x64)
               Notify (\_PR.CPU3, 0x82)
           [color="#FF0000"]}

           If (And (PDC4, 0x08)) // From here on it is pointless for CPU's with 4 logical cores only!
           {
               Notify (\_PR.CPU4, 0x80)
               If (And (PDC4, 0x10))
               {
                   Sleep (0x64)
                   Notify (\_PR.CPU4, 0x81)
               }

               Sleep (0x64)
               Notify (\_PR.CPU4, 0x82)
           }

           If (And (PDC5, 0x08))
           {
               Notify (\_PR.CPU5, 0x80)
               If (And (PDC5, 0x10))
               {
                   Sleep (0x64)
                   Notify (\_PR.CPU5, 0x81)
               }

               Sleep (0x64)
               Notify (\_PR.CPU5, 0x82)
           }

           If (And (PDC6, 0x08))
           {
               Notify (\_PR.CPU6, 0x80)
               If (And (PDC6, 0x10))
               {
                   Sleep (0x64)
                   Notify (\_PR.CPU6, 0x81)
               }

               Sleep (0x64)
               Notify (\_PR.CPU6, 0x82)
           }

           If (And (PDC7, 0x08))
           {
               Notify (\_PR.CPU7, 0x80)
               If (And (PDC7, 0x10))
               {
                   Sleep (0x64)
                   Notify (\_PR.CPU7, 0x81)
               }

               Sleep (0x64)
               Notify (\_PR.CPU7, 0x82)
           }
       }
       Else // Single Core?
       {
           Notify (\_PR.CPU0, 0x80)
           Sleep (0x64)
           Notify (\_PR.CPU0, 0x81)
           Sleep (0x64)
           Notify (\_PR.CPU0, 0x82)
       }[/color]
   }

Simply remove all the red lines. This also means that we can remove the following lines at the top of the DSDT:

	External (PDC7)
External (PDC6)
External (PDC5)
External (PDC4)
External (PDC3)
External (PDC2)
External (PDC1)
External (PDC0)
External (\_PR_.CPU0._PPC)

We no longer need them. And with this latest bombshell I say; Sayonara. This is basically it for today :D

 

Note: We should add a better, clearer description of how we checked that certain bits were set in PDC0 because I am sure that we, or someone else reading this, may need this in the (near) future. And to be quite honest... I can't recall it and thus we clearly need it.

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DSDT Patching - Part III

 

I want to share the latest and greatest _PR scope:

    Scope (_PR)
   {
       Name (PSD, Package (0x05) { 0x05, Zero, Zero, 0xFC, 0x04 })

       Name (PSS, Package (0x0B)
       { 
           Package (0x06) { /* 2266 */ Zero, Zero, 0x10, 0x10, 0x48DA, Zero }, 
           Package (0x06) { /* 2133 */ Zero, Zero, 0x10, 0x10, 0x0855, One  }, 
           Package (0x06) { /* 1999 */ Zero, Zero, 0x10, 0x10, 0x47CF, 0x02 }, 
           Package (0x06) { /* 1866 */ Zero, Zero, 0x10, 0x10, 0x074A, 0x03 }, 
           Package (0x06) { /* 1733 */ Zero, Zero, 0x10, 0x10, 0x46C5, 0x04 }, 
           Package (0x06) { /* 1599 */ Zero, Zero, 0x10, 0x10, 0x063F, 0x05 }, 
           Package (0x06) { /* 1466 */ Zero, Zero, 0x10, 0x10, 0x45BA, 0x06 }, 
           Package (0x06) { /* 1333 */ Zero, Zero, 0x10, 0x10, 0x0535, 0x07 }, 
           Package (0x06) { /* 1199 */ Zero, Zero, 0x10, 0x10, 0x45AF, 0x08 }, 
           Package (0x06) { /* 1066 */ Zero, Zero, 0x10, 0x10, 0x042A, 0x09 }, 
           Package (0x06) { /*  933 */ Zero, Zero, 0x10, 0x10, 0x03A5, 0x0A }
       })

       Method (MCST, 0, NotSerialized)
       {
           Name (CST1, Package (0x04)
           {
               ResourceTemplate ()
               {
                   Register (FFixedHW, 
                       0x01,               // Bit Width
                       0x02,               // Bit Offset
                       0x0000000000000000, // Address
                       0x01,               // Access Size
                       )
               }, 

               One, 
               0x03, 
               0x03E8
           })

           Name (CST2, Package (0x04)
           {
               ResourceTemplate ()
               {
                   Register (FFixedHW, 
                       0x01,               // Bit Width
                       0x02,               // Bit Offset
                       0x0000000000000010, // Address
                       0x03,               // Access Size
                       )
               }, 

               0x02, 
               0xCD, 
               0x01F4
           })

           Name (CST3, Package (0x04)
           {
               ResourceTemplate ()
               {
                   Register (FFixedHW, 
                       0x01,               // Bit Width
                       0x02,               // Bit Offset
                       0x0000000000000020, // Address
                       0x03,               // Access Size
                       )
               }, 

               0x03, 
               0xF5, 
               0x015E
           })

           If (LNot (PWRS))
           {
               Return (Package (0x04)
               {
                   0x03, 
                   CST1,
                   CST2, 
                   CST3
               })
           }
           Else
           {
               Return (Package (0x03)
               {
                   0x02, 
                   CST1,
                   CST3
               })
           }
       }

       Processor (CPU0, 0x01, 0x00000410, 0x06)
       {
           Alias (PSS, _PSS)
           Alias (PSD, _PSD)

           Method (_CST, 0, NotSerialized)
           {
              Return (\_PR.MCST ())
           }
       }

       Processor (CPU1, 0x02, 0x00000410, 0x06)
       {
           Alias (PSS, _PSS)
           Alias (PSD, _PSD)

           Method (_CST, 0, NotSerialized)
           {
              Return (\_PR.MCST ())
           }
       }

       Processor (CPU2, 0x03, 0x00000410, 0x06)
       {
           Alias (PSS, _PSS)
           Alias (PSD, _PSD)

           Method (_CST, 0, NotSerialized)
           {
              Return (\_PR.MCST ())
           }
       }

       Processor (CPU3, 0x04, 0x00000410, 0x06)
       {
           Alias (PSS, _PSS)
           Alias (PSD, _PSD)

           Method (_CST, 0, NotSerialized)
           {
              Return (\_PR.MCST ())
           }
       }
   }

This new style is used to prevent code duplication. To limit / reduce the number of resulting AML bytes, and it is also surprisingly easy to understand. Thanks to MC for writing this basic skeleton, enabling us to make use of it. Let's move this piece of AML code into a new in memory SSDT for Revolution, but any boot loader capable of loading / overriding ACPI tables – think Chameleon – will do the job.

 

Hmm. There's something weird showing up in system.log It's this what we like to see fixed:

configd[14]: network configuration changed.
configd[14]: InterfaceNamer: timed out waiting for IOKit to quiesce
configd[14]: InterfaceNamer: Busy services :
configd[14]: InterfaceNamer:   MacBookPro6,1 [1]
configd[14]: InterfaceNamer:   MacBookPro6,1/AppleACPIPlatformExpert [5]

configd[14]: InterfaceNamer:   MacBookPro6,1/AppleACPIPlatformExpert/CPU0@0 [1]
configd[14]: InterfaceNamer:   MacBookPro6,1/AppleACPIPlatformExpert/CPU0@0/AppleACPICPU [2]

configd[14]: InterfaceNamer:   MacBookPro6,1/AppleACPIPlatformExpert/CPU1@1 [1]
configd[14]: InterfaceNamer:   MacBookPro6,1/AppleACPIPlatformExpert/CPU1@1/AppleACPICPU [2]

configd[14]: InterfaceNamer:   MacBookPro6,1/AppleACPIPlatformExpert/CPU2@4 [1]
configd[14]: InterfaceNamer:   MacBookPro6,1/AppleACPIPlatformExpert/CPU2@4/AppleACPICPU [2]

configd[14]: InterfaceNamer:   MacBookPro6,1/AppleACPIPlatformExpert/CPU3@5 [1]
configd[14]: InterfaceNamer:   MacBookPro6,1/AppleACPIPlatformExpert/CPU3@5/AppleACPICPU [2]

configd[14]: InterfaceNamer:   MacBookPro6,1/AppleACPIPlatformExpert/PCI0@0 [1]
configd[14]: InterfaceNamer:   MacBookPro6,1/AppleACPIPlatformExpert/PCI0@0/AppleACPIPCI [1]
configd[14]: InterfaceNamer:   MacBookPro6,1/AppleACPIPlatformExpert/PCI0@0/AppleACPIPCI/MCHC [2]

That can't be good. Might explain why booting takes so long. Let's investigate this.

 

Update:

 

Got a tip saying: "Enter the following terminal command":

sudo rm -r /System/Library/Extensions/AppleProfileFamily.kext/Contents/PlugIns/AppleIntel*Profile.kext

 

After this the boot time is great. Even from the external 2.5" USB connected HDD. There's this option to patch the kernel but we'll leave it for what it is. We're fine with it as is. BTW. Restart is now also a lot more responsive.

 

Another tip was to restore the unmodified kexts. So we did. And there it is. CSTInfo (Number) 0x1240105 is back. And so is IOHWControl This means that IOHWControl.kext is loading again. Perfect :(

 

BTW: Ever wondered about the meaning of CSTInfo? I did, and I have read all 89 pages (seriously) of the Intel SpeedStep thread. Want to know? Great. Read this. Still don't know what it does? Ok. Apple's OSPM (OS Power Management) calls Method (_PSD) {} in our DSDT to initialize certain variables and trigger other Methods. This to prepare it for Power Management. It's all a bit difficult to explain, but just leave it for the time being.

 

I now also did some MC voodoo with the new _PR scope. Turned it into a separate SSDT table (ssdt-pr.dsl). Here is mine:

/*
* Intel ACPI Component Architecture
* AML Disassembler version 20080926
*
* Disassembly of ssdt-pr.aml, Mon Nov 8 06:05:00 2010
*
*
* Original Table Header:
*     Signature        "SSDT"
*     Length           0x00000156 (342)
*     Revision         0x01
*     Checksum         0x67
*     OEM ID           "PmRef"
*     OEM Table ID     "CpuPm"
*     OEM Revision     0x00001000 (1)
*     Compiler ID      "INTL"
*     Compiler Version 0x20080926 (537397542)
*/
DefinitionBlock ("ssdt-pr.aml", "SSDT", 1, "PmRef", "CpuPm", 0x00001000)
{
   External (PWRS)	// PoWeR Status aka AC / BAT0 Power State.
   External (_PR.CPU0, DeviceObj)
   External (_PR.CPU1, DeviceObj)
   External (_PR.CPU2, DeviceObj)
   External (_PR.CPU3, DeviceObj)

   Scope (_PR)
   {
       Name (PSD, Package (0x05) { 0x05, Zero, Zero, 0xFC, 0x04 })

       Name (PSS, Package (0x0B)
       { 
           Package (0x06) { /* 2266 */ Zero, Zero, 0x10, 0x10, 0x48DA, Zero }, 
           Package (0x06) { /* 2133 */ Zero, Zero, 0x10, 0x10, 0x0855, One  }, 
           Package (0x06) { /* 1999 */ Zero, Zero, 0x10, 0x10, 0x47CF, 0x02 }, 
           Package (0x06) { /* 1866 */ Zero, Zero, 0x10, 0x10, 0x074A, 0x03 }, 
           Package (0x06) { /* 1733 */ Zero, Zero, 0x10, 0x10, 0x46C5, 0x04 }, 
           Package (0x06) { /* 1599 */ Zero, Zero, 0x10, 0x10, 0x063F, 0x05 }, 
           Package (0x06) { /* 1466 */ Zero, Zero, 0x10, 0x10, 0x45BA, 0x06 }, 
           Package (0x06) { /* 1333 */ Zero, Zero, 0x10, 0x10, 0x0535, 0x07 }, 
           Package (0x06) { /* 1199 */ Zero, Zero, 0x10, 0x10, 0x45AF, 0x08 }, 
           Package (0x06) { /* 1066 */ Zero, Zero, 0x10, 0x10, 0x042A, 0x09 }, 
           Package (0x06) { /*  933 */ Zero, Zero, 0x10, 0x10, 0x03A5, 0x0A }
       })

       Method (MCST, 0, NotSerialized)
       {
           Name (CST1, Package (0x04)
           {
               ResourceTemplate ()
               {
                   Register (FFixedHW, 
                       0x01,               // Bit Width
                       0x02,               // Bit Offset
                       0x0000000000000000, // Address
                       0x01,               // Access Size
                       )
               }, 

               One, 
               0x03, 
               0x03E8
           })

           Name (CST2, Package (0x04)
           {
               ResourceTemplate ()
               {
                   Register (FFixedHW, 
                       0x01,               // Bit Width
                       0x02,               // Bit Offset
                       0x0000000000000010, // Address
                       0x03,               // Access Size
                       )
               }, 

               0x02, 
               0xCD, 
               0x01F4
           })

           Name (CST3, Package (0x04)
           {
               ResourceTemplate ()
               {
                   Register (FFixedHW, 
                       0x01,               // Bit Width
                       0x02,               // Bit Offset
                       0x0000000000000020, // Address
                       0x03,               // Access Size
                       )
               }, 

               0x03, 
               0xF5, 
               0x015E
           })

           If (LNot (PWRS))
           {
               Return (Package (0x04)
               {
                   0x03, 
                   CST1,
                   CST2, 
                   CST3
               })
           }
           Else
           {
               Return (Package (0x03)
               {
                   0x02, 
                   CST1,
                   CST3
               })
           }
       }
   }

   /***
     * We could use a Processor declaration block here, and not have it in 
     * the DSDT, but it is safer to use Scope (_PR.CPUn) instead. This way 
     * we won't break booting when we mess up something.
     */

   Scope (_PR.CPU0)
   {
       Alias (PSS, _PSS)
       Alias (PSD, _PSD)

       Method (_CST, 0, NotSerialized)
       {
           Return (\_PR.MCST ())
       }
   }

   Scope (_PR.CPU1)
   {
       Alias (PSS, _PSS)
       Alias (PSD, _PSD)

       Method (_CST, 0, NotSerialized)
       {
           Return (\_PR.MCST ())
       }
   }

   Scope (_PR.CPU2)
   {
       Alias (PSS, _PSS)
       Alias (PSD, _PSD)

       Method (_CST, 0, NotSerialized)
       {
           Return (\_PR.MCST ())
       }
   }

   Scope (_PR.CPU3)
   {
       Alias (PSS, _PSS)
       Alias (PSD, _PSD)

       Method (_CST, 0, NotSerialized)
       {
           Return (\_PR.MCST ())
       }
   }
}

And used MC's aml2struct.sh to convert it into the following structure for Revolution (boot loader):

/* ssdt-pr.aml (564 bytes) converted with aml2struct.sh into little endian format. */
static uint32_t SSDT_PR_Table[] = 
{
0x54445353, 0x00000234, 0x6D508201, 0x00666552, 0x50757043, 0x0000006D, 0x00001000, 0x4C544E49, 
0x20100915, 0x5F154310, 0x085F5250, 0x5F445350, 0x0A050A12, 0x0A000005, 0x08040AFC, 0x5F535350, 
0x0B094B12, 0x00060C12, 0x0A100A00, 0x48DA0B10, 0x060C1200, 0x100A0000, 0x550B100A, 0x0D120108, 
0x0A000006, 0x0B100A10, 0x020A47CF, 0x00060D12, 0x0A100A00, 0x074A0B10, 0x0D12030A, 0x0A000006, 
0x0B100A10, 0x040A46C5, 0x00060D12, 0x0A100A00, 0x063F0B10, 0x0D12050A, 0x0A000006, 0x0B100A10, 
0x060A45BA, 0x00060D12, 0x0A100A00, 0x05350B10, 0x0D12070A, 0x0A000006, 0x0B100A10, 0x080A45AF, 
0x00060D12, 0x0A100A00, 0x042A0B10, 0x0D12090A, 0x0A000006, 0x0B100A10, 0x0A0A03A5, 0x4D094B14, 
0x00545343, 0x54534308, 0x041D1231, 0x110A1411, 0x7F000C82, 0x00010201, 0x00000000, 0x79000000, 
0x030A0100, 0x0803E80B, 0x32545343, 0x11041E12, 0x82110A14, 0x017F000C, 0x00100302, 0x00000000, 
0x00790000, 0xCD0A020A, 0x0801F40B, 0x33545343, 0x11041E12, 0x82110A14, 0x017F000C, 0x00200302, 
0x00000000, 0x00790000, 0xF50A030A, 0xA0015E0B, 0x57509218, 0x12A45352, 0x030A0410, 0x31545343, 
0x32545343, 0x33545343, 0x12A40FA1, 0x020A030C, 0x31545343, 0x33545343, 0x5F2E2E10, 0x435F5250, 
0x06305550, 0x5F535350, 0x5353505F, 0x44535006, 0x53505F5F, 0x5F111444, 0x00545343, 0x5F2E5CA4, 
0x4D5F5250, 0x10545343, 0x505F2E2E, 0x50435F52, 0x50063155, 0x5F5F5353, 0x06535350, 0x5F445350, 
0x4453505F, 0x435F1114, 0xA4005453, 0x505F2E5C, 0x434D5F52, 0x2E105453, 0x52505F2E, 0x5550435F, 
0x53500632, 0x505F5F53, 0x50065353, 0x5F5F4453, 0x14445350, 0x53435F11, 0x5CA40054, 0x52505F2E, 
0x53434D5F, 0x2E2E1054, 0x5F52505F, 0x33555043, 0x53535006, 0x53505F5F, 0x53500653, 0x505F5F44, 
0x11144453, 0x5453435F, 0x2E5CA400, 0x5F52505F, 0x5453434D
};

And thus all we have left in the HP DSDT (for the _PR scope) is this:

	Scope (_PR)
{
	Processor (CPU0, 0x01, 0x00000410, 0x06) {}
	Processor (CPU1, 0x02, 0x00000410, 0x06) {}
	Processor (CPU2, 0x03, 0x00000410, 0x06) {}
	Processor (CPU3, 0x04, 0x00000410, 0x06) {}
}

Such a joy to have all these examples handy. Cool he?

 

Next up... Apple's UsbExcd. Same kind of treatment. This time however we copied two devices, being EHC1 and EHC2 out of the DSDT into our new SSDT table. We also use an Apple header to make it look real.

/*
* Intel ACPI Component Architecture
* AML Disassembler version 20100915
*
* Disassembly of ssdt-usb.aml, Mon Nov 8 7:00:00 2010
*
* Original Table Header:
*     Signature        "SSDT"
*     Length           0x0000051F (1311)
*     Revision         0x01
*     Checksum         0xC7
*     OEM ID           "APPLE "
*     OEM Table ID     "UsbExcd"
*     OEM Revision     0x00001000 (4096)
*     Compiler ID      "INTL"
*     Compiler Version 0x20061109 (537268489)
*/

DefinitionBlock ("ssdt-usb.aml", "SSDT", 1, "APPLE ", "UsbExcd", 0x00001000)
{
   External (WTR1)
   External (WTR2)
   External (\_SB.PCI0, DeviceObj)
   External (\_SB.PCI0.LPCB.EC.ADIN)

   Scope (\_SB.PCI0)
   {
       Device (EHC1)
       {
           Name (_ADR, 0x001D0000)
           Name (_S3D, 0x02)
           Name (_S4D, 0x02)
           Method (_PSW, 1, NotSerialized)
           {
               [color="#FF8C00"]If (Arg0)
               {
                   If (\_SB.PCI0.LPCB.EC.ADIN)
                   {
                       Store (Zero, WTR2)
                   }
                   Else
                   {
                       Store (0x0F, WTR2)
                   }
               }
               Else
               {
                   Store (0x0F, WTR2)
               }[/color]
           }

           Device (HUBN)
           {
               Name (_ADR, Zero)
               Device (PRTA)
               {
                   Name (_ADR, One)
                   Name (_UPC, Package (0x04)
                   {
                       0xFF, 
                       0xFF, 
                       Zero, 
                       Zero
                   })
                   Name (_PLD, Package (0x04)
                   {
                       0x81, 
                       Zero, 
                       0x30, 
                       Zero
                   })
                   Name (_RMV, Zero)
                   Device (PRT1)
                   {
                       Name (_ADR, One)
                   }

                   Device (PRT2)
                   {
                       Name (_ADR, 0x02)
                   }

                   Device (PRT3)
                   {
                       Name (_ADR, 0x03)
                   }
               }

               Device (PRTB)
               {
                   Name (_ADR, 0x02)
                   Name (_UPC, Package (0x04)
                   {
                       0xFF, 
                       0xFF, 
                       Zero, 
                       Zero
                   })
                   Name (_PLD, Package (0x04)
                   {
                       0x81, 
                       Zero, 
                       0x30, 
                       Zero
                   })
                   Name (_RMV, Zero)
               }
           }

           Name (_PRW, Package (0x02)
           {
               0x0D, 
               0x03
           })
       }

       Device (EHC2)
       {
           Name (_ADR, 0x001A0000)
           Name (_S3D, 0x02)
           Name (_S4D, 0x02)
           Method (_PSW, 1, NotSerialized)
           {
               [color="#FF8C00"]If (Arg0)
               {
                   If (\_SB.PCI0.LPCB.EC.ADIN)
                   {
                       Store (Zero, WTR1)
                   }
                   Else
                   {
                       Store (0x0F, WTR1)
                   }
               }
               Else
               {
                   Store (0x0F, WTR1)
               }[/color]
           }

           Device (HUBN)
           {
               Name (_ADR, Zero)
               Device (PRTA)
               {
                   Name (_ADR, One)
                   Name (_UPC, Package (0x04)
                   {
                       0xFF, 
                       0xFF, 
                       Zero, 
                       Zero
                   })
                   Name (_PLD, Package (0x04)
                   {
                       0x81, 
                       Zero, 
                       0x30, 
                       Zero
                   })
                   Name (_RMV, Zero)
                   Device (PRT1)
                   {
                       Name (_ADR, One)
                       Name (_UPC, Package (0x04)
                       {
                           0xFF, 
                           0xFF, 
                           Zero, 
                           Zero
                       })
                       Name (_PLD, Package (0x04)
                       {
                           0x81, 
                           Zero, 
                           0x30, 
                           Zero
                       })
                   }

                   Device (PRT3)
                   {
                       Name (_ADR, 0x03)
                       Name (_UPC, Package (0x04)
                       {
                           0xFF, 
                           0xFF, 
                           Zero, 
                           Zero
                       })
                       Name (_PLD, Package (0x04)
                       {
                           0x81, 
                           Zero, 
                           0x30, 
                           Zero
                       })
                   }

                   Device (PRT4)
                   {
                       Name (_ADR, 0x04)
                       Name (_UPC, Package (0x04)
                       {
                           0xFF, 
                           0xFF, 
                           Zero, 
                           Zero
                       })
                       Name (_PLD, Package (0x04)
                       {
                           0x81, 
                           Zero, 
                           0x30, 
                           Zero
                       })
                   }

                   Device (PRT5)
                   {
                       Name (_ADR, 0x05)
                       Name (_UPC, Package (0x04)
                       {
                           0xFF, 
                           0xFF, 
                           Zero, 
                           Zero
                       })
                       Name (_PLD, Package (0x04)
                       {
                           0x81, 
                           Zero, 
                           0x30, 
                           Zero
                       })
                   }
               }

               Device (PRTB)
               {
                   Name (_ADR, 0x02)
                   Name (_UPC, Package (0x04)
                   {
                       0xFF, 
                       0xFF, 
                       Zero, 
                       Zero
                   })
                   Name (_PLD, Package (0x04)
                   {
                       0x81, 
                       Zero, 
                       0x30, 
                       Zero
                   })
                   Name (_RMV, Zero)
               }
           }

           Name (_PRW, Package (0x02)
           {
               0x0D, 
               0x03
           })
       }
   }
}

Notes: There's someone in out team trying to reduct this piece of DSL code so expect it to get even smaller. He starts by looking into the two similar code blocks (marked orange) and work up from there. Let's see what this brings.

 

And here's the converted table for Revolution:

/* ssdt-usb.aml (683 bytes) converted with aml2struct.sh into little endian format. */
static uint32_t SSDT_USB_Table[] = 
{
0x54445353, 0x000002AB, 0x50416601, 0x20454C50, 0x45627355, 0x00646378, 0x00001000, 0x4C544E49, 
0x20100915, 0x5C284610, 0x42535F2E, 0x4943505F, 0x4C825B30, 0x4348450F, 0x415F0831, 0x000C5244, 
0x08001D00, 0x4433535F, 0x5F08020A, 0x0A443453, 0x5F3A1402, 0x01575350, 0xA0682AA0, 0x052F5C1E, 
0x5F42535F, 0x30494350, 0x4243504C, 0x5F5F4345, 0x4E494441, 0x54570070, 0x08A13252, 0x570F0A70, 
0xA1325254, 0x0F0A7008, 0x32525457, 0x0945825B, 0x4E425548, 0x44415F08, 0x825B0052, 0x52500547, 
0x5F084154, 0x01524441, 0x50555F08, 0x04081243, 0xFF0AFF0A, 0x5F080000, 0x12444C50, 0x810A0408, 
0x00300A00, 0x4D525F08, 0x825B0056, 0x5452500B, 0x415F0831, 0x5B015244, 0x52500C82, 0x5F083254, 
0x0A524441, 0x0C825B02, 0x33545250, 0x44415F08, 0x5B030A52, 0x52502E82, 0x5F084254, 0x0A524441, 
0x555F0802, 0x08124350, 0x0AFF0A04, 0x080000FF, 0x444C505F, 0x0A040812, 0x300A0081, 0x525F0800, 
0x0800564D, 0x5752505F, 0x0A020612, 0x5B030A0D, 0x45174A82, 0x08324348, 0x5244415F, 0x1A00000C, 
0x535F0800, 0x020A4433, 0x34535F08, 0x14020A44, 0x53505F3A, 0x2AA00157, 0x5C1EA068, 0x535F052F, 
0x43505F42, 0x504C3049, 0x43454243, 0x44415F5F, 0x00704E49, 0x31525457, 0x0A7008A1, 0x5254570F, 
0x7008A131, 0x54570F0A, 0x825B3152, 0x55481143, 0x5F084E42, 0x00524441, 0x0D45825B, 0x41545250, 
0x44415F08, 0x5F080152, 0x12435055, 0xFF0A0408, 0x0000FF0A, 0x4C505F08, 0x04081244, 0x0A00810A, 
0x5F080030, 0x00564D52, 0x5027825B, 0x08315452, 0x5244415F, 0x555F0801, 0x08124350, 0x0AFF0A04, 
0x080000FF, 0x444C505F, 0x0A040812, 0x300A0081, 0x28825B00, 0x33545250, 0x44415F08, 0x08030A52, 
0x4350555F, 0x0A040812, 0x00FF0AFF, 0x505F0800, 0x0812444C, 0x00810A04, 0x5B00300A, 0x52502882, 
0x5F083454, 0x0A524441, 0x555F0804, 0x08124350, 0x0AFF0A04, 0x080000FF, 0x444C505F, 0x0A040812, 
0x300A0081, 0x28825B00, 0x35545250, 0x44415F08, 0x08050A52, 0x4350555F, 0x0A040812, 0x00FF0AFF, 
0x505F0800, 0x0812444C, 0x00810A04, 0x5B00300A, 0x52502E82, 0x5F084254, 0x0A524441, 0x555F0802, 
0x08124350, 0x0AFF0A04, 0x080000FF, 0x444C505F, 0x0A040812, 0x300A0081, 0x525F0800, 0x0800564D, 
0x5752505F, 0x0A020612, 0x00030A0D
};

Adding another Mac alike SSDT table. Please note that this doesn't change anything. Just a style nit to most people, but a great exercise for us.

 

[n]Corrections:[/b] Link to aml2struct.pl added and made some corrections in the text (use we instead of I). We also fixed the new _PR code because of a silly multiplier error in our _PSS data.

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thanks for the reply,I patched my AppleHDA but didn't get any good result.Maybe I can learn from here ,may I ask you something what is the value of these numbers colored green from hdef and how to get it? thanks.

 

If (LEqual (Arg0, Buffer (0x10)

{

/* 0000 */ 0xC6, 0xB7, 0xB5, 0xA0, 0x18, 0x13, 0x1C, 0x44,

/* 0008 */ 0xB0, 0xC9, 0xFE, 0x69, 0x5E, 0xAF, 0x94, 0x9B

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thanks for the reply,I patched my AppleHDA but didn't get any good result.Maybe I can learn from here ,may I ask you something what is the value of these numbers colored green from hdef and how to get it? thanks.

 

If (LEqual (Arg0, Buffer (0x10)

{

/* 0000 */ 0xC6, 0xB7, 0xB5, 0xA0, 0x18, 0x13, 0x1C, 0x44,

/* 0008 */ 0xB0, 0xC9, 0xFE, 0x69, 0x5E, 0xAF, 0x94, 0x9B

No problem. It should have been clear, but I guess not. Let me write up a short but clear 'edutorial' :)

 

Now. Think about these values as an index. Each line here is 8 bytes long and starts from zero (not one). And sometimes you may want to change the nth byte, and this way you don't have to count them all, just to reach the nth byte.

 

Let me add another example from the HP DSDT:

				/* 0000 */	0x34, 0xF0, 0xB7, 0x5F, 0x63, 0x2C, 0xE9, 0x45, 
			/* 0008 */	0xBE, 0x91, 0x3D, 0x44, 0xE2, 0xC7, 0x07, 0xE4, 
			/* 0010 */	0x41, 0x44, 0x01, 0x02, 0x79, 0x42, 0xF2, 0x95, 
			/* 0018 */	0x7B, 0x4D, 0x34, 0x43, 0x93, 0x87, 0xAC, 0xCD, 
			/* 0020 */	0xC6, 0x7E, 0xF6, 0x1C, 0x80, 0x00, 0x01, 0x08, 
			/* 0028 */	0x21, 0x12, 0x90, 0x05, 0x66, 0xD5, 0xD1, 0x11, 
			/* 0030 */	0xB2, 0xF0, 0x00, 0xA0, 0xC9, 0x06, 0x29, 0x10, 
			/* 0038 */	0x41, 0x45, 0x01, 0x00, 0xD4, 0x2B, 0x99, 0xD0, 
			/* 0040 */	0x7C, 0xA4, 0xFE, 0x4E, 0xB0, 0x72, 0x32, 0x4A, 
			/* 0048 */	0xEC, 0x92, 0x29, 0x6C, 0x42, 0x43, 0x01, 0x00

The first line starts at 0 and goes up to 7, and thus that is what you see in front of it. The next line starts at 8 – hence the use of 0008 – and goes up to f (8, 9, a, b, c, d, e, and f). The next lines might look harder to understand, but just pay attention to how it works. The next index values would be what? Right. 0050 and 0058 Easy huh?

 

This can also help you to calculate the buffer size for Buffer (BufSize) {} and the number of elements for Package (NumElements) {}. Please note however that both BufSize and NumElements can be left out. That is if Apple is following the ACPI specifications. Better include them, and when you do... at least use the correct value aka BufSize + 1 and/or NumElements +1.

 

Corrections: I changed the name of the length parameter into BufSize and NumElements. This to reflect the ACPI specification (link added) and I also changed the text a little, because this parameter can be left out (is optional) entirely.

 

I hope this help.

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No problem. It should have been clear, but I guess not. Let me write up a short but clear 'edutorial' :)

 

Now. Think about these values as an index. Each line here is 8 bytes long and starts from zero (not one). And sometimes you may want to change the nth byte, and this way you don't have to count them all, just to reach the nth byte.

 

Let me add another example from the HP DSDT:

				/* 0000 */	0x34, 0xF0, 0xB7, 0x5F, 0x63, 0x2C, 0xE9, 0x45, 
			/* 0008 */	0xBE, 0x91, 0x3D, 0x44, 0xE2, 0xC7, 0x07, 0xE4, 
			/* 0010 */	0x41, 0x44, 0x01, 0x02, 0x79, 0x42, 0xF2, 0x95, 
			/* 0018 */	0x7B, 0x4D, 0x34, 0x43, 0x93, 0x87, 0xAC, 0xCD, 
			/* 0020 */	0xC6, 0x7E, 0xF6, 0x1C, 0x80, 0x00, 0x01, 0x08, 
			/* 0028 */	0x21, 0x12, 0x90, 0x05, 0x66, 0xD5, 0xD1, 0x11, 
			/* 0030 */	0xB2, 0xF0, 0x00, 0xA0, 0xC9, 0x06, 0x29, 0x10, 
			/* 0038 */	0x41, 0x45, 0x01, 0x00, 0xD4, 0x2B, 0x99, 0xD0, 
			/* 0040 */	0x7C, 0xA4, 0xFE, 0x4E, 0xB0, 0x72, 0x32, 0x4A, 
			/* 0048 */	0xEC, 0x92, 0x29, 0x6C, 0x42, 0x43, 0x01, 0x00

The first line starts at 0 and goes up to 7, and thus that is what you see in front of it. The next line starts at 8 – hence the use of 0008 – and goes up to f (8, 9, a, b, c, d, e, and f). The next lines might look harder to understand, but just pay attention to how it works. The next index values would be what? Right. 0050 and 0058 Easy huh?

 

This can also help you to calculate the buffer size for Buffer (BufSize) {} and the number of elements for Package (NumElements) {}. Please note however that both BufSize and NumElements can be left out. That is if Apple is following the ACPI specifications. Better include them, and when you do... at least use the correct value aka BufSize + 1 and/or NumElements +1.

 

Corrections: I changed the name of the length parameter into BufSize and NumElements. This to reflect the ACPI specification (link added) and I also changed the text a little, because this parameter can be left out (is optional) entirely.

 

Thank you so much for your hard work I install 10.6.4 sl

my sony laptop VPCCEB37FD/B

Intel hd graphics give to me hard for longtime.also my dsdt not working i give you dump.dsl ple help me

http://www.insanelymac.com/forum/index.php?showtopic=237465

my email jeyanthan01@hotmail.com

thanks.

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Hi there. Can you post step by step how you went about to actually install Mac OS X 10.6 on your HP G72 laptop? I read your post but I am not technical and have no idea what you are talking about with all the technical things you do...

 

I recently bought an HP G72-B62US laptop. I've tried installing Mac OS X with the Install DVD and the USB flash drive method and they don't work. It'll boot from the Chameleon boot loader or [url=&quot;http://www.insanelymac.com/forum/topic/279450-why-insanelymac-does-not-support-tonymacx86/&quot;]#####[/url] or Mammoth 1.5 boot CD but whenever I get to the gray screen I get the "Reboot your computer by pressing and holding the power button" or something like that. I don't know what I is wrong because I've followed the install instructions from different methods and they all failed to fully boot up on my computer.

 

My spec is this:

HP G72-B62US

Intel Pentium P6100 dual core @ 2Ghz

4GB RAM

250GB 7200 RPM Hard drive

Intel HD Graphic

3 USB ports

1 HDMI port

1 Media card read slot

InsydeH2o BIOS version F.32

 

I have a 3 year-old Compaq with Mac OS X 10.5.8 on it and I can boot up from the Mac OS X 10.6 Install DVD, but just not my HP G72. However, it still won't let me install Mac OS X 10.6 on my Compaq because I get an error message from the installer that "Mac OS X can't be installed on this computer..." What am I doing wrong?

 

Thanks your your input.

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Hi,

Very Very Nice Walkthrough.

But, have you got some news for the WLAN ? BCM 4313 - PCI14e4,4727 ?

I bought a notebook Samsung Q530, with the same WLAN, and I can't work it.

Thank you for your time.

I hope in a your reply.

Bye bye.

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Hi there. Can you post step by step how you went about to actually install Mac OS X 10.6 on your HP G72 laptop? I read your post but I am not technical and have no idea what you are talking about with all the technical things you do...

This thread is all about one specific model HP notebook, with an Intel Core i3 processors. Not just any other G72. And I won't add steps how to install OS X due to the obvious legal restrictions.

 

p.s. Please remove the long quote in your post (no need for that). Thank you.

 

Hi,

Very Very Nice Walkthrough.

But, have you got some news for the WLAN ? BCM 4313 - PCI14e4,4727 ?

I bought a notebook Samsung Q530, with the same WLAN, and I can't work it.

Thank you for your time.

I hope in a your reply.

Bye bye.

I think that there are many people waiting for someone to get it going, but to be honest... I haven't a clue as to what to do next. This might change one day soon, but don't count on it.

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I think that there are many people waiting for someone to get it going, but to be honest... I haven't a clue as to what to do next. This might change one day soon, but don't count on it.

 

Ok, thank you very much for your reply.

See you soon.

Bye.

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This thread is all about one specific model HP notebook, with an Intel Core i3 processors. Not just any other G72. And I won't add steps how to install OS X due to the obvious legal restrictions.

 

p.s. Please remove the long quote in your post (no need for that). Thank you.

 

 

I think that there are many people waiting for someone to get it going, but to be honest... I haven't a clue as to what to do next. This might change one day soon, but don't count on it.

 

Long quote removed :P:)

 

I finally figured out how to install Mac OS X 10.6.3. I had to use "-cpus=1 busratio=15" to boot from Empire EFI / Nawsom boot CD :) and then insert my retail Mac OS X 10.6.3 DVD (only $27 from Amazon.com). Tried to update to 10.6.5 and can't boot up anymore due to the IOUSBFamily.kext and IOMassStorage.kext??? Now stuck with 10.6.4 for now. Still haven't figured out how to boot without "-cpus=1 busratio=15" every time yet... I read a way to boot without the "-cpus=..." somewhere but can't remember where.

 

The other problems I have are stuck with only 1024x768??? screen resolution, no wifi, and no iTunes and other applications not working.

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