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Tutto quello che c'è da sapere sulle memorie DDR


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Titolo originale: Everything You Need To Know About DDR, DDR2 and DDR3 Memories

Adattamento e traduzione: iFabio


Tutto quello che c'è da sapere sulle memorie DDR, DDR2 e DDR3




In this tutorial we will explore the main technical differences between DDR, DDR2 and DDR3 memories. Enjoy!


Before we start going into the specifics, you need to know that DDR, DDR2 and DDR3 are based on SDRAM (Synchronous Dynamic Random Access Memory) design, meaning that they use a clock signal to synchronize things. DDR stands for Double Data Rate, meaning that memories from this category transfer two data chunks per clock cycle. Translation: they achieve double the performance of memories without this feature running at the same clock rate (namely SDRAM memories, which are not available for PCs anymore).


Because of this feature, these memories are labeled with double the real maximum clock rate they can operate. For example, DDR2-800 memories work at 400 MHz, DDR2-1066 and DDR3-1066 memories work at 533 MHz, DDR3-1333 memories work 666.6 MHz and so on.



Figure 1: Clock signal and DDR mode.


It is very important to notice that these clock rates are the maximum the memory can officially use; this does not, by any mean, that the memory will work at those “speeds” automatically. For example, if you install DDR2-1066 memories on a computer that can only (or it is wrongly configured to) access the memory subsystem at 400 MHz (800 MHz DDR), the memories will be accessed at 400 MHz (800 MHz DDR) and not at 533 MHz (1,066 MHz DDR). This happens because the clock signal is provided by the memory controller, a circuit that is located outside the memory (in the north bridge chip from the motherboard or embedded inside the CPU, depending on the system).


This naming system DDRx-yyyy (where x is the technology generation and yyyy is the DDR clock rate) in theory is used only for the memory chips. The memory modules – the little printed circuit board where the memory chips are soldered to – use a different naming system: PCx-zzzz, where x is the technology generation and zzzz is the maximum theoretical transfer rate (a.k.a. maximum bandwidth). This number gives us how many bytes can be transferred per second between the memory controller and the memory module assuming that data will be transferred on every single clock pulse. This math is easily done by multiplying the DDR clock in MHz by eight. This will give us the maximum theoretical transfer rate in MB/s (megabytes per second). For example, DDR2-800 memories have a maximum theoretical transfer rate of 6,400 MB/s (800 x 8) and memory modules using this kind of memory is called PC2-6400. In some cases the number is rounded. For example, DDR3-1333 memories have a maximum theoretical transfer rate of 10,666 MB/s but memory modules using this kind of memory are called PC3-10666 or PC3-10600, depending on the manufacturer.


It is really important to understand that these numbers are maximum theoretical numbers and they are never reached. This happens because for the math we are assuming that the memory will be sending data to the memory controller every single clock cycle, which simply doesn’t happen. The memory controller and the memory need to exchange commands (for example, a command instructing the memory to deliver data stored at a given position) and during such time the memory won’t be transferring data.


Now that you know the basics about DDR memories, let’s talk about the specifics.




One of the main differences between DDR, DDR2 and DDR3 is the highest transfer rate each generation can go. Below we list the most common speeds for each generation. Some manufacturers can deliver memory chips capable of achieving other speeds than those listed – for example, specialty memories targeted to overclockers. Clocks ending is 33 and 66 MHz are in fact periodic decimal expansions (33.3333 and 66.6666, respectively).






DDR3 memories operate at lower voltages compared to DDR2 memories, which in turn operate at lower voltages compare to DDR memories. This means that DDR3 memories consume less power than DDR2 memories, which in turn consume less power than DDR memories.


Typically DDR memories are fed with 2.5 V, DDR2 memories are fed with 1.8 V and DDR3 memories are fed with 1.5 V (although modules requiring 1.6 V or 1.65 V are common and chips requiring only 1.35 V may become common in the future). Some memory modules may require higher voltages than those listed. This happens especially with memories supporting the operation at clock rates higher than the official ones (i.e., memories targeted to overclocking).






Latency is the time the memory controller must wait between requesting a data and the actual delivery of them. It is also known as CAS (Column Address Strobe) Latency or simply CL. This number is expressed in terms of clock cycles. For example, a memory with CL3 means that the memory controller must wait three clock cycles until data is delivered after a request is made. With a memory with CL5 the memory controller will have to wait more: five clock cycles. So you always should look for the memory modules with the lowest latency possible.



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Figure 2: Latency.


DDR3 memories have higher latencies than DDR2 memories, which in turn have higher latencies than DDR memories. DDR2 and DDR3 memories have an additional parameter called AL (Additional Latency) or simply A. With DDR2 and DDR3 memories the total latency will be CL+AL. Luckily enough almost all DDR2 and DDR3 memories are AL 0, meaning that no additional latency is necessary. Below we summarize the most common latency values.




Typical Latency


Other Common Latencies Available





2, 2.5






3, 4






6, 8, 9


This means that DDR3 memories delay more clock cycles to start delivering data compared to DDR2 memories (just like DDR2 memories delay more clock cycles to start delivering data compared to DDR memories), but this not necessarily means a higher wait time (this will be true only when comparing memories working at the exact same clock rate).


For example, a DDR2-800 CL5 memory will delay less time (i.e., is faster) to start delivering data than a DDR3-800 CL7 memory. However, since both are “800 MHz” memories, both provide the exact same maximum theoretical transfer rate (6,400 MB/s). Also it is important to remember that the DDR3 memory will consume less power than the DDR2 one.


When comparing modules with different clock rates you need to so some math to be able to compare the latencies. Pay attention that we are talking about “clock cycles”. When the clock is higher, each clock cycle is shorter (i.e., lower period). For example, on a DDR2-800 memory, each clock cycle takes 2.5 ns (1 ns = 0.000,000,001 second) – the math is simple, period = 1 / frequency (note that you need to use the real clock, not the DDR clock on this formula; to make things easier we compiled a reference table below). So supposing a DDR2-800 memory with CL 5, this initial wait time corresponds to 12.5 ns (2.5 ns x 5). Now suppose a DDR3-1333 memory with CL 7. With this memory each clock cycle will have a period of 1.5 ns (see table below), so the total wait time (latency) will be of 10.5 ns (1.5 ns x 7). So even though the latency of this DDR3 memory appears to be higher (7 vs. 5), the wait time is actually lower. So don’t go around thinking that DDR3 memories have worse latencies than DDR2 memories: it will depend on the clock rate you are talking about.


DDR Clock


Real Clock


Clock Period


200 MHz


100 MHz


10 ns


266 MHz


133 MHz


7.5 ns


333 MHz


166 MHz


6 ns


400 MHz


200 MHz


5 ns


533 MHz


266 MHz


3.75 ns


666 MHz


333 MHz


3 ns


800 MHz


400 MHz


2.5 ns


1,066 MHz


533 MHz


1.875 ns


1,333 MHz


666 MHz


1.5 ns


1,600 MHz


800 MHz


1.25 ns


Usually manufacturers announce the memory timings as a series of several numbers separated by a dash (e.g., 5-5-5-5, 7-10-10-10, etc). The CAS latency is always the first number from these series. See the examples on Figures 3 and 4. If you want to know what the other numbers mean, please read our tutorial Understanding RAM Timings.



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Figure 3: DDR2-1066 with CL 5.



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Figure 4: DDR3-1066 with CL 7.




Dynamic memories store data inside an array of tiny capacitors. DDR memories transfer two bits of data per clock cycle from the memory array to the memory internal I/O buffer. This is called 2-bit prefetch. On DDR2 this internal datapath was increased to four bits and on DDR3 it was raised again to eight bits. This is actually the trick that allows DDR3 to work at higher clock rates than DDR2, and DDR2 at higher clock rates than DDR.


The clocks we were referring so far are the clock rates on the “external world”, i.e., on the I/O interface from the memory, where the communication between the memory and the memory controller takes place. Internally, however, the memory works a little bit differently.


To better understand this idea, let’s compare a DDR-400, a DDR2-400 and a DDR3-400 memory chip (we know that DDR3-400 memories don’t exist, but pretend they do). These three chips work externally at 200 MHz transferring two data per clock cycle, achieving an external performance as if they were working at 400 MHz. Internally, however, the DDR chip transfers two bits between the memory array and the I/O buffer, so to match the I/O interface speed this datapath has to work at 200 MHz (200 MHz x 2 = 400 MHz). Since on DDR2 this datapath was increased from two bits to four bits, it can work at half the clock rate in order to achieve the same performance (100 MHz x 4 = 400 MHz). With DDR3 the same thing happens: the datapath was doubled again to eight bits, so it can work at half the clock rate as DDR2 or only ¼ of the clock rate of DDR in order to achieve the same performance (50 MHz x 8 = 400 MHz).



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Figure 5: Understanding n-bit prefetching.


Doubling the internal datapath at each generation means that each new memory generation can predictably have chip models with double the maximum clock rate achieved on the previous one. For example, on DDR-400, DDR2-800 and DDR3-1600 memories the memory works internally at the same clock rate (200 MHz).


Resistive Termination


On DDR memories the necessary resistive termination is located on the motherboard, while on DDR2 and DDR3 memories this termination is located inside the memory chips – technique called ODT, On-Die Termination.


This is done in order to make the signals “cleaner”. In Figure 5, you can see the signal that reaches the memory chip. On the left hand side you see the signals on a system that uses motherboard termination (DDR memories) while on the right hand side you see the signals on a system that uses on-die termination (DDR2 and DDR3 memories). Even a layman can easily say that the signals on the right hand side are cleaner and stable than the signals on the left hand side. On the yellow square you can compare the time frame difference – this time frame is the time the memory has to read or write a piece of data. With the use of on-die termination this time frame got wider, allowing higher clocks to be achieved since the memory has more time to read or write a data chunk.



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Figure 6: Comparison between motherboard termination and on-die termination.


Physical Aspect


Finally we have the differences at the physical level. You buy memory chips already soldered on a printed circuit board called “memory module”. Memory modules for each DDR generation are physically different and you won’t be able to install a DDR2 module on a DDR3 socket, for example. Unless your motherboard supports both DDR2 and DDR3 sockets (only a few do) you cannot upgrade from DDR2 to DDR3 without replacing the motherboard and eventually the CPU (if in your system the memory controller is embedded in the CPU, like it happens with all processors from AMD and Core i7 from Intel). The same thing is valid with DDR and DDR2: unless for a few are rare exceptions, you cannot replace DDR memories with DDR2. DDR2 and DDR3 modules have the same number of pins, however the key notch is placed on a different position.


Memory Module


Number of Pins














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Figure 7: Difference in edge contacts between DDR and DDR2.



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Figure 8: Difference in edge contacts between DDR2 and DDR3.


All DDR2 and DDR3 chips use BGA (Ball Grid Array) packaging, while DDR chips almost always use TSOP (Thin Small-Outline Package) packaging. There are a few DDR chips with BGA packaging on the market (like the ones from Kingmax), but they are not so common. In Figure 9, you can see how a TSOP chip on a DDR module looks like while in Figure 10 you can see how a BGA chip on a DDR2 looks like.



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Figure 9: DDR chips almost always use TSOP packaging.



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Figure 10: DDR2 and DDR3 chips use BGA packaging.

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