SpiderNet Posted November 7, 2009 Share Posted November 7, 2009 Hola a todos Les escribo para pedirles que me ayuden con DSDT y SSDT en mi DG31PR Y la ayuda en concreto es que mi DG31PR no trae un SSDT como tabla ACPI propiamente sino que la trae incorporada en el DSDT provocando que no se aplique correctamente el SpeedStep Me gustaría que me ayuden a aislar el SSDT y e hecho de todo para aplicarlo en el DSDT dentro de _PR y así activar SpeedStep ya que por ahora solo e podido reducir la temperatura pero no paso a SpeedStep ya que mi CPUPLimit es 0x1 según leo debe ser 0x0 para estar activado Alguien me ayuda Scope (_PR) { OperationRegion (SSDT, SystemMemory, 0xBFD59C10, 0x02CC) Name (DCOR, 0x01) Name (NCST, 0x01) Name (NPSS, 0x02) Name (HNDL, 0x80000000) Name (CINT, Zero) Name (APSS, Package (0x02) { Package (0x06) { 0x0A68, 0x00006978, 0x000A, 0x000A, 0x0829, 0x0829 }, Package (0x06) { 0x07CE, 0x000035E8, 0x000A, 0x000A, 0x0619, 0x0619 } }) Name (C1ST, Package (0x02) { One, Package (0x04) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, One, 0x14, 0x03E8 } }) Name (C2ST, Package (0x04) { 0x02, Package (0x04) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, One, 0x14, 0x03E8 }, Package (0x04) { ResourceTemplate () { Register (SystemIO, 0x08, // Bit Width 0x00, // Bit Offset 0x0000000000000414, // Address ,) }, 0x02, 0x28, 0x02EE }, Package (0x04) { ResourceTemplate () { Register (SystemIO, 0x08, // Bit Width 0x00, // Bit Offset 0x0000000000000415, // Address ,) }, 0x03, 0x3C, 0x01F4 } }) Name (C3ST, Package (0x04) { 0x03, Package (0x04) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, One, 0x14, 0x03E8 }, Package (0x04) { ResourceTemplate () { Register (SystemIO, 0x08, // Bit Width 0x00, // Bit Offset 0x0000000000000414, // Address ,) }, 0x02, 0x28, 0x02EE }, Package (0x04) { ResourceTemplate () { Register (SystemIO, 0x08, // Bit Width 0x00, // Bit Offset 0x0000000000000415, // Address ,) }, 0x03, 0x3C, 0x01F4 } }) Name (C4ST, Package (0x05) { 0x04, Package (0x04) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, One, 0x14, 0x03E8 }, Package (0x04) { ResourceTemplate () { Register (SystemIO, 0x08, // Bit Width 0x00, // Bit Offset 0x0000000000000414, // Address ,) }, 0x02, 0x28, 0x02EE }, Package (0x04) { ResourceTemplate () { Register (SystemIO, 0x08, // Bit Width 0x00, // Bit Offset 0x0000000000000415, // Address ,) }, 0x03, 0x3C, 0x01F4 }, Package (0x04) { ResourceTemplate () { Register (SystemIO, 0x08, // Bit Width 0x00, // Bit Offset 0x0000000000000416, // Address ,) }, 0x04, 0x50, 0x0104 } }) Processor (CPU1, 0x01, 0x00000410, 0x06) { Name (TYPE, 0x80000000) Method (_PDC, 1, NotSerialized) { CreateDWordField (Arg0, 0x08, DAT0) Store (DAT0, TYPE) If (LEqual (CINT, Zero)) { Store (One, CINT) If (LOr (LEqual (And (TYPE, 0x1B), 0x1B), LEqual (DCOR, Zero))) { If (LNotEqual (NPSS, Zero)) { Load (SSDT, HNDL) } } Else { Store (One, NCST) } } } Method (_CST, 0, NotSerialized) { If (LEqual (NCST, One)) { Return (C1ST) } } } Processor (CPU2, 0x02, 0x00000410, 0x06) { Name (TYPE, 0x80000000) Method (_PDC, 1, NotSerialized) { CreateDWordField (Arg0, 0x08, DAT0) Store (DAT0, TYPE) If (LEqual (CINT, Zero)) { Store (One, CINT) If (LOr (LEqual (And (TYPE, 0x1B), 0x1B), LEqual (DCOR, Zero))) { If (LNotEqual (NPSS, Zero)) { Load (SSDT, HNDL) } } Else { Store (One, NCST) } } } Method (_CST, 0, NotSerialized) { If (LEqual (NCST, One)) { Return (C1ST) } } } Processor (CPU3, 0x03, 0x00000410, 0x06) { Name (TYPE, 0x80000000) Method (_PDC, 1, NotSerialized) { CreateDWordField (Arg0, 0x08, DAT0) Store (DAT0, TYPE) If (LEqual (CINT, Zero)) { Store (One, CINT) If (LOr (LEqual (And (TYPE, 0x1B), 0x1B), LEqual (DCOR, Zero))) { If (LNotEqual (NPSS, Zero)) { Load (SSDT, HNDL) } } Else { Store (One, NCST) } } } Method (_CST, 0, NotSerialized) { If (LEqual (NCST, One)) { Return (C1ST) } } } Processor (CPU4, 0x04, 0x00000410, 0x06) { Name (TYPE, 0x80000000) Method (_PDC, 1, NotSerialized) { CreateDWordField (Arg0, 0x08, DAT0) Store (DAT0, TYPE) If (LEqual (CINT, Zero)) { Store (One, CINT) If (LOr (LEqual (And (TYPE, 0x1B), 0x1B), LEqual (DCOR, Zero))) { If (LNotEqual (NPSS, Zero)) { Load (SSDT, HNDL) } } Else { Store (One, NCST) } } } Method (_CST, 0, NotSerialized) { If (LEqual (NCST, One)) { Return (C1ST) } } } Processor (CPU5, 0x05, 0x00000410, 0x06) { Name (TYPE, 0x80000000) Method (_PDC, 1, NotSerialized) { CreateDWordField (Arg0, 0x08, DAT0) Store (DAT0, TYPE) If (LEqual (CINT, Zero)) { Store (One, CINT) If (LOr (LEqual (And (TYPE, 0x1B), 0x1B), LEqual (DCOR, Zero))) { If (LNotEqual (NPSS, Zero)) { Load (SSDT, HNDL) } } Else { Store (One, NCST) } } } Method (_CST, 0, NotSerialized) { If (LEqual (NCST, One)) { Return (C1ST) } } } Processor (CPU6, 0x06, 0x00000410, 0x06) { Name (TYPE, 0x80000000) Method (_PDC, 1, NotSerialized) { CreateDWordField (Arg0, 0x08, DAT0) Store (DAT0, TYPE) If (LEqual (CINT, Zero)) { Store (One, CINT) If (LOr (LEqual (And (TYPE, 0x1B), 0x1B), LEqual (DCOR, Zero))) { If (LNotEqual (NPSS, Zero)) { Load (SSDT, HNDL) } } Else { Store (One, NCST) } } } Method (_CST, 0, NotSerialized) { If (LEqual (NCST, One)) { Return (C1ST) } } } Processor (CPU7, 0x07, 0x00000410, 0x06) { Name (TYPE, 0x80000000) Method (_PDC, 1, NotSerialized) { CreateDWordField (Arg0, 0x08, DAT0) Store (DAT0, TYPE) If (LEqual (CINT, Zero)) { Store (One, CINT) If (LOr (LEqual (And (TYPE, 0x1B), 0x1B), LEqual (DCOR, Zero))) { If (LNotEqual (NPSS, Zero)) { Load (SSDT, HNDL) } } Else { Store (One, NCST) } } } Method (_CST, 0, NotSerialized) { If (LEqual (NCST, One)) { Return (C1ST) } } } Processor (CPU8, 0x08, 0x00000410, 0x06) { Name (TYPE, 0x80000000) Method (_PDC, 1, NotSerialized) { CreateDWordField (Arg0, 0x08, DAT0) Store (DAT0, TYPE) If (LEqual (CINT, Zero)) { Store (One, CINT) If (LOr (LEqual (And (TYPE, 0x1B), 0x1B), LEqual (DCOR, Zero))) { If (LNotEqual (NPSS, Zero)) { Load (SSDT, HNDL) } } Else { Store (One, NCST) } } } Method (_CST, 0, NotSerialized) { If (LEqual (NCST, One)) { Return (C1ST) } } } } Saludos desde Ecuador Link to comment https://www.insanelymac.com/forum/topic/196433-ayuda-ssdt/ Share on other sites More sharing options...
SpiderNet Posted November 12, 2009 Author Share Posted November 12, 2009 UP Link to comment https://www.insanelymac.com/forum/topic/196433-ayuda-ssdt/#findComment-1328115 Share on other sites More sharing options...
anibalin Posted February 25, 2011 Share Posted February 25, 2011 Hola amigo, tengo tu misma mainboard y haciendo un search encontré que tenías el mismo problema. Has logrado solucionarlo? Link to comment https://www.insanelymac.com/forum/topic/196433-ayuda-ssdt/#findComment-1645337 Share on other sites More sharing options...
SpiderNet Posted February 28, 2011 Author Share Posted February 28, 2011 Hola..!! SI..!! Se logra al emular el smbios de una apple que tenga las mismas caracteristicas del equipo hack En mi caso es una iMac9,1 que es muy similar en tecnologia del micro Por ejemplo.. un Core2 Duo van bien con las MacMini, iMac o MacBook y los Core2 Quad van con las MacPro y los Xserver Todo eso lo puedes hacer editando el smbios.plist y poniendo el perfil de una apple a emular ya sea iMac (Core2Duo) o MacPro (Core2Quad) Recuerda que entre mas exacto y verifico sea el perfil de la apple a emular y que valla acorde a tu hardware mejor sera tu hack Saludos desde Ecuador Link to comment https://www.insanelymac.com/forum/topic/196433-ayuda-ssdt/#findComment-1646433 Share on other sites More sharing options...
anibalin Posted February 28, 2011 Share Posted February 28, 2011 Genial amigo. Link to comment https://www.insanelymac.com/forum/topic/196433-ayuda-ssdt/#findComment-1646443 Share on other sites More sharing options...
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