Ciao a tutti.
Sono alle prese con la sintetizzazone del mio DSDT (stripping)
e per la precisione nella parte del _CST
Alcune info
/*
* C0 is the active state in which everything is running at full capacity.
* C1 has the core clock turned off, as well as a slightly reduced core voltage.
* However the motherboard power lines are kept alive and the data cache is kept intact.
* This means that the performance isn't compromised and the wake-up time is extremely fast
* - the C1E state is what currently features on all Core 2 CPUs.
* C3 has the same core voltage drop as the C1 state,
* but now turns off the PLLs and flushes the L1 and L2 cache, switching it off and losing the data.
* The consequence of turning more off is a longer wake-up time,
* but Intel's chart shows not a huge drop in idle power, unlike C0 to C1.
* C6 the final power down state, is an almost complete shutdown of the CPU.
* There is a significant drop in core voltage and everything is now switched off except the L3 cache.
* The obvious downside to this state is that the resume time will be greater,
* but the power saving is huge.
*/
Gli i7 hanno 4 C-State C0, C1, C3 e C6
alcuni "richiami"
Name (CFGD, 0x00200472)
Name (NCPU, 0x08)
Name (NPCP, One)
Name (PDC0, 0x80000000)
Name (TBL0, Zero)
Name (CTB0, Zero)
Name (TTB0, Zero)
Name (PSTE, Zero)
Name (TSTE, Zero)
E qui sotto il codice che vorrei sintetizzare:
[size=1] Method (_CST, 0, NotSerialized)
{
If (LAnd (LGreater (NCPU, One), LNot (And (PDC0, 0x10))))
{
Return (Package (0x02)
{
One,
Package (0x04)
{
ResourceTemplate ()
{
Register (FFixedHW,
0x00, // Bit Width
0x00, // Bit Offset
0x0000000000000000, // Address
,)
},
One,
0x9D,
0x03E8
}
})
}
If (LAnd (And (CFGD, 0x00200000), And (PDC0, 0x0200)))
{
If (And (CFGD, 0x80))
{
Return (Package (0x05)
{
0x04,
Package (0x04)
{
ResourceTemplate ()
{
Register (FFixedHW,
0x01, // Bit Width
0x02, // Bit Offset
0x0000000000000000, // Address
0x01, // Access Size
)
},
One,
One,
0x03E8
},
Package (0x04)
{
ResourceTemplate ()
{
Register (FFixedHW,
0x01, // Bit Width
0x02, // Bit Offset
0x0000000000000010, // Address
0x01, // Access Size
)
},
0x02,
0x11,
0x01F4
},
Package (0x04)
{
ResourceTemplate ()
{
Register (FFixedHW,
0x01, // Bit Width
0x02, // Bit Offset
0x0000000000000020, // Address
0x01, // Access Size
)
},
0x03,
0x11,
0x015E
},
Package (0x04)
{
ResourceTemplate ()
{
Register (FFixedHW,
0x01, // Bit Width
0x02, // Bit Offset
0x0000000000000030, // Address
0x01, // Access Size
)
},
0x03,
0x11,
0xC8
}
})
}
If (LAnd (LNot (And (CFGD, 0x80)), And (CFGD, 0x40
)))
{
Return (Package (0x04)
{
0x03,
Package (0x04)
{
ResourceTemplate ()
{
Register (FFixedHW,
0x01, // Bit Width
0x02, // Bit Offset
0x0000000000000000, // Address
0x01, // Access Size
)
},
One,
One,
0x03E8
},
Package (0x04)
{
ResourceTemplate ()
{
Register (FFixedHW,
0x01, // Bit Width
0x02, // Bit Offset
0x0000000000000010, // Address
0x01, // Access Size
)
},
0x02,
0x11,
0x01F4
},
Package (0x04)
{
ResourceTemplate ()
{
Register (FFixedHW,
0x01, // Bit Width
0x02, // Bit Offset
0x0000000000000020, // Address
0x01, // Access Size
)
},
0x03,
0x11,
0x015E
}
})
}
If (And (CFGD, 0x20))
{
Return (Package (0x03)
{
0x02,
Package (0x04)
{
ResourceTemplate ()
{
Register (FFixedHW,
0x01, // Bit Width
0x02, // Bit Offset
0x0000000000000000, // Address
0x01, // Access Size
)
},
One,
One,
0x03E8
},
Package (0x04)
{
ResourceTemplate ()
{
Register (FFixedHW,
0x01, // Bit Width
0x02, // Bit Offset
0x0000000000000010, // Address
0x01, // Access Size
)
},
0x02,
0x11,
0x01F4
}
})
}
Return (Package (0x02)
{
One,
Package (0x04)
{
ResourceTemplate ()
{
Register (FFixedHW,
0x01, // Bit Width
0x02, // Bit Offset
0x0000000000000000, // Address
0x01, // Access Size
)
},
One,
One,
0x03E8
}
})
}
If (And (CFGD, 0x00200000))
{
If (And (CFGD, 0x80))
{
Return (Package (0x05)
{
0x04,
Package (0x04)
{
ResourceTemplate ()
{
Register (FFixedHW,
0x00, // Bit Width
0x00, // Bit Offset
0x0000000000000000, // Address
,)
},
One,
0x20,
0x03E8
},
Package (0x04)
{
ResourceTemplate ()
{
Register (SystemIO,
0x08, // Bit Width
0x00, // Bit Offset
0x0000000000000814, // Address
,)
},
0x02,
0x60,
0x01F4
},
Package (0x04)
{
ResourceTemplate ()
{
Register (SystemIO,
0x08, // Bit Width
0x00, // Bit Offset
0x0000000000000815, // Address
,)
},
0x03,
0x80,
0x015E
},
Package (0x04)
{
ResourceTemplate ()
{
Register (SystemIO,
0x08, // Bit Width
0x00, // Bit Offset
0x0000000000000816, // Address
,)
},
0x03,
0xA0,
0xC8
}
})
}
If (LAnd (LNot (And (CFGD, 0x80)), And (CFGD, 0x40
)))
{
Return (Package (0x04)
{
0x03,
Package (0x04)
{
ResourceTemplate ()
{
Register (FFixedHW,
0x00, // Bit Width
0x00, // Bit Offset
0x0000000000000000, // Address
,)
},
One,
0x20,
0x03E8
},
Package (0x04)
{
ResourceTemplate ()
{
Register (SystemIO,
0x08, // Bit Width
0x00, // Bit Offset
0x0000000000000814, // Address
,)
},
0x02,
0x60,
0x01F4
},
Package (0x04)
{
ResourceTemplate ()
{
Register (SystemIO,
0x08, // Bit Width
0x00, // Bit Offset
0x0000000000000815, // Address
,)
},
0x03,
0x80,
0x015E
}
})
}
If (And (CFGD, 0x20))
{
Return (Package (0x03)
{
0x02,
Package (0x04)
{
ResourceTemplate ()
{
Register (FFixedHW,
0x00, // Bit Width
0x00, // Bit Offset
0x0000000000000000, // Address
,)
},
One,
0x20,
0x03E8
},
Package (0x04)
{
ResourceTemplate ()
{
Register (SystemIO,
0x08, // Bit Width
0x00, // Bit Offset
0x0000000000000814, // Address
,)
},
0x02,
0x60,
0x01F4
}
})
}
Return (Package (0x02)
{
One,
Package (0x04)
{
ResourceTemplate ()
{
Register (FFixedHW,
0x00, // Bit Width
0x00, // Bit Offset
0x0000000000000000, // Address
,)
},
One,
One,
0x03E8
}
})
}
Return (Package (0x02)
{
One,
Package (0x04)
{
ResourceTemplate ()
{
Register (FFixedHW,
0x00, // Bit Width
0x00, // Bit Offset
0x0000000000000000, // Address
,)
},
One,
One,
0x03E8
}
})
}[/size]
C'e' da diventare matti a sintetizzare anche solo questa parte... ovvero trasformarla in
Name (CST, Package...
sono arrivato fino a qui. (ovvero poco e nulla)...
Name (CST, Package (0x04)
{
0x04, // Number of C-State packages: 4 (C0, C1, C3 and C6).
Package (0x04)
Allego l'attuale DSDT che uso per il mio i7-940 c'e' molto che proviene dalle ricerche fatte da MC.
Ancora non ho implementato il Device EC e non ho ancora implementato la mod per lo stop
Guardando su
questo trend ho notato che sulle Gigabyte usano 6 C-State???
In teoria non dovrebbero esserci differenze nella architettura...
Processor (\_PR.CPU0, 0x00, 0x00000410, 0x06)
{
Name (_CST, Package (0x07)
{
0x06,
Package (0x04)
{
ResourceTemplate ()
Fabio