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Will SSE3 be optional for Tiger x86?

Swad

By Swad

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It appears that Apple hasn't quite made up their mind about SSE3 yet. Or at least, they're not done with the Intel version of OS X.

 

Those who have studied the new x86 version of the OS have reported that the necessity for SSE3 in the GUI has been established as fact. However, as this Apple document on the Intel transition states, "SSE3 is an optional hardware feature on MacOS X for Intel. If you wish to use SSE3 features, you must detect them first, similar to how you are required to check for AltiVec." The paper goes on to reveal that, "SSE is not available in any format for MacOS X for PowerPC and AltiVec is not available for MacOS X for Intel. When writing code for Universal Binaries to run on MacOS X, you should conditionalize your code using appropriate symbols like __VEC__ and __SSE2__ to prevent the compiler from seeing vector code for unsupported architectures for each fork of the universal binary."

 

So, will the "official" version of Tiger on Intel be optimized for SSE2 as well?

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mikesown

I think that apple just included it with the development kits to limit piracy. From what I have heard, apple did not use any inline asm with SSE3 code, just a compiler optimization. I do not think that every mac will have SSE3, even a year from now. If apple is going to keep lines such as the mac mini up to date, I dobut they can afford to keep SSE3 inside it.

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DaffyDuck
If apple is going to keep lines such as the mac mini up to date, I dobut they can afford to keep SSE3 inside it.

Think again - it's not a question of Apple leaving SSE3 inside, but rather what intel will be providing in 2006... and the way it's coming together, it looks like pretty much their entire line of non-Pentium named CPUs will contain subsets of SSE3, or better.

 

You're still all thinking with last week's news.

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mikesown
Think again - it's not a question of Apple leaving SSE3 inside, but rather what intel will be providing in 2006... and the way it's coming together, it looks like pretty much their entire line of non-Pentium named CPUs will contain subsets of SSE3, or better.

 

You're still all thinking with last week's news.

Hey intel just recently dropped their 266mhz line. I don't think they are about to drop SSE2 quite yet :)

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eight_sixx

This tidbit in the SSE Optimization document on the Apple Developer Transition Resource Center:

 

 

What we are calling SSE in this document was actually delivered as three separate vector extensions to the IA-32 ISA, which appeared (in order over time) under the names SSE, SSE2 and SSE3. Each builds on the extension that went before it. The first two are defined to be part of the baseline hardware requirement for MacOS X for Intel. SSE3 has been recently introduced (first in the Prescott family of Pentium 4 processors) and may or may not be available on a machine running MacOS X for Intel. :(

 

SSE Performance Programming Document

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nendra
This tidbit in the SSE Optimization document on the Apple Developer Transition Resource Center:

 

 

What we are calling SSE in this document was actually delivered as three separate vector extensions to the IA-32 ISA, which appeared (in order over time) under the names SSE, SSE2 and SSE3. Each builds on the extension that went before it. The first two are defined to be part of the baseline hardware requirement for MacOS X for Intel. SSE3 has been recently introduced (first in the Prescott family of Pentium 4 processors) and may or may not be available on a machine running MacOS X for Intel.  B)

 

SSE Performance Programming Document

 

and some lines below:

 

SSE3 is enabled using the GCC compiler flag -msse3. SSE3 is an optional hardware feature on MacOS X for Intel and is not enabled by default on gcc-4.0.

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