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GA-EX58 and GA-X58A DSDT native power management modifications

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Well, according to the specification it should work on all ICH9 and ICH10 boards (earlier versions may support it too). I don't know if all manufacturers of ICH[9,10] motherboards comply to spec, but those who do should have this feature consistently working across all their boards.

 

And yes I've had the MSI P35 Platinum board, but just recently I got myself the Gigabyte GA-EX58-UD5.

 

A few details about the DSDT I posted earlier:

  1. It has all OS detection stuff stripped out
  2. It includes almost all modifications from the first post. I haven't changed the _PR scope because my board is not overclocked. You need to enable CStates in the Advanced Processor Features (not sure if I named it right) for AppleIntelCPUPowerManagement to work.
  3. No IDE.
  4. No PIC, only APIC.
  5. No PS/2.

 

A very timely response, I was just pm'ing mm67 on the DSDT fixes for Gigabyte boards about PICM/PICF and APIC

 

I've also removed IDE etc but wrt to APIC how do you specify this, I thought unless you specify anything you got

PIC by default?

 

Did you manage to remove all the LNKx and BUFA stuff which depends on PIC?

 

Also, d00d, your bios settings, I'm confused as to why C3/C6/C7 state support etc needs to be disabled?

It sounds counter-intuitive

 

Advanced CPU Features:

CPU Clock Ratio ................................ [20x]

Intel® Turbo Boost Tech .................. [Enabled] disabled

CPU Cores Enabled ............................ [All] all

CPU Multi Threading .......................... [Enabled] enabled

CPU Enhanced Halt (C1E) ................... [Disabled] disabled

C3/C6/C7 State Support .................... [Disabled] disabled

CPU Thermal Monitor ......................... [Enabled] enabled

CPU EIST Function ............................ [Disabled] disabled

Bi-Directional PROCHOT ..................... [Enabled] disabled

Virtualization Technology ................... [Enabled] enabled

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Also, d00d, your bios settings, I'm confused as to why C3/C6/C7 state support etc needs to be disabled?

It sounds counter-intuitive

I'll update my 4.3 GHz BIOS template, I'm running with everything in Advanced CPU Features enabled except for turbo.

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I'll update my 4.3 GHz BIOS template, I'm running with everything in Advanced CPU Features enabled except for turbo.

 

;) !

 

Edit: d00d, Just a quick question

 

My assumption is that the difference between your DSDT method and the generic method on the other GB thread is

that yours is a bespoke method for the i7 to get better temperatures whereas the other thread is the 'off the peg,

one size fits all' version with wider coverage for more cpu's but not as good temp control. Is this correct?

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A very timely response, I was just pm'ing mm67 on the DSDT fixes for Gigabyte boards about PICM/PICF and APIC

 

I've also removed IDE etc but wrt to APIC how do you specify this, I thought unless you specify anything you got

PIC by default?

 

It's the OS that dictates which interrupt controller to use. I don't think that Apple even supports PIC because it's impossible (?) to use on the SMP systems.

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:) !

 

Edit: d00d, Just a quick question

 

My assumption is that the difference between your DSDT method and the generic method on the other GB thread is

that yours is a bespoke method for the i7 to get better temperatures whereas the other thread is the 'off the peg,

one size fits all' version with wider coverage for more cpu's but not as good temp control. Is this correct?

I haven't experimented much with making it generic because it seems that Nehalem depends on specific PStates, although I'm open to the concept if it can be made to work without error.

The following is seen if using turbo, and the 21 multiplier in DSDT is different from what is seen in the SSDT dump;

kernel[0]: WARNING: ACPI_SMC_CtrlLoop::initCPUCtrlLoop - turbo enabled but no turbo P-state found

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It's the OS that dictates which interrupt controller to use. I don't think that Apple even supports PIC because it's impossible (?) to use on the SMP systems.

 

 

So does that mean the bit about PICM or PICF or APIC is essentially meaningless in an OS X DSDT

Therefore it is safe to delete all PICM/PICF etc

 

              
                Method (_PRT, 0, NotSerialized)
               {
                   If (LNot (PICF))
                   {
                       Return (PICM)
                   }
                   Else
                   {
                       Return (APIC)
                   }
               } 

 

If this is so then we can junk loads of stuff on LNKx & BUFA etc

 

But when I tried this I got a hang on boot while initialising USB

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There's a solution to make resume after sleep to work properly without requiring user to tick the "Start up automatically after a power failure" checkbox.

 

Guys at the DSDT fixes for Gigabyte boards thread narrowed down the problem to the GEN_PMCON_3 register (spec page 454, see description for bit 0).

 

sr2, I tried the changes you specified but got the following compiler error:

dsdt.dsl   499:             Store (Zero, SLPE)
Error    4063 -       Object does not exist ^  (SLPE)

Looking through your dsdt.aml I found SLPE here:

 OperationRegion (PMRS, SystemIO, 0x0430, One)
   Field (PMRS, ByteAcc, NoLock, Preserve)
   {
           ,   4, 
       SLPE,   1, 
               Offset (0x08), 
       GPSE,   16, 
       GPSS,   16, 
               Offset (0x12), 
           ,   1, 
       SWGC,   1
   }

The closest I have is this:

OperationRegion (AGPS, SystemIO, 0x0438, 0x04)
   Field (AGPS, ByteAcc, NoLock, Preserve)
   {
       GPSE,   16, 
       GPSS,   16
   }

   OperationRegion (GPCN, SystemIO, 0x0442, One)
   Field (GPCN, ByteAcc, NoLock, Preserve)
   {
           ,   1, 
       SWGC,   1, 
               Offset (0x01)
   }

Can I replace my code with yours or is it not that simple? I've enclosed my dsdt (prior to applying your patch) in case you would like to take a look. Thank you. I'm looking forward to getting this working.

FUT1L1TY_DSDT.zip

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So does that mean the bit about PICM or PICF or APIC is essentially meaningless in an OS X DSDT

Therefore it is safe to delete all PICM/PICF etc

 

              
                Method (_PRT, 0, NotSerialized)
               {
                   If (LNot (PICF))
                   {
                       Return (PICM)
                   }
                   Else
                   {
                       Return (APIC)
                   }
               } 

Do you mean that you also deleted all APIC packages? Btw this method should look like this after cleanup:

				 Method (_PRT, 0, NotSerialized)
			{
					Return (APIC)
			}

 

If this is so then we can junk loads of stuff on LNKx & BUFA etc

 

But when I tried this I got a hang on boot while initialising USB

Can you upload your (working) DSDT somewhere so I can try to strip PIC and LNK stuff?

 

sr2, I tried the changes you specified but got the following compiler error:

dsdt.dsl   499:             Store (Zero, SLPE)
Error    4063 -       Object does not exist ^  (SLPE)

Can I replace my code with yours or is it not that simple? I've enclosed my dsdt (prior to applying your patch) in case you would like to take a look. Thank you. I'm looking forward to getting this working.

 

Yes, you can replace AGPS and GPCN operation regions with the PMRS one. Also see item #16 in the first post to get the reasoning behind adding SLPE field.

 

Also I have tried your DSDT with my modifications to see whether wake-up works or not. It seems like it does, but I had trouble waking up my machine by using either keyboard or mouse. I was able to wake it up by pulling out usb stick . I don't have this problem with my DSDT though.

 

Here's a diff between original and modified DSDT:

--- original.dsl	2010-01-02 17:06:48.000000000 +0300
+++ modified.dsl	2010-01-03 11:01:41.000000000 +0300
@@ -427,6 +427,13 @@
	 APMD,   8
 }

+	OperationRegion (PMRS, SystemIO, 0x0430, 0x01)
+	Field (PMRS, ByteAcc, NoLock, Preserve)
+	{
+		, 4,
+		SLPE, 1
+	}
+
 OperationRegion (AGPS, SystemIO, 0x0438, 0x04)
 Field (AGPS, ByteAcc, NoLock, Preserve)
 {
@@ -493,20 +500,18 @@
 {
	 Or (Arg0, 0xF0, Local0)
	 Store (Local0, DBG1)
-		OSTP ()
-		If (LEqual (Arg0, One)) {}
-		If (LEqual (Arg0, 0x03)) {}
+		OSTP()
+
	 If (LEqual (Arg0, 0x05))
	 {
		 Store (0x99, SMIP)
+			Store (One, \_SB.PCI0.PX40.AG3E)
+			Store (Zero, SLPE)
+			Sleep (0x10)
	 }
-
-		If (LEqual (Arg0, 0x04))
+		Else
	 {
-			If (LNot (PICF))
-			{
-				Sleep (0x64)
-			}
+			Store (Zero, \_SB.PCI0.PX40.AG3E)
	 }
 }

@@ -3216,6 +3221,12 @@
				 Return (Local0)
			 }

+				OperationRegion (LPC0, PCI_Config, 0xA4, 0x02)
+				Field (LPC0, ByteAcc, NoLock, Preserve)
+				{
+					AG3E,   1
+				}
+
			 OperationRegion (PREV, PCI_Config, 0x08, One)
			 Scope (\)
			 {

Also I'll attach your modified DSDT so you don't need to apply modifications again.

dsdt.zip

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So does that mean the bit about PICM or PICF or APIC is essentially meaningless in an OS X DSDT

Therefore it is safe to delete all PICM/PICF etc

 

              
                Method (_PRT, 0, NotSerialized)
               {
                   If (LNot (PICF))
                   {
                       Return (PICM)
                   }
                   Else
                   {
                       Return (APIC)
                   }
               } 

 

If this is so then we can junk loads of stuff on LNKx & BUFA etc

 

But when I tried this I got a hang on boot while initialising USB

Your _PRTs should look something like this.

				Method (_PRT, 0, NotSerialized) {			  
				Return (Package (0x04) {				   
					Package (0x04){0xFFFF,Zero,Zero,0x11}, 
					Package (0x04){0xFFFF,One,Zero,0x12}, 
					Package (0x04){0xFFFF,0x02,Zero,0x13}, 
					Package (0x04){0xFFFF,0x03,Zero,0x10}
				})
			}

 

Check the DSDT in my signature for more on getting rid of those things. Or are you saying you don't need _PRT all together?

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Do you mean that you also deleted all APIC packages? Btw this method should look like this after cleanup:

				 Method (_PRT, 0, NotSerialized)
			{
					Return (APIC)
			}

 

 

Can you upload your (working) DSDT somewhere so I can try to strip PIC and LNK stuff?

 

 

 

Yes, you can replace AGPS and GPCN operation regions with the PMRS one. Also see item #16 in the first post to get the reasoning behind adding SLPE field.

 

Also I have tried your DSDT with my modifications to see whether wake-up works or not. It seems like it does, but I had trouble waking up my machine by using either keyboard or mouse. I was able to wake it up by pulling out usb stick . I don't have this problem with my DSDT though.

 

Here's a diff between original and modified DSDT:

--- original.dsl	2010-01-02 17:06:48.000000000 +0300
+++ modified.dsl	2010-01-03 11:01:41.000000000 +0300
@@ -427,6 +427,13 @@
	 APMD,   8
 }

+	OperationRegion (PMRS, SystemIO, 0x0430, 0x01)
+	Field (PMRS, ByteAcc, NoLock, Preserve)
+	{
+		, 4,
+		SLPE, 1
+	}
+
 OperationRegion (AGPS, SystemIO, 0x0438, 0x04)
 Field (AGPS, ByteAcc, NoLock, Preserve)
 {
@@ -493,20 +500,18 @@
 {
	 Or (Arg0, 0xF0, Local0)
	 Store (Local0, DBG1)
-		OSTP ()
-		If (LEqual (Arg0, One)) {}
-		If (LEqual (Arg0, 0x03)) {}
+		OSTP()
+
	 If (LEqual (Arg0, 0x05))
	 {
		 Store (0x99, SMIP)
+			Store (One, \_SB.PCI0.PX40.AG3E)
+			Store (Zero, SLPE)
+			Sleep (0x10)
	 }
-
-		If (LEqual (Arg0, 0x04))
+		Else
	 {
-			If (LNot (PICF))
-			{
-				Sleep (0x64)
-			}
+			Store (Zero, \_SB.PCI0.PX40.AG3E)
	 }
 }

@@ -3216,6 +3221,12 @@
				 Return (Local0)
			 }

+				OperationRegion (LPC0, PCI_Config, 0xA4, 0x02)
+				Field (LPC0, ByteAcc, NoLock, Preserve)
+				{
+					AG3E,   1
+				}
+
			 OperationRegion (PREV, PCI_Config, 0x08, One)
			 Scope (\)
			 {

Also I'll attach your modified DSDT so you don't need to apply modifications again.

dsdt.zip

 

Thanks for the tips folks.

 

I accidentally overwrote my dsdt with the full edits, I'll have to see if I can find it in timemachine

 

If not I can recreate fairly easily from my latest incremental edit

 

I'll upload it as soon as I get it back which may be in the next 24hrs

 

edit : It may come as no surprise, but if you turn off JMicron etc and remove it from DSDT then the following

error disappears

 

Unknown AHCI Standard Controller:

Vendor:	Unknown
Product:	AHCI Standard Controller
Speed:	3 Gigabit
Description:	AHCI Version 1.00 Supported

post-383752-1262521623_thumb.png

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Thanks for the tips folks.

 

I accidentally overwrote my dsdt with the full edits, I'll have to see if I can find it in timemachine

 

If not I can recreate fairly easily from my latest incremental edit

 

I'll upload it as soon as I get it back which may be in the next 24hrs

 

edit : It may come as no surprise, but if you turn off JMicron etc and remove it from DSDT then the following

error disappears

 

Unknown AHCI Standard Controller:

Vendor:	Unknown
Product:	AHCI Standard Controller
Speed:	3 Gigabit
Description:	AHCI Version 1.00 Supported

 

I managed to find it in TimeMachine

 

DO NOT USE unless you have a backup DSDT - This Fails on Boot

 

This has most of my edits todate inc removal of JMicron, etc plus removal of LNK, BUFA etc

but the APIC needs fixing

dsdt_noPICLNK.aml.zip

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I managed to find it in TimeMachine

 

DO NOT USE unless you have a backup DSDT - This Fails on Boot

 

This has most of my edits todate inc removal of JMicron, etc plus removal of LNK, BUFA etc

but the APIC needs fixing

 

 

Here is what I currently use without JMicron but with PICM/PICF still in

 

Seems to work without problem, the previous version was a delta on this

dsdtNoJMicron.aml.zip

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Here is what I currently use without JMicron but with PICM/PICF still in

 

Seems to work without problem, the previous version was a delta on this

 

 

I would add that if people use this without thinking...

 

I removed all the IDE 1 & 2 and changed to SATA

 

It is not specifying ICH10® but ESB2 (you don't need a kext for orange icons)

Some people claim it causes Seagate HD's to die, but I'm using WD - not caused me any problems

 

It includes the DSDT fix so you don't need EvoReboot or OpenHaltRestart kexts (restart doesn't work without

the hacked RC4 boot file though)

 

I think Firewire may have got moved to the wrong place, haven't got around to putting it back

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LocusOfControl,

 

I assume that you have the Gigabyte GA-EX58-UD5. One little question: why your DSDT looks almost like the DSDT from here? Aren't those DSDTs are made for GA-EP35-DS3L owners?

 

I don't mean that it's a bad thing to copy & paste some parts from the above mentioned DSDTs, but you have done it quite radically and I can see differences in the "core" stuff (e.g. _PRT objects) on the first sight.

 

Oh, and if you're already set to go with your current DSDT I think you can remove _INI method and the PWRC OperationRegion from both EHC1 and EHC2 devices. I think this was done because Gigabyte GA-EP45-DS3 didn't announce any PM capabilities for EHCI controllers (see this). Gigabyte GA-EX58-UD5 does this right:

00:1d.7 USB Controller: Intel Corporation 82801JI (ICH10 Family) USB2 EHCI Controller #1 (prog-if 20 [EHCI])

Capabilities: [50] Power Management version 2

Flags: PMEClk- DSI- D1- D2- AuxCurrent=375mA PME(D0+,D1-,D2-,D3hot+,D3cold+)

Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=0 PME-

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LocusOfControl,

 

I assume that you have the Gigabyte GA-EX58-UD5. One little question: why your DSDT looks almost like the DSDT from here? Aren't those DSDTs are made for GA-EP35-DS3L owners?

 

I don't mean that it's a bad thing to copy & paste some parts from the above mentioned DSDTs, but you have done it quite radically and I can see differences in the "core" stuff (e.g. _PRT objects) on the first sight.

 

Oh, and if you're already set to go with your current DSDT I think you can remove _INI method and the PWRC OperationRegion from both EHC1 and EHC2 devices. I think this was done because Gigabyte GA-EP45-DS3 didn't announce any PM capabilities for EHCI controller (see this). Gigabyte GA-EX58-UD5 does this right:

 

 

I don't know if you have followed that thread but I believe the intention was to create a generic GB DSDT aligned

with Apple terminology. This was based on earlier efforts on Asus boards.

 

edit : Ta, it seems you have been following a lot of threads

 

If you look you will see that most values are the same just renamed although the processor info is as per d00d

 

It is possible I made some early errors since I'm just getting the hang of this ;)

It does seem work without issue for me as I generally make incremental edits and test, but there is probably room

for improvement

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LocusOfControl,

 

I assume that you have the Gigabyte GA-EX58-UD5. One little question: why your DSDT looks almost like the DSDT from here? Aren't those DSDTs are made for GA-EP35-DS3L owners?

 

I don't mean that it's a bad thing to copy & paste some parts from the above mentioned DSDTs, but you have done it quite radically and I can see differences in the "core" stuff (e.g. _PRT objects) on the first sight.

 

Oh, and if you're already set to go with your current DSDT I think you can remove _INI method and the PWRC OperationRegion from both EHC1 and EHC2 devices. I think this was done because Gigabyte GA-EP45-DS3 didn't announce any PM capabilities for EHCI controllers (see this). Gigabyte GA-EX58-UD5 does this right:

 

Are the PM capabilities set right already at boot, on Gigabyte P35 and P45 boards those capabilities get correct values after system has gone to sleep for first time. That's however too late since OS X checks those values only when booting.

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Are the PM capabilities set right already at boot, on Gigabyte P35 and P45 boards those capabilities get correct values after system has gone to sleep for first time. That's however too late since OS X checks those values only when booting.

 

mm67, I'm not sure what you mean, could you clarify ?

 

"Are the PM capabilities set right already at boot"

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mm67, I'm not sure what you mean, could you clarify ?

 

"Are the PM capabilities set right already at boot"

 

On P35 and P45 boards output of lspci changes after sleep. Run lspci -nnvv -s 0:1d.7 right after boot, then put system to sleep, wake up and run the same command again. Look for changes on this line:

 

Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0+,D1-,D2-,D3hot+,D3cold+)

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Yes, you can replace AGPS and GPCN operation regions with the PMRS one. Also see item #16 in the first post to get the reasoning behind adding SLPE field.

 

Also I have tried your DSDT with my modifications to see whether wake-up works or not. It seems like it does, but I had trouble waking up my machine by using either keyboard or mouse. I was able to wake it up by pulling out usb stick . I don't have this problem with my DSDT though.

 

Also I'll attach your modified DSDT so you don't need to apply modifications again.

 

sr2, Thank you. That did the trick. Sleep and wake are now working. However, I did not have any troubles using the mouse or keyboard to wake up my machine. Please note, my keyboard and mouse are set to "legacy enabled" in BIOS. I'm not sure if that makes a difference or not. Also, I'm still in Leopard. Thanks again. It's great having sleep back.

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If you look you will see that most values are the same just renamed although the processor info is as per d00d

I wasn't talking specifically about naming, for example compare the packages returned from the _PRT method of the PCIB device in your DSDT and the one returned from the _PRT method of the HUB0 device in the vanilla DSDT (control goes through Else route).

 

Are the PM capabilities set right already at boot, on Gigabyte P35 and P45 boards those capabilities get correct values after system has gone to sleep for first time. That's however too late since OS X checks those values only when booting.

Yes. The quote I've posted earlier is taken from the lspci dump that was taken right after I booted my Linux box.

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I wasn't talking specifically about naming, for example compare the packages returned from the _PRT method of the PCIB device in your DSDT and the one returned from the _PRT method of the HUB0 device in the vanilla DSDT (control goes through Else route).

 

 

Yes. The quote I've posted earlier is taken from the lspci dump that was taken right after I booted my Linux box.

 

In that case you can remove that patch from dsdt, it wont do anything on your boards.

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On P35 and P45 boards output of lspci changes after sleep. Run lspci -nnvv -s 0:1d.7 right after boot, then put system to sleep, wake up and run the same command again. Look for changes on this line:

 

Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0+,D1-,D2-,D3hot+,D3cold+)

 

Here is what I get

 

 

Sun 3 Jan 2010 23:59:57 GMT

LocusOfControl:$ lspci -nnvv -s 0:1d.7 | grep PMEClk

Flags: PMEClk- DSI- D1- D2- AuxCurrent=375mA PME(D0+,D1-,D2-,D3hot+,D3cold+)

 

....

SLEEP

....

LocusOfControl:$ lspci -nnvv -s 0:1d.7 | grep PMEClk

Flags: PMEClk- DSI- D1- D2- AuxCurrent=375mA PME(D0+,D1-,D2-,D3hot+,D3cold+)

LocusOfControl:$

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Here is what I get

 

 

Sun 3 Jan 2010 23:59:57 GMT

LocusOfControl:$ lspci -nnvv -s 0:1d.7 | grep PMEClk

Flags: PMEClk- DSI- D1- D2- AuxCurrent=375mA PME(D0+,D1-,D2-,D3hot+,D3cold+)

 

....

SLEEP

....

LocusOfControl:$ lspci -nnvv -s 0:1d.7 | grep PMEClk

Flags: PMEClk- DSI- D1- D2- AuxCurrent=375mA PME(D0+,D1-,D2-,D3hot+,D3cold+)

LocusOfControl:$

 

Yes, no need for that patch, Gigabyte has finally fixed even one problem with their boards.

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Yes, no need for that patch, Gigabyte has finally fixed even one problem with their boards.

 

Thanks for the info ..

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Update 4: With DVID wake from S3 sleep is sometimes unsuccessful, so I'm not using it currently.

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