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[GUIDE] Making a DSDT.aml for Dell XPS M1330, XPS M1530, and XPS M1730

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The problem is that you have USB Device Wakeup enabled in the BIOS; as it is only active when you have the AC adaptor plugged in it will not force the computer to reboot on battery. Disable it in the BIOS and sleep on AC power will begin working.

 

Thanks!

 

It works for me.

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wondering if anyone is still trying or made any progess with c-states

i thought perhaps since I was having little luck with default apple dsdts, i'd take a look and similar hacks

now if you take a look at this dsdt http://www.insanelymac.com/forum/index.php...p;#entry1348180

 

c-states are working on this notebook and they have ICH8 chipset so something is done is that DSDT which isn't or done poorly in ours

however the LPC device is heavily integrated as is the embedded controller which barely gets a mention in our DSDT perhaps someone with more understanding could have a more in depth look into the similarities and differences in relation to the 2 DSDTs in defining devices related to c-states

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Thanks to everyone for all the support and helpful hints/tips!

 

I've uploaded my latest version of the DSL file for the M1330 (T8300 undervolted but just add your own _PSS values for flavour/flavor). This version also includes SMBusPCI functionality derived from lspci.txt as per immo/FMulder's excellent tips - to verify if correctly loaded search in IORegistry for SMBus and a key with SBus@xx,x (mine is 1f,3) should appear.

 

The SBUS code was adapted from Master Chief's excellent P5K PRO DSDT guide here

 

Worth a look for any aspiring dsl gurus.

Let's try and encourage that mindset into evolving our Dell DSDT's similarly!

 

Cheers

jkbuha

I would say enter: lspci -nn in a terminal window to get something like this:

[color="#FF0000"]00:1f.3[/color] SMBus [0c05]: Intel Corporation 82801I (ICH9 Family) SMBus Controller [color="#FF0000"]8086:2930[/color] (rev 02)

The red parts is what we are interested in. The first one tells us something about the address, being 0x001F0003 – and thus we need to look for: Name (_ADR, 0x001F0003) in our DSDT – and the second one will be use in the following command:

 

Note: Sorry for the use of a slightly taller codebox, but code won't let me use colors.

 

Now we enter: lspci -d 8086:2930 -xxxvvv (with the address from your output) to get something like this:

[color="#FF0000"]
00:1f.3[/color] SMBus: Intel Corporation 82801I (ICH9 Family) SMBus Controller (rev 02)
Subsystem: ASUSTeK Computer Inc. Unknown device 8277
Control: I/O+ Mem+ BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
Status: Cap- 66MHz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Interrupt: pin C routed to IRQ 18
Region 0: Memory at f9fff400 (64-bit, non-prefetchable)
Region 4: I/O ports at [color="#FF0000"]0400[/color]
00: 86 80 30 29 03 00 80 02 02 00 05 0c 00 00 00 00
10: 04 f4 ff f9 00 00 00 00 00 00 00 00 00 00 00 00
20: [color="#FF0000"]01 04 00 00[/color] 00 00 00 00 00 00 00 00 43 10 77 82
30: 00 00 00 00 00 00 00 00 00 00 00 00 12 03 00 00
40: 01 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
50: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
60: 03 04 04 00 00 00 08 08 00 00 00 00 00 00 00 00
70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
80: 04 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
f0: 00 00 00 00 00 00 00 00 86 0f 02 00 00 00 00 00

Again, the red parts are the things we are interested in. This time because they tell us the (I/O) address for Device (SBUS) which may already been incorporated in your DSDT, but under a different name. That is why this info might come in handy, because it gives you two options (0x001F0003 and 0x400) to search for it in your DSDT.

 

Don't have anything that looks like an SBUS in your DSDT then you may want to add it, but it is not required. Not at all. Please note that some people have reported to experience a slow reboot with my OSXRestart.kext and this issue has been traced down to the SBUS specifically – confirmed by Intel (see datasheets) to be a problem with certain ICHn chip sets.

 

Don't have lspci and the lspcidrv.kext? Search is your friend here.

 

I hope this helps people here to find what they are looking for... to incorporate a functional Device (SBUS) ;)

 

And as always: Happy Hacking!

@sparrowdclxvi: This should cover it. If not PM me (I won't be reading this thread).

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Finally got around to adding the SBUS device and additions from jkbuha which was in turn adapted from Master Chief to my generic Any CPU M1530 DSDT (no PSS or CST entries).

 

Here it is:

 

DSDT.dsl.zip

 

And this is different, the one above references SystemIO 0x4000, not sure where that comes from (in SBUS device) from an lspci -d 8086:283e -xxxvvv (which is my SMBus device) I see the following Region 4: I/O ports at 10c0, which says to me that SystemIO should be 0x10c0, so this one has that in there.

 

DSDT.10c0.dsl.zip

 

Will compare the IORegistryReporter differences (if any).

 

Cheers

Brett

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Finally got around to adding the SBUS device and additions from jkbuha which was in turn adapted from Master Chief to my generic Any CPU M1530 DSDT (no PSS or CST entries).

 

Here it is:

 

DSDT.dsl.zip

 

And this is different, the one above references SystemIO 0x4000, not sure where that comes from (in SBUS device) from an lspci -d 8086:283e -xxxvvv (which is my SMBus device) I see the following Region 4: I/O ports at 10c0, which says to me that SystemIO should be 0x10c0, so this one has that in there.

 

DSDT.10c0.dsl.zip

 

Will compare the IORegistryReporter differences (if any).

 

Cheers

Brett

 

Glad to see you working on this again. Good luck! Should I post one of these on the first post?

 

Immo

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...

 

And this is different, the one above references SystemIO 0x4000, not sure where that comes from (in SBUS device) from an lspci -d 8086:283e -xxxvvv (which is my SMBus device) I see the following Region 4: I/O ports at 10c0, which says to me that SystemIO should be 0x10c0, so this one has that in there....

What do you see in registers 20-23 (SMB_BASE—SMBus Base Address Register)?

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What do you see in registers 20-23 (SMB_BASE—SMBus Base Address Register)?

 

With SystemIO @ 10c0 I see:

 

20: c1 10 00 00 00 00 00 00 00 00 00 00 28 10 2e 02

 

Will reboot and check out the other and re-edit.

 

Same with either (which is expected I suppose thinking about it).

 

This is my SBUS under IORegistryExplorer:

 

post-437386-1260995204_thumb.png

 

Shouldn't there be more branches under the MKY0?

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And this is different, the one above references SystemIO 0x4000, not sure where that comes from (in SBUS device) from an lspci -d 8086:283e -xxxvvv (which is my SMBus device) I see the following Region 4: I/O ports at 10c0, which says to me that SystemIO should be 0x10c0, so this one has that in there.

Mine's the same as yours. Will be following this as I'm a little out of my depth here. :):)

 

On my XPS M1330 this is the output of the two commands.

 

lscpi -nn gives:

00:1f.3 SMBus [0c05]: Intel Corporation 82801H (ICH8 Family) SMBus Controller [8086:283e] (rev 02)

 

lspci -d 8086:283e -xxxvvv gives:

00:1f.3 SMBus: Intel Corporation 82801H (ICH8 Family) SMBus Controller (rev 02)
Subsystem: Dell Unknown device 0209
Control: I/O+ Mem+ BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR+ FastB2B- DisINTx-
Status: Cap- 66MHz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Interrupt: pin B routed to IRQ 17
Region 0: Memory at f6dfb700 (32-bit, non-prefetchable)
Region 4: I/O ports at 10c0
00: 86 80 3e 28 03 01 80 02 02 00 05 0c 00 00 00 00
10: 00 b7 df f6 00 00 00 00 00 00 00 00 00 00 00 00
20: c1 10 00 00 00 00 00 00 00 00 00 00 28 10 09 02
30: 00 00 00 00 00 00 00 00 00 00 00 00 11 02 00 00
40: 01 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
50: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
60: 03 04 04 00 00 00 08 08 00 00 00 00 00 00 00 00
70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
80: 04 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
f0: 00 00 00 00 00 00 00 00 86 0f 05 00 00 00 00 00

 

Which shows mine as slightly different to Brett's.

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Mine's the same as yours. Will be following this as I'm a little out of my depth here. :rolleyes::D

 

On my XPS M1330 this is the output of the two commands.

 

lscpi -nn gives:

00:1f.3 SMBus [0c05]: Intel Corporation 82801H (ICH8 Family) SMBus Controller [8086:283e] (rev 02)

 

lspci -d 8086:283e -xxxvvv gives:

00:1f.3 SMBus: Intel Corporation 82801H (ICH8 Family) SMBus Controller (rev 02)
Subsystem: Dell Unknown device 0209
Control: I/O+ Mem+ BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR+ FastB2B- DisINTx-
Status: Cap- 66MHz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Interrupt: pin B routed to IRQ 17
Region 0: Memory at f6dfb700 (32-bit, non-prefetchable)
Region 4: I/O ports at 10c0
00: 86 80 3e 28 03 01 80 02 02 00 05 0c 00 00 00 00
10: 00 b7 df f6 00 00 00 00 00 00 00 00 00 00 00 00
20: c1 10 00 00 00 00 00 00 00 00 00 00 28 10 09 02
30: 00 00 00 00 00 00 00 00 00 00 00 00 11 02 00 00
40: 01 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
50: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
60: 03 04 04 00 00 00 08 08 00 00 00 00 00 00 00 00
70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
80: 04 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
f0: 00 00 00 00 00 00 00 00 86 0f 05 00 00 00 00 00

 

Which shows mine as slightly different to Brett's.

 

Interesting it is only registers 2e and 2f that are different in the whole output. Which from the manual are the Subsystem ID registers (above yours will say Dell unknown device 0209, mine says Dell unknown device 022e. 1082 refers to the SVID (Vendor ID) which must be Dell?

 

If we have 20 - 23 as c1 10 00 00, bit 0 is reserved and 1, bits 1:4 are RO and reserved, bits 5:15 are the address and bits 16:31 are also reserved. How do I figure out the base address from that? I can convert each of the hex digits to binary easy enough to figure out which bits are which, I can assume that c1 would reference 1100 0001 giving bit 0 as 1 (which would be right), leaving bits 5:7 as 011 (or should I say 7:5 as 110) then giving 15:8 as 10 or 0000 1000 (8:15 as 0001 0000) so how do I get that to the right base address? Unsure of how I should put them together. Yes I'm confusing myself.

 

Also I see you have native shutdown and restart working on your M1330, any tricks to that one?

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Mine's the same as yours. Will be following this as I'm a little out of my depth here. :rolleyes::D

 

On my XPS M1330 this is the output of the two commands.

 

lscpi -nn gives:

00:1f.3 SMBus [0c05]: Intel Corporation 82801H (ICH8 Family) SMBus Controller [8086:283e] (rev 02)

 

lspci -d 8086:283e -xxxvvv gives:

00:1f.3 SMBus: Intel Corporation 82801H (ICH8 Family) SMBus Controller (rev 02)
Subsystem: Dell Unknown device 0209
Control: I/O+ Mem+ BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR+ FastB2B- DisINTx-
Status: Cap- 66MHz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Interrupt: pin B routed to IRQ 17
Region 0: Memory at f6dfb700 (32-bit, non-prefetchable)
Region 4: I/O ports at 10c0
00: 86 80 3e 28 03 01 80 02 02 00 05 0c 00 00 00 00
10: 00 b7 df f6 00 00 00 00 00 00 00 00 00 00 00 00
20: c1 10 00 00 00 00 00 00 00 00 00 00 28 10 09 02
30: 00 00 00 00 00 00 00 00 00 00 00 00 11 02 00 00
40: 01 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
50: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
60: 03 04 04 00 00 00 08 08 00 00 00 00 00 00 00 00
70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
80: 04 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
f0: 00 00 00 00 00 00 00 00 86 0f 05 00 00 00 00 00

 

Which shows mine as slightly different to Brett's.

 

FYI

The difference is at position 2Eh–2Fh which according to Table 137 on page 625 of Intel the ICH8 spec (313056.pdf) is the Subsystem Identification, which differs between the two model. So I presume we can ignore this.

 

On the LPCB (cstates) issue i've tried to implement the same device configuration as master chiefs DSDT, e.g. adding the following at _PST (PrepareToSleep)

 

    Method (_PTS, 1, NotSerialized)
   {

       If (LEqual (Arg0, 0x05))                               // S5 (shutdown).
       {
           Store (One, \_SB.PCI0.LPCB.AG3E)                   // Return to S5 after a power failure.
       }
       Else                                                   // S1, S3 or S4 (S2 is not supported).
       {
       Store (SMI (0x46, Zero), MIS1)
       SMI (0x8A, Arg0)
}
   }

 

and adding the AG3E to the LPCB device..

 		OperationRegion (LPC0, PCI_Config, 0xA0, 0x54)	// General PM Configuration 3 Register (ICH9R-316972.pdf / 13.8.1.3 / page 492).
               Field (LPC0, AnyAcc, NoLock, Preserve)
               {
                       ,   10, 
                   XPME,   1,					// Bit 10 - BIOS_PCI_EXP_EN.
                           Offset (0x04),			// General PM Configuration 3 Register (ICH9R-316972.pdf / 13.8.1.3 - / page 492).
                   AG3E,   1,					// Bit 0 – AFTERG3_EN.
                           Offset (0x50),			// Root Complex Base Address Register (ICH9R-316972.pdf / 13.1.35 / page 451).
                   RCBA,   32					// Root Complex Base Address.
               }

 

and according the the ICH8 spec these addresses are the same as the ICH9 spec which masterchiefs dsdt is based on. So this should work.

I've noticed that our PowerManagement functions in our DSDT are based on a Method called SMI i'm thinking that they are conflicting with each other. I'll keep on trying, hopefully i get some results....

 

MasterChiefs OSXRestart.kext works for restart on M1530XPS.

Thanks to MasterChief for this fix!!!

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Also I see you have native shutdown and restart working on your M1330, any tricks to that one?

 

Shutdown works because I have Intel GMA X3100 graphics, not Nvidia. It's worked from day 1.

Restart works (mostly) with Master Chiefs OSXRestart from here. The mostly is due to something not working correctly in my DSDT I think. Still working on that.

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I have the dell studio 1440 otherwise known as the dell 14z, could someone with the 1330 or 1530 please post their original untouched DSDT.aml or DSDT.dsl? I'd really like to compare the changes carefully as I apply similar changes to the 1440.

 

Thanks!

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I have the dell studio 1440 otherwise known as the dell 14z, could someone with the 1330 or 1530 please post their original untouched DSDT.aml or DSDT.dsl? I'd really like to compare the changes carefully as I apply similar changes to the 1440.

 

Thanks!

Attached is mine generated from Ubuntu using this guide.

DSDT_r2_INT430_SYSFexxx_1001_INTL_20050624.aml.zip

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Hello,

 

I am using a DELL XPS M1330, T8300, Intel GMA X3100. Thank's to "superhai" I am running SL 10.6. Next step is to generate a DSDT.aml for my system.

 

The postet DSDT.aml of "immo" at the beginning of this thread comes really near to my configuration, except the NVidia graphics.

 

- Is it possible to change "immo's" DSDT.aml to run with a X3100?

- What do I have to do?

 

Thank's a lot for your help.

 

Best regards,

Michael

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Hello,

 

I have a problem generating my dsdt.dsl. I am using the alternative without a linux boot cd. I have copied the "iasl" and "getDSDT.sh" into /sbin and run "getDSDT.sh" in my working directory. After that I have a dsdt.dat. By running "iasl -d dsdt.dat" nothing happens. No DSDT.dsl will be created. What could be the problem?

 

Thanks a lot and best regards,

Michael

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Hello,

 

I have a problem generating my dsdt.dsl. I am using the alternative without a linux boot cd. I have copied the "iasl" and "getDSDT.sh" into /sbin and run "getDSDT.sh" in my working directory. After that I have a dsdt.dat. By running "iasl -d dsdt.dat" nothing happens. No DSDT.dsl will be created. What could be the problem?

 

Thanks a lot and best regards,

Michael

 

Hi Michael. Others on this thread have gotten their DSDTs to work with Intel graphics and referred to the guides they used. It's a matter of looking back through the posts.

 

Sorry I'm not sure about the iasl problem. Perhaps you are trying to write to a folder that you do not have write access to (maybe you used sudo to make the directory?) Try running the command from your home folder.

 

Immo

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Hello,

 

I still have problems decompiling my dsdt.dat.

I created a new directory in /downloads, called /DSDT. With terminal I executed the command getDSDT.sh in the folder /DSDT and now I have my dsdt.dat. Then I tried to decompile it by using "iasl -d dsdt.dat" in terminal in the folder /DSDT, but there is no dsdt.dsl.

 

Attached you will find my dsdt.dat. Maybe someone could help me to decompile it and would attache it to the posting.

 

Thanks a lot.

 

Best regards,

Michael

dsdt.dat.zip

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Hello,

 

I still have problems decompiling my dsdt.dat.

I created a new directory in /downloads, called /DSDT. With terminal I executed the command getDSDT.sh in the folder /DSDT and now I have my dsdt.dat. Then I tried to decompile it by using "iasl -d dsdt.dat" in terminal in the folder /DSDT, but there is no dsdt.dsl.

 

Attached you will find my dsdt.dat. Maybe someone could help me to decompile it and would attache it to the posting.

 

Thanks a lot.

 

Best regards,

Michael

 

Seems like these command line utilities are giving you trouble. Why not just download DSDTSE (search is your friend). I noticed that there seems to be an editor only version. Make sure you get the one with the tools.

 

Aw heck just go HERE

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Hi All,

 

I'm trying to use th M1330 DSDT.aml included on the first page of this thread, but my system simple hangs on boot. I edited the boot.plist and smbios.plist, and set the permissions correctly. Am I missing something?

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Hi All,

 

I'm trying to use th M1330 DSDT.aml included on the first page of this thread, but my system simple hangs on boot. I edited the boot.plist and smbios.plist, and set the permissions correctly. Am I missing something?

 

 

Read the section about kexts again to make sure that you've removed the ones mentioned. Use -s on boot to see if you can get information on what occurs when it hangs.

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hye..im using dell insipron 1320...n my sleep dont working..shutdown n restart working great..s

 

should i make changes to my dsdt ?im using dsdt patcher to generate mydsdt..

 

anyone has similar dsdt just for sleep?my graphic,,sound all good..

 

i think my spec similar to dell 1420...

 

thx

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hye..im using dell insipron 1320...n my sleep dont working..shutdown n restart working great..s

 

should i make changes to my dsdt ?im using dsdt patcher to generate mydsdt..

 

anyone has similar dsdt just for sleep?my graphic,,sound all good..

 

i think my spec similar to dell 1420...

 

thx

 

 

No promises since I don't have your computer, but there's a good chance that if you follow the guide you will get sleep working. Looks like that computer has either Intel or ATI graphics and the guide does not cover either, although others here have gotten Intel to work if you read through the posts.

 

Your only other hope is to find someone with the EXACT computer who has already done it (sometimes the CPU can vary depending on the DSDT).

 

P.S. you mentioned almost nothing about your computer and install.

You should mention the OS-X version, method used to install it, computer model, and options. Many of us do it in our sigs.

 

Immo

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I'm guessing I'm just a little lost in this whole DSDT.aml thing... Here's what I've done... Currently I'm running Snow Leopard 10.6.2 on my XPS1530 that's described in my sig. (T7500 4gb ram, 8600gt). Anyways I've gone ahead and used the included generic 1530 DSDT.aml file from the first post and am very pleased with the overall fact that everything seems to work. However, battery life is a major thing... It seems with this being a CPU independent file, Pstates aren't working and my battery is saying it'll last 1:15minutes...

 

So anyways, I am not sure if anyone will help on this or not... but I had found a partially working T7500 8600gt 1530 DSDT file inthis thread

 

I have been using DSDTse to attempt to find whats different so I could perhaps add the CPU specific items but am at a total loss. Is there anyone here that can help out on this? I'm going to keep reading and reading, but have a feeling that there has to be a way to combine the generic with the T7500's that is already built so I can have working P-States...

 

Anyways, thanks in advance to anyone who helps out.

 

EDIT: after reading around, it looks like what I need to change is the _PSS portions of the file... So I grabbed one that was compiled with everything working already (the one included in Tailsman's file) and swapped out the values of the _PSS area. Is this all that needs to be changed? I was looking at the CPU values and they seemed to be identical otherwise...

 

Hopefully this will work.. going to install it now and cross my fingers!

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