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Master Chief's P5K PRO ACPI Warfare

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you mean some sort of EFI string?

No, I didn't, should I?

No. And using both of them would be a problem yes.

 

And the problem is that you are using 10.5 (ACPI CA 20070126) instead of 10.6 (ACPI CA 20071219) which is what this thread is all about. However, you can use this Method instead of DTGP with all its unused arguments:

    Method (MCDP, 2, NotSerialized)                                              // New Method V1.2 – By Master Chief.
   {
       If (LEqual (Arg0, Zero))                                                 // Function index: 0 (first call).
       {
           Store (Buffer (One)
           {
               0x03
           }, Arg1)
       }

       [color="#FF0000"]Return (One)[/color]                                                             // For backwards compatibility with 10.5
   }

But I have no recollection whatsoever about Methods MCID and MCBN. I can't even remember if I ever checked them with 10.5.8

 

Note: I might look into it at a later time, but I am not making any promises.

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No. And using both of them would be a problem yes.

 

And the problem is that you are using 10.5 (ACPI CA 20070126) instead of 10.6 (ACPI CA 20071219) which is what this thread is all about. However, you can use this Method instead of DTGP with all its unused arguments:

  see post #479  

But I have no recollection whatsoever about Methods MCID and MCBN. I can't even remember if I ever checked them with 10.5.8

 

Note: I might look into it at a later time, but I am not making any promises.

Thnks,

BTW, even without modifications, MCDP working fine for me in 10.5.8

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WORK IN PROGRESS

 

I started to work on a few new changes for DSDT V3.3 and I am still trying to understand the on-board VT6306 (VIA) FireWire chip, which opened up quite a few new registers. No. It's not just what we see with lspci -d 1106:3044 -xxxvvv

04:03.0 FireWire (IEEE 1394): VIA Technologies, Inc. VT6306 Fire II IEEE 1394 OHCI Link Layer Controller (rev c0) (prog-if 10 [OHCI])
Subsystem: ASUSTeK Computer Inc. Unknown device 81fe
Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 64 (8000ns max), Cache Line Size: 32 bytes
Interrupt: pin A routed to IRQ 16
Region 0: Memory at febff800 (32-bit, non-prefetchable)
[color="#FF0000"]Region 1: I/O ports at ec00 [disabled][/color]
Capabilities: [50] Power Management version 2
	Flags: PMEClk- DSI- D1- D2+ AuxCurrent=0mA PME(D0-,D1-,D2+,D3hot+,D3cold+)
	Status: D0 PME-Enable- DSel=0 DScale=0 PME-
00: 06 11 44 30 06 00 10 02 c0 10 00 0c 08 40 00 00
10: [color="#0000FF"]00 f8 bf fe[/color] 01 ec 00 00 00 00 00 00 00 00 00 00
20: 00 00 00 00 00 00 00 00 00 00 00 00 43 10 fe 81
30: 00 00 00 00 50 00 00 00 00 00 00 00 10 01 00 20
40: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
50: 01 00 02 e4 00 00 00 00 00 00 00 00 43 10 00 00
60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

These registers are standard for all FireWire controllers, and thus register 0x10 is "OHCI Base Address Register" is the one we want to read (0xfebff800). This is the one we are going to use as our base address – note the blue bytes in the output, which is the address in reverse. And Microsoft has a free copy of 1394 Open Host Controller Interface Specification available for download. Which I gratefully downloaded.

 

That and the Texas Instruments TSB43AB23 datasheet helped me understand the registers – I did not have the correct datasheet, but now do thanks to DB1.

 

Anyway. The next thing I usually do is to write a plain simple script to read the registers with reggie_se but I only got as far as the first 53 register today. I'll attach it for you to give it a go. And I am hoping for someone here to step in, while I sleep maybe, so that we can use a flexible base address. And only use offsets instead of fixed addresses. I'm just too tired for it right now (I need sleep).

 

But just when I thought to have see it all, I read about even more registers. Another 16 for the TSB43AB23. Controlled by the PHY Control Register at offset 0xEC. Interesting. My I/O ports are disabled (see red line in output) and I have yet to figure out why, but that new VIA datasheet should help.

 

Some of you might think: "What do I care about FireWire". Well. Note the 'OHCI' part and think about using a Bluetooth dongle for your new Apple Magic Mouse, or a wireless Apple keyboard. No. This isn't just FireWire we're talking about, but this is part of us trying to figure out how stuff works on our hack. I am also trying to solve a Sitecom Bluetooth dongle problem, where a certain checkbox is dimmed. Always eager to learn new stuff :)

 

I need a shot of caffeine now, or I might fall asleep on my Apple keyboard. On a second thought. Scrap that. I am going to bed. Lol Me human. Need sleep. Later...

 

Right. Had a quick look at the new datasheet and it is time to do some testing...

OHCI_registers.sh.zip

reggie_se.zip

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WORK IN PROGRESS

I don't have a datasheet for the on-board VT6306

 

Here you go:VT6306.pdf

 

Sorry cannot help with script output reggie wont play with me!

 

bash-3.2# /Users/db1/Desktop/untitled\ folder/OHCI-registers.sh 
WARNING: Could not determine processor information.
WARNING: Could not determine memory controller information.
WARNING: Could not determine Operating System information.
. 4.7.2 (263)
Memory Address - 0x00000000febff800 (local)
ERROR: unable to map address: x4273993728lx "Failure in I/O Kit (Are the kexts loaded?) (-10993)"
WARNING: Could not determine processor information.
WARNING: Could not determine memory controller information.
WARNING: Could not determine Operating System information.
etc, etc,

 

Is it because I have my kexts on EFI partition?

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I need help

 

I try to have my cpu running within my dsdt but I didn t resolve how to do it,

 

Mine is seen as 3,8 Ghz in snow and I didn t overclock it,

 

I run ssdt under linux for each core,

 

Can you explain me ?

 

Here is my dsdt and 4 core from linux

 

Thanks

Archive.zip

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Hi master, your code for speedstep works great, but i have only a question. I have these values in my FACP table:

_CST Support : E3

[060h 0096 2] C2 Latency : 0065

[062h 0098 2] C3 Latency : 03E9

 

where I post, for the 'correct, my values in your code or leave the way' is? Sorry for my english.

I have test 100000 ways but i don't have the certainty

 

Thank's a lot ;)

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Hi master, your code for speedstep works great, but i have only a question. I have these values in my FACP table:

_CST Support : E3

[060h 0096 2] C2 Latency : 0065

[062h 0098 2] C3 Latency : 03E9

 

where I post, for the 'correct, my values in your code or leave the way' is? Sorry for my english.

I have test 100000 ways but i don't have the certainty

 

Thank's a lot ;)

Your MB has no support for C2/C3. See also this post in the Vanilla SpeedStep thread.

 

I need help

I try to have my cpu running within my dsdt but I didn t resolve how to do it,

Mine is seen as 3,8 Ghz in snow and I didn t overclock it,

I run ssdt under linux for each core,

Can you explain me ?

That's just cosmetic. You can 'fix' this by using Chameleon, and I presume BootThink, or use some sort of SMBIOS injector kext. Nothing to worry about.

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Your MB has no support for C2/C3. See also this post in the Vanilla SpeedStep thread.

 

What? Again :D

 

Your code for my mobo works great, the other code(again) in the link that you posted me, instead give me kernel panic 3 on 6 restart... I tested it many many times, also in past

Beacuase i say: what? In bios I have the option for c1e and ypur code works for me

 

You are sure? ;)

 

Master, in attached there are my DSDT.aml and dsl, if you can, please, if you can, you may be able to understand why the code in down makes me a kernel panic, but instead your work perfectly? In my code is there something that contrasts with this code?

 

Thanks, again

 

PS. the valus in down are the original, but obviously I try with my value, and nothing..

The error is:"Should have 2 threads, but only found 3 for die 1", etc etc etc

 

 

Scope (_PR)
   {
       Processor (CPU0, 0x00, 0x00000810, 0x06) {}
       Processor (CPU1, 0x01, 0x00000810, 0x06) {}
       Processor (CPU2, 0x02, 0x00000810, 0x06) {}
       Processor (CPU3, 0x03, 0x00000810, 0x06) {}
   }

   Scope (_PR.CPU0)
   {
       Method (_PSS, 0, NotSerialized)
       {
           Return (Package (0x03)
           {
               Package (0x06)
               {
                   Zero, 
                   Zero, 
                   0x0A, 
                   0x0A, 
                   0x0820, 
                   Zero
               }, 

               Package (0x06)
               {
                   Zero, 
                   Zero, 
                   0x0A, 
                   0x0A, 
                   0x071B, 
                   One
               }, 

               Package (0x06)
               {
                   Zero, 
                   Zero, 
                   0x0A, 
                   0x0A, 
                   0x0616, 
                   0x02
               }
           })
       }

       Method (_PSD, 0, NotSerialized)
       {
           Return (Package (0x05)
           {
               0x05, 
               Zero, 
               Zero, 
               0xFC, 
               0x04
           })
       }

       Method (_CST, 0, NotSerialized)
       {
           Return (Package (0x02)
           {
               One, 
               Package (0x04)
               {
                   ResourceTemplate ()
                   {
                       Register (FFixedHW, 
                           0x01,               // Bit Width
                           0x02,               // Bit Offset
                           0x0000000000000000, // Address
                           0x01,               // Access Size
                           )
                   }, 

                   One, 
                   0x9D, 
                   0x03E8
               }
           })
       }
   }

   Scope (_PR.CPU1)
   {
       Method (_PSS, 0, NotSerialized)
       {
           Return (^^CPU0._PSS ())
       }

       Method (_PSD, 0, NotSerialized)
       {
           Return (^^CPU0._PSD ())
       }

       Method (_CST, 0, NotSerialized)
       {
           Return (Package (0x04)
           {
               0x03, 
               Package (0x04)
               {
                   ResourceTemplate ()
                   {
                       Register (FFixedHW, 
                           0x01,               // Bit Width
                           0x02,               // Bit Offset
                           0x0000000000000000, // Address
                           ,)
                   }, 

                   One, 
                   Zero, 
                   0x03E8
               }, 

               Package (0x04)
               {
                   ResourceTemplate ()
                   {
                       Register (FFixedHW, 
                           0x08,               // Bit Width
                           0x00,               // Bit Offset
                           0x0000000000000414, // Address
                           ,)
                   }, 

                   0x02, 
                   One, 
                   0x01F4
               }, 

               Package (0x04)
               {
                   ResourceTemplate ()
                   {
                       Register (FFixedHW, 
                           0x08,               // Bit Width
                           0x00,               // Bit Offset
                           0x0000000000000415, // Address
                           ,)
                   }, 

                   0x03, 
                   0x55, 
                   0xFA
               }
           })
       }
   }

   Scope (_PR.CPU2)
   {
       Method (_PSS, 0, NotSerialized)
       {
           Return (^^CPU0._PSS ())
       }

       Method (_PSD, 0, NotSerialized)
       {
           Return (^^CPU0._PSD ())
       }

       Method (_CST, 0, NotSerialized)
       {
           Return (^^CPU1._CST ())
       }
   }

   Scope (_PR.CPU3)
   {
       Method (_PSS, 0, NotSerialized)
       {
           Return (^^CPU0._PSS ())
       }

       Method (_PSD, 0, NotSerialized)
       {
           Return (^^CPU0._PSD ())
       }

       Method (_CST, 0, NotSerialized)
       {
           Return (^^CPU1._CST ())
       }
   }

   Name (_S0, Package (0x04)
   {
       Zero, 
       Zero, 
       Zero, 
       Zero
   })
   Name (SS1, Package (0x04) 

aml_dsl.zip

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What? Again :)

 

Your code for my mobo works great, the other code(again) in the link that you posted me, instead give me kernel panic 3 on 6 restart... I tested it many many times, also in past

Beacuase i say: what? In bios I have the option for c1e and ypur code works for me

 

You are sure? :(

 

Master, in attached there are my DSDT.aml and dsl, if you can, please, if you can, you may be able to understand why the code in down makes me a kernel panic, but instead your work perfectly? In my code is there something that contrasts with this code?

 

Thanks, again

 

PS. the valus in down are the original, but obviously I try with my value, and nothing..

The error is:"Should have 2 threads, but only found 3 for die 1", etc etc etc

 ... see post #487

Maybe someone with a similar board can help you. I can't, because I need to repair a punctured drywall and finish my plasterboards (ceiling) so that I can start painting.

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What? Again :(

[cut]

You can use the DSDT in the archive in my signature, it's cloned from MC's 3.2 DSDT and everything works nicely :) .

You have to do some minor adjustments for your CPU (change 0x02 to 0x04 in _PSD, modify _PSS with this guide and add back the third and fourth core that I removed - I have a dual core CPU).

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You can use the DSDT in the archive in my signature, it's cloned from MC's 3.2 DSDT and everything works nicely :D .

You have to do some minor adjustments for your CPU (change 0x02 to 0x04 in _PSD, modify _PSS with this guide and add back the third and fourth core that I removed - I have a dual core CPU).

 

 

Thanks, i try, but it is the same code that i use and like i say it's works great. Only i would tried the other code, that posted by me, but THIS gives me kernel panic :wacko:

Question: you have try this code or only the code in this thread?

Repeat, this code in this thread on my/our mobo works amazing :P

Sorry for my english,, ciao!

 

ops, scusa, mi sono accorto ora che sei italiano, il problema non e' il codice, questo, che non lavora, ma l'altro quello nella sezione intelpeedstep, che da' kp sulla nostra piastra, almeno per me, percio' ti chiedevo se avessi provato l'altro codice. Questo lavora bene, davvero bene :D

Ascolta, nella cartella dal link che hai in firma, c'e' un p5qdeluxe.kext, mi spieghi a che serve, non l'ho mai sentito :D

Ciao e grazie

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Great. I finished painting and twenty minutes later... and FireWire HotPlug is working. This will be part of our next update (DSDT V3.3).

 

 

Great news Master Chief!!!

 

Thanks for your hard work!

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That's just cosmetic. You can 'fix' this by using Chameleon, and I presume BootThink, or use some sort of SMBIOS injector kext. Nothing to worry about.

Sorry but I don't think it's just cosmetic because I need voodoopower to run correctly my cpu.

 

Without I see all the cores x9 and the fans always on.

 

I think I made a mistake in my dsdt. Where ? I don't know

 

If somebody can have a look or somebody with the same cpu it will be very kind.

 

Thanks very much

 

Master Chief Thanks for your nice work for P5K PRO users and others

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Sorry but I don't think it's just cosmetic because I need voodoopower to run correctly my cpu.

 

Without I see all the cores x9 and the fans always on.

 

I think I made a mistake in my dsdt. Where ? I don't know

 

If somebody can have a look or somebody with the same cpu it will be very kind.

 

Thanks very much

 

Master Chief Thanks for your nice work for P5K PRO users and others

in addition to set correct P-states of your CPU you should properly set MAC-model, to start native speed step working.

And I think your fans will always be on, cause at a moment there is no "published" way to deal with fan speed.

 

BTW, on a previous page you can find my DSDT, I posted to Master (since that time i made some changes, but CPU section working, at least regarding P-states changing)

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Cool!!!!!!!!!!!!!!!!!!!!!!!!!!

 

Great. I finished painting and twenty minutes later... and FireWire HotPlug is working. This will be part of our next update (DSDT V3.3).

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Known Issues

1) Sleep after an idle period doesn't work with TSSTcorp DVD's.

2) Apple Menu -> Restart doesn't work.

3) FireWire hotplug only works after sleep.

 

Workarounds

1) Use the Autosleep script.

2) Use my OSXRestart.kext.

3) Sleep hack before connecting FireWire hardware.

 

Note: The latest version of OSXRestart.kext is now available from here only!

 

Release Notes

Release notes for the attached DSDT versions can be found throughout the thread, but here are a few pointers to make it easy for you:

 

DSDT V2.1 post #21 (page 2)

DSDT V2.2 post #28 (page 2)

DSDT V2.3 post #42 (page 3)

DSDT V2.4 post #49 (page 3)

DSDT V2.5 post #58 (page 3)

DSDT V2.6 post #74 (page 4)

DSDT V2.7 post #97 (page 5)

DSDT V2.8 post #104 (page 6)

DSDT V2.9 post #132 (page 7)

DSDT V3.0 post #186 (page 10)

DSDT V3.1 post #272 (page 14)

DSDT V3.2 post #242 (page 22)

 

And for iasl (20091111) post #319 (page 17) and OSXRestart post #325 (page 17) and post # 432 (page 23).

 

Updates

I keep working on new updates (for now) and thus we kindly ask you to read the whole thread, before you ask obvious questions. And in case you missed it: the latest version of OSXRestart.kext is available for download here. Don't download the old one attached here!!

 

Attached Files

 

Hi Master Chief,

 

Is the compiler that you have posted is built with debug feature turned on? If yes where should look for my debug statements in which log? If not can we have a version with debug feature turned on?

Thanks

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Hi Master Chief,

 

Is the compiler that you have posted is built with debug feature turned on? If yes where should look for my debug statements in which log? If not can we have a version with debug feature turned on?

Thanks

Non-debug. But I think that you are talking about ACPI Debug () statements. Right? You need to install the debug kernel in order for this to work. I don't know if you can download the .dmg without having ADC membership, but I cannot share mine – for obvious reasons.

 

Google search?

 

Sorry but I don't think it's just cosmetic because I need voodoopower to run correctly my cpu.

Trust me it is.

 

BTW: I received a new Intel Q9650 Extreme yesterday (for testing) which I am currently running at stock speed (3GHz) with a passive CPU cooler at 35-42 degrees Celsius.

 

Without I see all the cores x9 and the fans always on.

Do you have "CPU Q-Fan Control" (under Hardware Monitor) set to [enabled] in your BIOS?

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in addition to set correct P-states of your CPU you should properly set MAC-model, to start native speed step working.

 

Yes I did what Master Chief has written on post #3 : replace: "MacPro3,1" into "P5K PRO" in:

 

/System/Library/Extensions/IOPlatformPluginFamily.kext/Contents/PlugIns/ACPI_SMC_PlatformPlugin.kext/Contents/info.plist

 

Thank you Vako I take your dsdt and will look for differences. You have the same cpu It would be right.

 

Thanks

 

BTW: I received a new Intel Q9650 Extreme yesterday (for testing) which I am currently running at stock speed (3GHz) with a passive CPU cooler at 35-42 degrees Celsius.

 

Mine is 48-55 degrees celsius.

 

Do you have "CPU Q-Fan Control" (under Hardware Monitor) set to [enabled] in your BIOS?

 

Yes it's enabled in my bios.

 

Thanks

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Hi Master Chief,

 

Is the compiler that you have posted is built with debug feature turned on? If yes where should look for my debug statements in which log? If not can we have a version with debug feature turned on?

Thanks

Master Chief,

Please ignore my request. Know I understand for getting Debug output the kernel should be debug enabled? right.

Regards,

Artimess

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Non-debug. But I think that you are talking about ACPI Debug () statements. Right? You need to install the debug kernel in order for this to work. I don't know if you can download the .dmg without having ADC membership, but I cannot share mine – for obvious reasons.

Purely as a "proof of concept" test, I tried and succeeded in downloading kernel_debug_kit_10.6.2_10c540.dmg from the Apple Developer Connection site. Doing so did require me to sign in as an ADC member, but all I have is the free ADC Online Membership so the debug kernel (& stuff) is available to just ordinary folks who might have a need for it. (Thank you, Apple. :) )

 

For those who do not have a membership but might interested here's a link to the Apple Developer Connection membership comparisons/signup page.

 

I found the kernel debug .dmg in the "Developer Tools" section of the ADC site. Don't know if it is also listed in other sections. The ADC site is still mostly one big honkin' mystery blob of "stuff" to me at the moment. I intend to nibble away at it, but it's going to take some time ... ;)

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Purely as a "proof of concept" test, I tried and succeeded in downloading kernel_debug_kit_10.6.2_10c540.dmg from the Apple Developer Connection site. Doing so did require me to sign in as an ADC member, but all I have is the free ADC Online Membership so the debug kernel (& stuff) is available to just ordinary folks who might have a need for it. (Thank you, Apple. ;) )

 

For those who do not have a membership but might interested here's a link to the Apple Developer Connection membership comparisons/signup page.

 

I found the kernel debug .dmg in the "Developer Tools" section of the ADC site. Don't know if it is also listed in other sections. The ADC site is still mostly one big honkin' mystery blob of "stuff" to me at the moment. I intend to nibble away at it, but it's going to take some time ... :rolleyes:

Thanks for the confirmation. And make sure to make a backup before you even try to install the dmg Don't say I didn't warn you!!!

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And make sure to make a backup before you even try to install the dmg Don't say I didn't warn you!!!

 

Thanks for the warning, MC. But before I try anything like that I figured I might, oh, learn how to use the debugger ... :D

 

As I say, I'm trying to nibble my way into the X-code world. Still have a fair ways to go before I reach a "critical mass" of comprehension ... ;)

 

-irrational john

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WORK IN PROGRESS

...

Right. Had a quick look at the new datasheet and it is time to do some testing...

 

Hi to all,

for now I'm registered to apple developer and downloading the sdk. I have the P5KC with R bios, and the firewire uses same chip as P5K Pro.

I can confirm your dsdt is working very stable on my board but I've made some edit:

1) Firewire _GPE value form 18 to 1E ito make it work with my MoBo (in device and in scope)

2) LPCB injection (i think because i've an ICH9 not an ICH9+ chipset)

3) Removed EC and 3 related lines that gave me errors after the remotion of EC

3) LAN0 device (on my board it's an AttansicL1) adding Name (_SUN) and device name (blue in example)

P5K, P5KC or P5KR user can try this dsdt.dsl

 

Device (LAN0)
               {
                   Name (_ADR, Zero)
                   [color="#0000FF"]Name (_SUN, 0x0B)[/color]
                   Name (_PRW, Package (0x02)
                   {
                       0x09, 
                       0x03
                   })
                   Method (_DSM, 4, NotSerialized)
                   {
                       Store (Package (0x06)
                           {
                               "built-in", 
                               Buffer (One)
                               {
                                   0x01
                               }, 

                               "location", 
                               Buffer (0x02)
                               {
                                   "1"
                               }[color="#0000FF"], 

                               "name", 
                               Buffer (0x25)
                               {
                                   "Attansic1 L Ethernet Gigabit Adapter"
                               }[/color]
                           }, Local0)
                       MCDP (Arg2, RefOf (Local0))
                       Return (Local0)
                   }
               }

 

Can I help with my dump? If you need i can test on my board your mod for the firewire hotplug. With the 3.2 dsdt adapted to my MoBo I can use the firewire HD after sleep, but if boot up with 2 HD connected in chain I can't see mouse cursor or use the keyboard until I switch off the FW devices.

During the no mouse cursor screen, if I click for example the power button on the keyboard the window with confirmation for sleep, shutdown etc. will come up only after FW are not connected anymore.

Kext i'm using now:

/Extra/Extensions/fakesmc.kext

/Extra/Extensions/LegacyAppleHDAHardwareConfigDriver.kext

/Extra/Extensions/LegacyHDAPlatformDriver.kext

 

/System/Library/Extensions/AttansicL1Ethernet.kext

 

Known Issues

 

1) FireWire hotplug only works after sleep.

2) Keyboard and Mouse not visible on boot with firewire HD connected

3) Attansic driver need restart after sleep.

 

Workarounds

 

1) Sleep hack before connecting FireWire hardware.

2) Disconnect The FW devices (maybe a stop on boot script will work, i don't know how to make it).

3) Use the attansic reload script attached to this post

 

attansic_reload.zip

 

Thanks MasterChief for sharing with us your dsdt and your finding.

 

EDIT: Installed devtools now here it is what i get from the script and lspci:

. 4.7.2 (263)
Memory Address - 0x00000000febff800 (local)
Address 0xfebff800       0x01010010          |0 0 0 0|0 0 0 1|0 0 0 0|0 0 0 1|0 0 0 0|0 0 0 0|0 0 0 1|0 0 0 0|
. 4.7.2 (263)
Memory Address - 0x00000000febff804 (local)
Address 0xfebff804       0x00000000          |0 0 0 0|0 0 0 0|0 0 0 0|0 0 0 0|0 0 0 0|0 0 0 0|0 0 0 0|0 0 0 0|
. 4.7.2 (263)
Memory Address - 0x00000000febff808 (local)
Address 0xfebff808       0x00000000          |0 0 0 0|0 0 0 0|0 0 0 0|0 0 0 0|0 0 0 0|0 0 0 0|0 0 0 0|0 0 0 0|
. 4.7.2 (263)
Memory Address - 0x00000000febff80c (local)
Address 0xfebff80c       0x00000000          |0 0 0 0|0 0 0 0|0 0 0 0|0 0 0 0|0 0 0 0|0 0 0 0|0 0 0 0|0 0 0 0|
. 4.7.2 (263)
Memory Address - 0x00000000febff810 (local)
Address 0xfebff810       0x00000000          |0 0 0 0|0 0 0 0|0 0 0 0|0 0 0 0|0 0 0 0|0 0 0 0|0 0 0 0|0 0 0 0|
. 4.7.2 (263)
Memory Address - 0x00000000febff814 (local)
Address 0xfebff814       0x80000000          |1 0 0 0|0 0 0 0|0 0 0 0|0 0 0 0|0 0 0 0|0 0 0 0|0 0 0 0|0 0 0 0|
. 4.7.2 (263)
Memory Address - 0x00000000febff818 (local)
Address 0xfebff818       0x04044fee          |0 0 0 0|0 1 0 0|0 0 0 0|0 1 0 0|0 1 0 0|1 1 1 1|1 1 1 0|1 1 1 0|
. 4.7.2 (263)
Memory Address - 0x00000000febff81c (local)
Address 0xfebff81c       0x31333934          |0 0 1 1|0 0 0 1|0 0 1 1|0 0 1 1|0 0 1 1|1 0 0 1|0 0 1 1|0 1 0 0|
. 4.7.2 (263)
Memory Address - 0x00000000febff820 (local)
Address 0xfebff820       0xf800a242          |1 1 1 1|1 0 0 0|0 0 0 0|0 0 0 0|1 0 1 0|0 0 1 0|0 1 0 0|0 0 1 0|
. 4.7.2 (263)
Memory Address - 0x00000000febff824 (local)
Address 0xfebff824       0x0011d800          |0 0 0 0|0 0 0 0|0 0 0 1|0 0 0 1|1 1 0 1|1 0 0 0|0 0 0 0|0 0 0 0|
. 4.7.2 (263)
Memory Address - 0x00000000febff828 (local)
Address 0xfebff828       0x018fcabf          |0 0 0 0|0 0 0 1|1 0 0 0|1 1 1 1|1 1 0 0|1 0 1 0|1 0 1 1|1 1 1 1|
. 4.7.2 (263)
Memory Address - 0x00000000febff834 (local)
Address 0xfebff834       0x00000000          |0 0 0 0|0 0 0 0|0 0 0 0|0 0 0 0|0 0 0 0|0 0 0 0|0 0 0 0|0 0 0 0|
. 4.7.2 (263)
Memory Address - 0x00000000febff838 (local)
Address 0xfebff838       0x00000000          |0 0 0 0|0 0 0 0|0 0 0 0|0 0 0 0|0 0 0 0|0 0 0 0|0 0 0 0|0 0 0 0|
. 4.7.2 (263)
Memory Address - 0x00000000febff83c (local)
Address 0xfebff83c       0x00000000          |0 0 0 0|0 0 0 0|0 0 0 0|0 0 0 0|0 0 0 0|0 0 0 0|0 0 0 0|0 0 0 0|
. 4.7.2 (263)
Memory Address - 0x00000000febff840 (local)
Address 0xfebff840       0xa1004063          |1 0 1 0|0 0 0 1|0 0 0 0|0 0 0 0|0 1 0 0|0 0 0 0|0 1 1 0|0 0 1 1|
. 4.7.2 (263)
Memory Address - 0x00000000febff850 (local)
Address 0xfebff850       0x00000000          |0 0 0 0|0 0 0 0|0 0 0 0|0 0 0 0|0 0 0 0|0 0 0 0|0 0 0 0|0 0 0 0|
. 4.7.2 (263)
Memory Address - 0x00000000febff854 (local)
Address 0xfebff854       0x00000000          |0 0 0 0|0 0 0 0|0 0 0 0|0 0 0 0|0 0 0 0|0 0 0 0|0 0 0 0|0 0 0 0|
. 4.7.2 (263)
Memory Address - 0x00000000febff864 (local)
Address 0xfebff864       0x00000000          |0 0 0 0|0 0 0 0|0 0 0 0|0 0 0 0|0 0 0 0|0 0 0 0|0 0 0 0|0 0 0 0|
. 4.7.2 (263)
Memory Address - 0x00000000febff868 (local)
Address 0xfebff868       0x80000000          |1 0 0 0|0 0 0 0|0 0 0 0|0 0 0 0|0 0 0 0|0 0 0 0|0 0 0 0|0 0 0 0|
. 4.7.2 (263)
Memory Address - 0x00000000febff870 (local)
Address 0xfebff870       0x00000000          |0 0 0 0|0 0 0 0|0 0 0 0|0 0 0 0|0 0 0 0|0 0 0 0|0 0 0 0|0 0 0 0|
. 4.7.2 (263)
Memory Address - 0x00000000febff874 (local)
Address 0xfebff874       0x00000000          |0 0 0 0|0 0 0 0|0 0 0 0|0 0 0 0|0 0 0 0|0 0 0 0|0 0 0 0|0 0 0 0|
. 4.7.2 (263)
Memory Address - 0x00000000febff878 (local)
Address 0xfebff878       0x00000000          |0 0 0 0|0 0 0 0|0 0 0 0|0 0 0 0|0 0 0 0|0 0 0 0|0 0 0 0|0 0 0 0|
. 4.7.2 (263)
Memory Address - 0x00000000febff87c (local)
Address 0xfebff87c       0x00000000          |0 0 0 0|0 0 0 0|0 0 0 0|0 0 0 0|0 0 0 0|0 0 0 0|0 0 0 0|0 0 0 0|
. 4.7.2 (263)
Memory Address - 0x00000000febff880 (local)
Address 0xfebff880       0x00000000          |0 0 0 0|0 0 0 0|0 0 0 0|0 0 0 0|0 0 0 0|0 0 0 0|0 0 0 0|0 0 0 0|
. 4.7.2 (263)
Memory Address - 0x00000000febff884 (local)
Address 0xfebff884       0x00000000          |0 0 0 0|0 0 0 0|0 0 0 0|0 0 0 0|0 0 0 0|0 0 0 0|0 0 0 0|0 0 0 0|
. 4.7.2 (263)
Memory Address - 0x00000000febff888 (local)
Address 0xfebff888       0x00000000          |0 0 0 0|0 0 0 0|0 0 0 0|0 0 0 0|0 0 0 0|0 0 0 0|0 0 0 0|0 0 0 0|
. 4.7.2 (263)
Memory Address - 0x00000000febff88c (local)
Address 0xfebff88c       0x00000000          |0 0 0 0|0 0 0 0|0 0 0 0|0 0 0 0|0 0 0 0|0 0 0 0|0 0 0 0|0 0 0 0|
. 4.7.2 (263)
Memory Address - 0x00000000febff890 (local)
Address 0xfebff890       0x00000000          |0 0 0 0|0 0 0 0|0 0 0 0|0 0 0 0|0 0 0 0|0 0 0 0|0 0 0 0|0 0 0 0|
. 4.7.2 (263)
Memory Address - 0x00000000febff894 (local)
Address 0xfebff894       0x00000000          |0 0 0 0|0 0 0 0|0 0 0 0|0 0 0 0|0 0 0 0|0 0 0 0|0 0 0 0|0 0 0 0|
. 4.7.2 (263)
Memory Address - 0x00000000febff898 (local)
Address 0xfebff898       0x00000000          |0 0 0 0|0 0 0 0|0 0 0 0|0 0 0 0|0 0 0 0|0 0 0 0|0 0 0 0|0 0 0 0|
. 4.7.2 (263)
Memory Address - 0x00000000febff89c (local)
Address 0xfebff89c       0x00000000          |0 0 0 0|0 0 0 0|0 0 0 0|0 0 0 0|0 0 0 0|0 0 0 0|0 0 0 0|0 0 0 0|
. 4.7.2 (263)
Memory Address - 0x00000000febff8a0 (local)
Address 0xfebff8a0       0x00000000          |0 0 0 0|0 0 0 0|0 0 0 0|0 0 0 0|0 0 0 0|0 0 0 0|0 0 0 0|0 0 0 0|
. 4.7.2 (263)
Memory Address - 0x00000000febff8a4 (local)
Address 0xfebff8a4       0x00000000          |0 0 0 0|0 0 0 0|0 0 0 0|0 0 0 0|0 0 0 0|0 0 0 0|0 0 0 0|0 0 0 0|
. 4.7.2 (263)
Memory Address - 0x00000000febff8a8 (local)
Address 0xfebff8a8       0x00000000          |0 0 0 0|0 0 0 0|0 0 0 0|0 0 0 0|0 0 0 0|0 0 0 0|0 0 0 0|0 0 0 0|
. 4.7.2 (263)
Memory Address - 0x00000000febff8ac (local)
Address 0xfebff8ac       0x00000000          |0 0 0 0|0 0 0 0|0 0 0 0|0 0 0 0|0 0 0 0|0 0 0 0|0 0 0 0|0 0 0 0|
. 4.7.2 (263)
Memory Address - 0x00000000febff8b0 (local)
Address 0xfebff8b0       0x00001333          |0 0 0 0|0 0 0 0|0 0 0 0|0 0 0 0|0 0 0 1|0 0 1 1|0 0 1 1|0 0 1 1|
. 4.7.2 (263)
Memory Address - 0x00000000febff8b4 (local)
Address 0xfebff8b4       0xffffffff          |1 1 1 1|1 1 1 1|1 1 1 1|1 1 1 1|1 1 1 1|1 1 1 1|1 1 1 1|1 1 1 1|
. 4.7.2 (263)
Memory Address - 0x00000000febff8b8 (local)
Address 0xfebff8b8       0xffffffff          |1 1 1 1|1 1 1 1|1 1 1 1|1 1 1 1|1 1 1 1|1 1 1 1|1 1 1 1|1 1 1 1|
. 4.7.2 (263)
Memory Address - 0x00000000febff8dc (local)
Address 0xfebff8dc       0x00000000          |0 0 0 0|0 0 0 0|0 0 0 0|0 0 0 0|0 0 0 0|0 0 0 0|0 0 0 0|0 0 0 0|
. 4.7.2 (263)
Memory Address - 0x00000000febff8e0 (local)
Address 0xfebff8e0       0x00000000          |0 0 0 0|0 0 0 0|0 0 0 0|0 0 0 0|0 0 0 0|0 0 0 0|0 0 0 0|0 0 0 0|
. 4.7.2 (263)
Memory Address - 0x00000000febff8e4 (local)
Address 0xfebff8e4       0x00000000          |0 0 0 0|0 0 0 0|0 0 0 0|0 0 0 0|0 0 0 0|0 0 0 0|0 0 0 0|0 0 0 0|
. 4.7.2 (263)
Memory Address - 0x00000000febff8e8 (local)
Address 0xfebff8e8       0x0000ffc0          |0 0 0 0|0 0 0 0|0 0 0 0|0 0 0 0|1 1 1 1|1 1 1 1|1 1 0 0|0 0 0 0|
. 4.7.2 (263)
Memory Address - 0x00000000febff8ec (local)
Address 0xfebff8ec       0x00000000          |0 0 0 0|0 0 0 0|0 0 0 0|0 0 0 0|0 0 0 0|0 0 0 0|0 0 0 0|0 0 0 0|
. 4.7.2 (263)
Memory Address - 0x00000000febff8f0 (local)
Address 0xfebff8f0       0x902bd9e9          |1 0 0 1|0 0 0 0|0 0 1 0|1 0 1 1|1 1 0 1|1 0 0 1|1 1 1 0|1 0 0 1|
. 4.7.2 (263)
Memory Address - 0x00000000febff900 (local)
Address 0xfebff900       0x00000000          |0 0 0 0|0 0 0 0|0 0 0 0|0 0 0 0|0 0 0 0|0 0 0 0|0 0 0 0|0 0 0 0|
. 4.7.2 (263)
Memory Address - 0x00000000febff904 (local)
Address 0xfebff904       0x00000000          |0 0 0 0|0 0 0 0|0 0 0 0|0 0 0 0|0 0 0 0|0 0 0 0|0 0 0 0|0 0 0 0|
. 4.7.2 (263)
Memory Address - 0x00000000febff908 (local)
Address 0xfebff908       0x00000000          |0 0 0 0|0 0 0 0|0 0 0 0|0 0 0 0|0 0 0 0|0 0 0 0|0 0 0 0|0 0 0 0|
. 4.7.2 (263)
Memory Address - 0x00000000febff90c (local)
Address 0xfebff90c       0x00000000          |0 0 0 0|0 0 0 0|0 0 0 0|0 0 0 0|0 0 0 0|0 0 0 0|0 0 0 0|0 0 0 0|
. 4.7.2 (263)
Memory Address - 0x00000000febff910 (local)
Address 0xfebff910       0x00000000          |0 0 0 0|0 0 0 0|0 0 0 0|0 0 0 0|0 0 0 0|0 0 0 0|0 0 0 0|0 0 0 0|
. 4.7.2 (263)
Memory Address - 0x00000000febff914 (local)
Address 0xfebff914       0x00000000          |0 0 0 0|0 0 0 0|0 0 0 0|0 0 0 0|0 0 0 0|0 0 0 0|0 0 0 0|0 0 0 0|
. 4.7.2 (263)
Memory Address - 0x00000000febff918 (local)
Address 0xfebff918       0x00000000          |0 0 0 0|0 0 0 0|0 0 0 0|0 0 0 0|0 0 0 0|0 0 0 0|0 0 0 0|0 0 0 0|
. 4.7.2 (263)
Memory Address - 0x00000000febff91c (local)
Address 0xfebff91c       0x00000000          |0 0 0 0|0 0 0 0|0 0 0 0|0 0 0 0|0 0 0 0|0 0 0 0|0 0 0 0|0 0 0 0|
. 4.7.2 (263)
Memory Address - 0x00000000febff920 (local)
Address 0xfebff920       0x00000000          |0 0 0 0|0 0 0 0|0 0 0 0|0 0 0 0|0 0 0 0|0 0 0 0|0 0 0 0|0 0 0 0|

LSPCI:

05:03.0 FireWire (IEEE 1394): VIA Technologies, Inc. VT6306 Fire II IEEE 1394 OHCI Link Layer Controller (rev c0) (prog-if 10 [OHCI])
Subsystem: ASUSTeK Computer Inc. Unknown device 81fe
Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 64 (8000ns max), Cache Line Size: 32 bytes
Interrupt: pin A routed to IRQ 16
Region 0: Memory at febff800 (32-bit, non-prefetchable)
Region 1: I/O ports at ec00 [disabled]
Capabilities: [50] Power Management version 2
	Flags: PMEClk- DSI- D1- D2+ AuxCurrent=0mA PME(D0-,D1-,D2+,D3hot+,D3cold+)
	Status: D0 PME-Enable- DSel=0 DScale=0 PME-

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