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hackaro

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  1. Like
    hackaro reacted to vector sigma in Clover.app testing   
    Thanks to you for this report, now the code is more robust!
  2. Thanks
    hackaro reacted to vector sigma in Clover.app testing   
    This complete log was helpfull, hope the issue is fixed. Let me know.
     
     
    Clover.app.zip
  3. Thanks
    hackaro reacted to vector sigma in Clover.app testing   
    @hackaro please put the attached app in /Applications and run it with the Terminal:
    /Applications/Clover.app/Contents/MacOS/Clover select a disk and show me the output, thanks. 
     
    EDIT
    attachment removed
     
  4. Thanks
    hackaro reacted to vector sigma in Clover.app testing   
    I'll be back with a build to test. Hope between 20:30~21:00
  5. Thanks
    hackaro reacted to CMMChris in [TOOL] Radeon VII PowerPlay Table Generator (OC, UV, Fan Curve)   
    You have to figure them out by trying. Set VRAM clock to 1100MHz, pretty much all cards can handle that. For undervolting reduce your GPU voltage step by step. I'd suggest starting with 1050mV, then test stability for a while using Unigine Valley for example. If it's stable, reduce voltage in 5mV steps and test again. Once your card gets unstable, go up 5mV again and you should be fine.
     
    With stock GPU clock of 1801MHz most Radeon VII are able to get below the 1000mV range. I can run mine on 975mV which results in low temperatures, low power consumption and silent operation.
  6. Thanks
    hackaro reacted to CMMChris in Vega Frontier Edition on High Sierra   
    Your sleep wakeup issues don't have anything to do with the PowerPlayTable. The issue is something else. What are your BIOS GFX settings? Do you have IGPU dual monitor or something enabled?
    Regarding the hex data: No need to convert it. Just use Clover Configurator to set-up your device properties. It will convert the data automatically.
  7. Thanks
    hackaro reacted to CMMChris in Vega Frontier Edition on High Sierra   
    Try this
    B6020801005C00E1060000902C00001B004800000080A90300F0490200320008000000000000000000000000000002015C004F02460294009E01BE0028017A008C00BC0100000000720200009000A8026D0143019701F049020071020202000000000000080000000000000005000700030005000000000000000108330433043304330433043304330433040101330401018403000860EA00000040190100018038010002DC4A010003905F010004007701000590910100066CB00100070108D04C01000000800000000000008083010001000000000000000070A7010002000000000000000088BC010003000000000000000088D5010004000000000000000030370200050000000001000000B87C0200060000000001000000B87C0200070000000001000000000560EA00000040190100008038010000DC4A010000905F0100000008286E0000002CC9000001F80B0100028038010003905F010004F491010005D0B0010006C0D401000700086C39000000245E000001FC85000002ACBC00000334D0000004686E0100050897010006ECA30100070001683C01000001043C41000000000050C3000000000080380100020000A08601000500000108009885000040B5000060EA000050C300000180BB000060EA0000940B010050C300000200E10000940B01004019010050C300000378FF0000401901008826010050C300000440190100803801008038010050C300000580380100DC4A0100DC4A010050C30000060077010000770100905F010050C300000790910100909101000077010050C300000118000000000000000BE4126400AC0D3700230054039001900190019001900190019001013200370002012307F700F700F700510100005B0069004A004A005F007300730064004000000097609600904B00000000000000000000000000000000000202D4300000021060EA00000210 I am playing Rise of the Tomb Raider with this and have no overheating or crashes.
     

  8. Like
    hackaro reacted to Mieze in IntelMausiEthernet.kext for Intel onboard LAN   
    Yes, the driver supports LACP. I successfully tested it in combination with a Realtek RTL8111E using my Realtek driver.
     
    Mieze
  9. Thanks
  10. Thanks
    hackaro reacted to MaLd0n in [Guide] Sierra / High Sierra / Mojave / Catalina on mobos Serie 100 / 200 / 300 / 400 SkyLake / KabyLake / CoffeeLake / CometLake DSDT   
    Replace DSDT, reboot and send me new SEND_ME
    DSDT.aml.zip
    Use updated app for a full dump
    RunMe.app
  11. Like
    hackaro reacted to MaLd0n in [Guide] Sierra / High Sierra / Mojave / Catalina on mobos Serie 100 / 200 / 300 / 400 SkyLake / KabyLake / CoffeeLake / CometLake DSDT   
    use it
    CLOVER.zip
    reboot and extract new SEND_ME with new files
    no idea, need check
  12. Like
    hackaro reacted to Pavo in Tracing back the AMD GPU wakeup issue to its origin   
    DP/HDMI audio requires either Lilu+Whatevergreen or customized SSDT, note with a SSDT it is also required to have ATIInject=yes in Clover config.
  13. Like
    hackaro got a reaction from Mieze in IntelMausiEthernet.kext for Intel onboard LAN   
    THANKS Mieze! As for now all the 4 points are working as expected here. Asus Z370 Prime A and i7-8700K. In case of malfunctioning I'll report back. 
     
    Have a nice day 
  14. Like
    hackaro got a reaction from Mieze in IntelMausiEthernet.kext for Intel onboard LAN   
    THANKS Mieze! As for now all the 4 points are working as expected here. Asus Z370 Prime A and i7-8700K. In case of malfunctioning I'll report back. 
     
    Have a nice day 
  15. Like
    hackaro reacted to Mieze in IntelMausiEthernet.kext for Intel onboard LAN   
    This is the first test build of version 2.4.0 of IntelMausiEthernet which updates the underlying Linux sources and adds official support for Coffee Lake. All users are encouraged to test it thoroughly. Although I tested it successfully on my I218V, you should keep in mind that this is work in progress which can't be expected to be 100% stable. In case things go wrong and you end up with a kernel panic, you should be prepared to recover your system from that situation.
     
    Here is a short list of things to test:
    1.) Boot
    2.) IP address acquisition via DHCP.
    3.) Cable unplug and replug. (Test several times!)
    4.) Sleep/wake cycles (Test several times!).
     
    In any case, please report back with attached kernel logs of the test run including the boot sequence. In case you need instructions how to retrieve them, please refer to post#1 of the driver's thread in the forum.
     
    Good luck!
     
    Mieze
    IntelMausiEthernet-V2.4.0d0.zip
  16. Like
    hackaro got a reaction from srmusico in Can't Enable Thunderbolt 3 in Gigabyte Z170X Ultra Gaming   
    I used the same mb for a while but with F22 BIOS version ... and I had an Apollo TH2 audio card working without problem... 
    try this setup in BIOS.
     
     
    170526143105.BMP
  17. Like
    hackaro got a reaction from srmusico in Can't Enable Thunderbolt 3 in Gigabyte Z170X Ultra Gaming   
    I used the same mb for a while but with F22 BIOS version ... and I had an Apollo TH2 audio card working without problem... 
    try this setup in BIOS.
     
     
    170526143105.BMP
  18. Like
    hackaro got a reaction from Cyberdevs in Tracing back the AMD GPU wakeup issue to its origin   
    Hi,
     
    finally everything is almost working! Multimonitor is working perfectly now for my XFX RX 580 8GB ... with DeInit in Clover (v.4297) and Mieze's code in form of SSDT! Thanks Mieze, Slice, CyberDevs and Von Morks!   
     
     
    The problem is audio HDMI ... for some strange reason is not working while it was with WhatEverGreen kext... anyone has any hint? 
    SSDT_RX580_XFX.zip
  19. Like
    hackaro reacted to Mieze in Tracing back the AMD GPU wakeup issue to its origin   
    This indicates that there is a problem with the SSDT regarding the GPU. Take a look at device GFX0's method _DSM. The lines
    If (LEqual (Arg2, Zero)) { Return (Buffer (One) { 0x03 }) } are missing. Without them it won't work. I must have missed that at first glance.
     
    Mieze
  20. Like
    hackaro reacted to Mieze in Tracing back the AMD GPU wakeup issue to its origin   
    @hackaro: It's "onboard-1" but it should be "onboard-2" in case you use "onboard-1" for device HDAU and the AMD GPU because this property links the graphics device to the audio device.
     
    Mieze
  21. Like
    hackaro reacted to Mieze in Tracing back the AMD GPU wakeup issue to its origin   
    Which value does the "hda-gfx" property of device HDEF have?
     
    Mieze
  22. Like
    hackaro reacted to Mieze in Tracing back the AMD GPU wakeup issue to its origin   
    DSDT or IORegistry.
  23. Like
    hackaro reacted to chh1 in Tracing back the AMD GPU wakeup issue to its origin   
    Your video card connector is: 3DP+1HDMI+1DVI, Orinoco FB definition connector is 2DP+2HDMI+1DVI, can work properly? Sorry for my poor english.
  24. Like
    hackaro reacted to Mork vom Ork in Tracing back the AMD GPU wakeup issue to its origin   
    Could confirm it working.
    Just tick "inject ATI = true" and "RadeonDeInit = true" makes my Sapphire RX480 NITRO work as when using selfmade SSDT for it. Thank you SLICE.
    BUT: i still need my SSDT for working HDMI-audio. but if you only need to make your RADEON work, you could use this method.
  25. Like
    hackaro reacted to Mork vom Ork in Tracing back the AMD GPU wakeup issue to its origin   
    To make things a little bit more clear for those of us, which are "non coders" in real live: take a look at "slice"s example SSDT:
     
     
     
     
    Now take alook at this specific part of the code:
    DefinitionBlock ("", "SSDT", 2, "Apple", "Radeon", 0x00003000) { External (_SB_.PCI0.PEG0.PEGP, DeviceObj) // (from opcode) Scope (\_SB.PCI0.PEG0.PEGP) { This part is ALLWAYS DSDT-specific, cause you need to know, where in your DSDT your SSDT-related hardware needs to be injected.
     
    For another example lets take a look at my RX580-realted SSDT:
    DefinitionBlock ("", "SSDT", 2, "MvO_2", "PegSsdt", 0x00001000) { External (_SB_.GGOV, MethodObj) // 1 Arguments (from opcode) External (_SB_.ISME, MethodObj) // 1 Arguments (from opcode) External (_SB_.PCI0, DeviceObj) // (from opcode) External (_SB_.PCI0.PEG0, DeviceObj) // (from opcode) External (_SB_.PCI0.PEG0.PEGP, DeviceObj) // (from opcode) External (_SB_.PCI0.PEG1, DeviceObj) // (from opcode) External (_SB_.PCI0.PEG1.PEGP, DeviceObj) // (from opcode) External (_SB_.PCI0.PEG2, DeviceObj) // (from opcode) External (_SB_.PCI0.PEG2.PEGP, DeviceObj) // (from opcode) . . . . If (CondRefOf (\_SB.PCI0.PEG0.PEGP)) { Scope (\_SB.PCI0.PEG0.PEGP) { Device (AMD0) { Name (_ADR, 0x00080000) // _ADR: Address Device (GFX0) { Name (_ADR, Zero)  // _ADR: Address As you can see here, my GPU normally would be injected under "_SB.PCI0.PEG0.PEGP.pci-bridge@8.pci-bridge@0" which i have renamed to "_SB.PCI0.PEG0.PEGP.AMD0.GFX0".
    And exactly THIS is always specific to the users DSDT.
     
    What than follows, is only related to the users used GFX-Model and could be configured with specific values as part of the users used gfx-card.
    And it is adviced to, after you know your correct path of your used gfx-card, to insert directly Miezes code first, so it would look like this:
    Scope (\_SB.PCI0.PEG0.PEGP) { Device (AMD0) { Name (_ADR, 0x00080000) // _ADR: Address Device (GFX0) { Name (_ADR, Zero) // _ADR: Address OperationRegion (PCIB, PCI_Config, Zero, 0x0100) Field (PCIB, AnyAcc, NoLock, Preserve) { Offset (0x10), BAR0, 32, BAR1, 32, BAR2, 64, BAR4, 32, BAR5, 32 } Method (_INI, 0, NotSerialized) // _INI: Initialize { If (LEqual (BAR5, Zero)) { Store (BAR2, Local0) } Else { Store (BAR5, Local0) } OperationRegion (GREG, SystemMemory, And (Local0, 0xFFFFFFFFFFFFFFF0), 0x8000) Field (GREG, AnyAcc, NoLock, Preserve) { Offset (0x6800), GENA, 32, GCTL, 32, LTBC, 32, Offset (0x6810), PSBL, 32, SSBL, 32, PTCH, 32, PSBH, 32, SSBH, 32, Offset (0x6848), FCTL, 32, Offset (0x6EF8), MUMD, 32 } Store (Zero, FCTL) Store (Zero, PSBH) Store (Zero, SSBH) Store (Zero, LTBC) Store (One, GENA) Store (Zero, MUMD) } followed by your card-specific values like Device-ID, VendorID, Subsystem-ID, Slot-name, Model name, used Frambuffer etc. Example again:
    Method (_DSM, 4, NotSerialized) // _DSM: Device-Specific Method { Store (Package (0x06) { "@0,name", Buffer (0x0C) { "ATY,Orinoco" }, "AAPL,slot-name", Buffer (0x08) { "PCIe #1" }, "hda-gfx", Buffer (0x0A) { "onboard-1" } }, Local0) DTGP (Arg0, Arg1, Arg2, Arg3, RefOf (Local0)) Return (Local0) } So to stay with the example of MY specific implementation of MY specific RX480, the complete Code would look like this:
    /* * Intel ACPI Component Architecture * AML/ASL+ Disassembler version 20161210-64(RM) * Copyright (c) 2000 - 2016 Intel Corporation * * Disassembling to non-symbolic legacy ASL operators * * Disassembly of iASLneKcV3.aml, Thu Nov 9 19:45:36 2017 * * Original Table Header: * Signature "SSDT" * Length 0x000026B7 (9911) * Revision 0x02 * Checksum 0xD4 * OEM ID "MvO_2" * OEM Table ID "PegSsdt" * OEM Revision 0x00001000 (4096) * Compiler ID "INTL" * Compiler Version 0x20161210 (538317328) */ DefinitionBlock ("", "SSDT", 2, "MvO_2", "PegSsdt", 0x00001000) { External (_SB_.GGOV, MethodObj) // 1 Arguments (from opcode) External (_SB_.ISME, MethodObj) // 1 Arguments (from opcode) External (_SB_.PCI0, DeviceObj) // (from opcode) External (_SB_.PCI0.PEG0, DeviceObj) // (from opcode) External (_SB_.PCI0.PEG0.PEGP, DeviceObj) // (from opcode) External (_SB_.PCI0.PEG1, DeviceObj) // (from opcode) External (_SB_.PCI0.PEG1.PEGP, DeviceObj) // (from opcode) External (_SB_.PCI0.PEG2, DeviceObj) // (from opcode) External (_SB_.PCI0.PEG2.PEGP, DeviceObj) // (from opcode) External (_SB_.SGOV, MethodObj) // 2 Arguments (from opcode) External (_SB_.SHPO, MethodObj) // 2 Arguments (from opcode) If (CondRefOf (\_SB.PCI0.PEG0.PEGP)) { Scope (\_SB.PCI0.PEG0.PEGP) { Device (AMD0) { Name (_ADR, 0x00080000) // _ADR: Address Device (GFX0) { Name (_ADR, Zero) // _ADR: Address OperationRegion (PCIB, PCI_Config, Zero, 0x0100) // <--- from here... Field (PCIB, AnyAcc, NoLock, Preserve) { Offset (0x10), BAR0, 32, BAR1, 32, BAR2, 64, BAR4, 32, BAR5, 32 } Method (_INI, 0, NotSerialized) // _INI: Initialize { If (LEqual (BAR5, Zero)) { Store (BAR2, Local0) } Else { Store (BAR5, Local0) } OperationRegion (GREG, SystemMemory, And (Local0, 0xFFFFFFFFFFFFFFF0), 0x8000) Field (GREG, AnyAcc, NoLock, Preserve) { Offset (0x6800), GENA, 32, GCTL, 32, LTBC, 32, Offset (0x6810), PSBL, 32, SSBL, 32, PTCH, 32, PSBH, 32, SSBH, 32, Offset (0x6848), FCTL, 32, Offset (0x6EF8), MUMD, 32 } Store (Zero, FCTL) Store (Zero, PSBH) Store (Zero, SSBH) Store (Zero, LTBC) Store (One, GENA) Store (Zero, MUMD) } // <--- to here is MIEZEs code to get it work w/o LILU and WhatEverGreen Method (_DSM, 4, NotSerialized) // _DSM: Device-Specific Method // <--- from here... { Store (Package (0x06) { "@0,name", Buffer (0x0C) { "ATY,Orinoco" }, "AAPL,slot-name", Buffer (0x08) { "PCIe #1" }, "hda-gfx", Buffer (0x0A) { "onboard-1" } }, Local0) DTGP (Arg0, Arg1, Arg2, Arg3, RefOf (Local0)) Return (Local0) } } Device (HDAU) { Name (_ADR, One) // _ADR: Address Method (_DSM, 4, NotSerialized) // _DSM: Device-Specific Method { If (LEqual (Arg2, Zero)) { Return (Buffer (One) { 0x03 }) } Return (Package (0x04) { "layout-id", Buffer (0x04) { 0x01, 0x00, 0x00, 0x00 }, "hda-gfx", Buffer (0x0A) { "onboard-1" } }) } } } // <--- to here your specific GFX-Card values to be used Method (DTGP, 5, NotSerialized) { If (LEqual (Arg0, ToUUID ("a0b5b7c6-1318-441c-b0c9-fe695eaf949b"))) { If (LEqual (Arg1, One)) { If (LEqual (Arg2, Zero)) { Store (Buffer (One) { 0x03 }, Arg4) Return (One) } If (LEqual (Arg2, One)) { Return (One) } } } Store (Buffer (One) { 0x00 }, Arg4) Return (Zero) } Name (LTRE, Zero) OperationRegion (PCIS, PCI_Config, Zero, 0x0100) Field (PCIS, AnyAcc, NoLock, Preserve) { PVID, 16, PDID, 16 } Method (_PRW, 0, NotSerialized) // _PRW: Power Resources for Wake { Return (GPRW (0x69, 0x04)) } } } }
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