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About stradivari1723

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    InsanelyMac Protégé
  1. If you have a computer with Intel 82579V onboard gigabit LAN, and you have confirmed that wake-on-LAN is working for you, would you mind sending me your DSDT? Or if you would rather copy and paste your relevant LAN section from your DSDT, that's fine, too. WOL is not working in Snow Leopard for me, using Intel 82579V on an Asus P8P67 Pro motherboard, and I'm trying to find out why. Thanks!
  2. Patch DSDT for JMB362 in AHCI mode

    I tried replacing the GBE entry with the ETH0 entry below, but no go. :-( Thanks, though. I found this info on the Intel site, for the NIC that is onboard my MOBO. Does any of this info help?? b. Flexible Filter Value Table MSBs – FFVT_H (filters 23) c. Flexible Filter Value Table - FFVT_45 (filters 45) d. Flexible Filter Value Table - FFVT_67 (filters 67) e. Flexible TCO Filter Value/Mask Table LSBs – FTFT_L f. Flexible TCO Filter Value/Mask Table MSBs – FTFT_H 4. Configure the 82579’s wake up registers per ACPI/APM wake up needs. 5. Clear the Slave Access Enable bit (bit 2) in the Receive Control register (page 800, register 0) to enable the flex filters. 6. Set the Host_WU_Active bit (bit 4) in the Port General Configuration register (page 769, register 17) to activate the 82579’s wake up functionality. Once wake up is enabled, the 82579 stops responding to SMBus commands. Host wake up: 1. When a WoL packet/event is detected, the 82579 sends an in-band message to the integrated LAN controller indicating Host wake up. 2. In case of host wake up, the integrated LAN controller wakes the host. 3. Host should issue a LCD reset to the 82579 before clearing the Host_WU_Active bit. 4. Host reads the Wake Up Status register (WUS); wake up status from the 82579). When a wake up packet is identified, the wake up in-band message is sent and the host should clear the Host_WU_Active bit (bit 4) in the Port General Configuration register (page 769, register 17). While in wake up active mode new wake up packets received will not overwrite the packet in the FIFO. The 82579 re-transmits the wake up in-band message after 50 ms if no change in the Host_WU_Active bits occurred. Host Wake Up The 82579 supports two types of wake up mechanisms: • Advanced Power Management (APM) wake up • ACPI Power Management wake up Advanced Power Management Wake Up Advanced Power Management Wakeup or APM Wakeup was previously known as Wake on LAN (WoL). The basic premise is to receive a broadcast or unicast packet with an explicit data pattern, and then to assert a signal to wake up the system or issue an in- band PM_PME message (if configured to). At power up, if the 82579’s wake up functionality is enabled, the APM Enable bits from the NVM are written to the 82579 by the integrated LAN controller to the APM Enable (APME) bits of the Wakeup Control (WUC) register. These bits control the enabling of APM wake up. When APM wake up is enabled, the 82579 checks all incoming packets for Magic Packets. See Section for a definition of Magic Packets. 39 Device Functionality—Intel® 82579 Gigabit Ethernet To enable APM wake up, programmers should write a 1b to bit 10 in register 26 on page 0 PHY address 01, and then the station address to registers 27, 28, 29 at page 0 PHY address 01. The order is mandatory since registers RAL0[31:0] and RAH0[15:0] are updated with a corresponding value from registers 27, 28, 29, if the APM WoL Enable bit is set in register 26. The Address Valid bit (bit 31 in RAH0) is automatically set with a write to register 29, if the APM WoL Enable bit is set in register 26. The APM Enable bit (bit 0 in the WUC) is automatically set with a write to register 29, if the APM WoL Enable bit is set in register 26. Once the 82579 receives a matching magic packet, it: • Sets the Magic Packet Received bit in the WUS register. • Initiates the integrated LAN controller wake up event through an in-band message. APM wake up is supported in all power states and only disabled if a subsequent NVM read results in the APM Wake Up bit being cleared or software explicitly writes a 0b to the APM Wake Up (APM) bit of the WUC register. Can this be done in DSDT, or is this different than PCI registers? How would I do this?
  3. Patch DSDT for JMB362 in AHCI mode

    I think it sets the power states correctly for sleep on Asus P8P67. Without the kext, choosing sleep results in display off, drives spun down, but fans still running. Interesting. Mac Pro 4,1 has an Intel NIC, right? (dual port, Gigabit)
  4. Patch DSDT for JMB362 in AHCI mode

    WOL works fine in Win 7. :-\ Further thought... could it be because we have to use SleepEnabler.kext and "pmVersion=23" boot argument in order to have sleep working? Would it work if we had vanilla sleep? Or does the sleepenabler kext need to be edited to keep power supplied to the NIC when initiating sleep? Or is that not even relevant?? I'm about to give up... :-(
  5. Patch DSDT for JMB362 in AHCI mode

    I have run across more than one account of how people with Realtek NICs did not have WOL working until they switched from Realtek drivers to Lnx2mac's beta driver. So it could very well be a driver issue. Edit: Couple more things... changing OSVR to Darwin does indeed seem to have provided lower CPU temperatures, however I have done no scientific comparisons, but it also seems to me that perhaps my Geekbench scores are higher than previously!? Finally, I may boot into Win 7 and see if WOL is working in Windows. If it is, that would narrow things down, right? If it's not working in Windows, then that would mean it is a BIOS issue?
  6. Patch DSDT for JMB362 in AHCI mode

    Tried that. No good. Intel. Does that actually affect anything, though? I can change it and try... Edit: replaced 0x04 with 0x05, and replaced FreeBSD with Darwin. Doesn't seem to change anything. :-\ BTW, wake itself works great. Just WOL I'm trying to get working, now. And it's not my network... my hackintosh can WOL my MacBook Pro. I'm wondering if it's a software/driver issue... I'm bothered by the fact that my MacBook Pro has "Wake on network access" option in Energy Saver, but my Hackintosh does not...
  7. Patch DSDT for JMB362 in AHCI mode

    It is. Did you take a look at my attachments? What do you think...?
  8. Patch DSDT for JMB362 in AHCI mode

    Does WOL have to be supported in the driver?
  9. Patch DSDT for JMB362 in AHCI mode

    Screenshot of Intel Gigabit NIC entry in ioreg with no mod in DSDT: DSDT I am currently using, with Device(JMB0) and Device(JMB1) entries modified to get AHCI working, PINI method to restore registers for JMB, and PINI() call in _WAK to restore AHCI mode upon wake, and finally (of course) the DTGP method for hacks. LAN is untouched: dsdt.aml.zip Motherboard is Asus P8P67 Pro Rev. 3.0 B3 Let me know if I've missed anything...
  10. Patch DSDT for JMB362 in AHCI mode

    Okay, so this did not work. My ethernet entry looks like this: Device (GBE) { Name (_ADR, 0x00190000) Name (_PRW, Package (0x02) { 0x0B, 0x05 }) } But when I put it to sleep, same behaviour as before: goes to sleep fine, but link lights on NIC port are off, and can't WOL. Any other ideas?? :-( I have BIOS set to allow power on from PCI and from PCI-e. There is no "Wake on administrative access" option in Energy Saver...
  11. Patch DSDT for JMB362 in AHCI mode

    Thanks for your continued support! So I can just add that into the device () entry? I think I already know where the device is listed in the DSDT (it is called Device (GIGE) I think). I'll give it a try when I get home. So with that entry, the port will remain powered during sleep... but fans and all will still go off? And WOL packets will be recognized...? I also wonder (out loud, to myself, at this point LOL!) if adding this line will cause OS X to enable the "Wake for administrative access" option in Energy Saver. It probably doesn't even need to be there though, right? I mean, WOL is a hardware solution, no?
  12. Patch DSDT for JMB362 in AHCI mode

    You mean during _PTS?
  13. Patch DSDT for JMB362 in AHCI mode

    Hey! Well, that's good to hear. :-) What was that all about Disable Registers and stuff, then? Not needed, I guess... Now, next question. :-) How to get WOL working... guh.
  14. Patch DSDT for JMB362 in AHCI mode

    Okay, I managed to seemingly get it working. All I did was to add a PINI function right before the _WAK entry: Method (PINI, 0, NotSerialized) { Store (0xB3, \_SB.PCI0.PEX3.JMB0.M1) Store (0xA1, \_SB.PCI0.PEX3.JMB0.M2) Store (0xC2, \_SB.PCI0.PEX3.JMB0.M3) } Then called PINI () from within _WAK. It seems to work fine with only those changes. Should I be worried? Am I missing something vital that will cause problems or corruption down the road?
  15. Patch DSDT for JMB362 in AHCI mode

    I really need some more precise help, if you have time. I've been trying, but I'm still somewhat clueless. The way I understand it, PINI is a function you create (I've been following this thread here), and I assume it would write those same registers I used in my initial device call during startup, right? But... how to I identify where the registers are located (i.e., how do I identify the device, etc.) Sorry, maybe that question doesn't even make sense?? But anyway, if I'm able to make that function successfully, then where do I call it from? _WAK? And I don't really understand the "disable register" business... is that during prepare to sleep? So where do I put that? And what would it look like?? :-( Sorry, as you can see, I'm stumbling in the darkness. :-)