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jalavoui

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    jalavoui got a reaction from XLNC in AMD Mojave Kernel Development and Testing   
    i've changed the pat patch in mtrr.c (check .diff)
    need re-check amd errata flags - linux as many more.
     
    please test it on 10.14.1/2
     
    safari issues might be fixed when we get 10.14.2 sources (this is 10.14.1 hacked version)
     
    updated with bsd code (for errata) - this rises others questions (check amd features code)
     
    shanee u need to revert previous github pach to apply this one.
     
    bsd sources can be found here http://fxr.watson.org/fxr/source/amd64/amd64/initcpu.c#L135
     
    xlnc this is from 10.14.2
    int __cdecl necp_client_action(proc *p, necp_client_action_args *uap, int *retval) { u_int32_t action; // [rsp+1Ch] [rbp-34h] necp_fd_data *fd_data; // [rsp+20h] [rbp-30h] int return_value; // [rsp+28h] [rbp-28h] int error; // [rsp+2Ch] [rbp-24h] int *retvala; // [rsp+30h] [rbp-20h] necp_client_action_args *uapa; // [rsp+38h] [rbp-18h] proc *pa; // [rsp+40h] [rbp-10h] int v11; // [rsp+4Ch] [rbp-4h] pa = p; uapa = uap; retvala = retval; error = 0; return_value = 0; fd_data = 0LL; error = necp_find_fd_data(uap->necp_fd, &fd_data); if ( error ) { log(3, "%s: necp_client_action find fd error (%d)\n", "necp_client_action", (unsigned int)error); v11 = error; } else { action = uapa->action; switch ( action ) { case 1u: return_value = necp_client_add(pa, fd_data, uapa, retvala); break; case 2u: return_value = necp_client_remove(fd_data, uapa, retvala); break; case 3u: case 4u: case 16u: return_value = necp_client_copy(fd_data, uapa, retvala); break; case 5u: return_value = necp_client_list(fd_data, uapa, retvala); break; case 6u: return_value = necp_client_request_nexus(fd_data, uapa, retvala); break; case 7u: return_value = necp_client_agent_action(fd_data, uapa, retvala); break; case 8u: return_value = necp_client_copy_agent(fd_data, uapa, retvala); break; case 9u: return_value = necp_client_copy_interface(fd_data, uapa, retvala); break; case 10u: return_value = 45; break; case 11u: return_value = necp_client_copy_route_statistics(fd_data, uapa, retvala); break; case 12u: return_value = necp_client_agent_use(fd_data, uapa, retvala); break; case 13u: return_value = necp_client_map_sysctls(fd_data, uapa, retvala); break; case 14u: return_value = necp_client_update_cache(fd_data, uapa, retvala); break; case 15u: return_value = necp_client_copy_client_update(fd_data, uapa, retvala); break; case 17u: return_value = necp_client_add_flow(fd_data, uapa, retvala); break; case 18u: return_value = necp_client_remove_flow(fd_data, uapa, retvala); break; default: log(3, "%s: necp_client_action unknown action (%u)\n", "necp_client_action", action); return_value = 22; break; } file_drop(uapa->necp_fd); v11 = return_value; } return v11; } we will get this code with new sources, i tried to start porting some code but it as so many calls - i'll wait for apple to release it.
     
    i'll keep this code here for further checking
    /* 753 * AMD CPUID Specification 754 * http://support.amd.com/us/Embedded_TechDocs/25481.pdf 755 * 756 * Intel Processor Identification and CPUID Instruction 757 * http://www.intel.com/assets/pdf/appnote/241618.pdf 758 */ 759 if (cpu_high > 0) { 760 761 /* 762 * Here we should probably set up flags indicating 763 * whether or not various features are available. 764 * The interesting ones are probably VME, PSE, PAE, 765 * and PGE. The code already assumes without bothering 766 * to check that all CPUs >= Pentium have a TSC and 767 * MSRs. 768 */ 769 printf("\n Features=0x%b", cpu_feature, 770 "\020" 771 "\001FPU" /* Integral FPU */ 772 "\002VME" /* Extended VM86 mode support */ 773 "\003DE" /* Debugging Extensions (CR4.DE) */ 774 "\004PSE" /* 4MByte page tables */ 775 "\005TSC" /* Timestamp counter */ 776 "\006MSR" /* Machine specific registers */ 777 "\007PAE" /* Physical address extension */ 778 "\010MCE" /* Machine Check support */ 779 "\011CX8" /* CMPEXCH8 instruction */ 780 "\012APIC" /* SMP local APIC */ 781 "\013oldMTRR" /* Previous implementation of MTRR */ 782 "\014SEP" /* Fast System Call */ 783 "\015MTRR" /* Memory Type Range Registers */ 784 "\016PGE" /* PG_G (global bit) support */ 785 "\017MCA" /* Machine Check Architecture */ 786 "\020CMOV" /* CMOV instruction */ 787 "\021PAT" /* Page attributes table */ 788 "\022PSE36" /* 36 bit address space support */ 789 "\023PN" /* Processor Serial number */ 790 "\024CLFLUSH" /* Has the CLFLUSH instruction */ 791 "\025<b20>" 792 "\026DTS" /* Debug Trace Store */ 793 "\027ACPI" /* ACPI support */ 794 "\030MMX" /* MMX instructions */ 795 "\031FXSR" /* FXSAVE/FXRSTOR */ 796 "\032SSE" /* Streaming SIMD Extensions */ 797 "\033SSE2" /* Streaming SIMD Extensions #2 */ 798 "\034SS" /* Self snoop */ 799 "\035HTT" /* Hyperthreading (see EBX bit 16-23) */ 800 "\036TM" /* Thermal Monitor clock slowdown */ 801 "\037IA64" /* CPU can execute IA64 instructions */ 802 "\040PBE" /* Pending Break Enable */ 803 ); 804 805 if (cpu_feature2 != 0) { 806 printf("\n Features2=0x%b", cpu_feature2, 807 "\020" 808 "\001SSE3" /* SSE3 */ 809 "\002PCLMULQDQ" /* Carry-Less Mul Quadword */ 810 "\003DTES64" /* 64-bit Debug Trace */ 811 "\004MON" /* MONITOR/MWAIT Instructions */ 812 "\005DS_CPL" /* CPL Qualified Debug Store */ 813 "\006VMX" /* Virtual Machine Extensions */ 814 "\007SMX" /* Safer Mode Extensions */ 815 "\010EST" /* Enhanced SpeedStep */ 816 "\011TM2" /* Thermal Monitor 2 */ 817 "\012SSSE3" /* SSSE3 */ 818 "\013CNXT-ID" /* L1 context ID available */ 819 "\014SDBG" /* IA32 silicon debug */ 820 "\015FMA" /* Fused Multiply Add */ 821 "\016CX16" /* CMPXCHG16B Instruction */ 822 "\017xTPR" /* Send Task Priority Messages*/ 823 "\020PDCM" /* Perf/Debug Capability MSR */ 824 "\021<b16>" 825 "\022PCID" /* Process-context Identifiers*/ 826 "\023DCA" /* Direct Cache Access */ 827 "\024SSE4.1" /* SSE 4.1 */ 828 "\025SSE4.2" /* SSE 4.2 */ 829 "\026x2APIC" /* xAPIC Extensions */ 830 "\027MOVBE" /* MOVBE Instruction */ 831 "\030POPCNT" /* POPCNT Instruction */ 832 "\031TSCDLT" /* TSC-Deadline Timer */ 833 "\032AESNI" /* AES Crypto */ 834 "\033XSAVE" /* XSAVE/XRSTOR States */ 835 "\034OSXSAVE" /* OS-Enabled State Management*/ 836 "\035AVX" /* Advanced Vector Extensions */ 837 "\036F16C" /* Half-precision conversions */ 838 "\037RDRAND" /* RDRAND Instruction */ 839 "\040HV" /* Hypervisor */ 840 ); 841 } 842 843 if (amd_feature != 0) { 844 printf("\n AMD Features=0x%b", amd_feature, 845 "\020" /* in hex */ 846 "\001<s0>" /* Same */ 847 "\002<s1>" /* Same */ 848 "\003<s2>" /* Same */ 849 "\004<s3>" /* Same */ 850 "\005<s4>" /* Same */ 851 "\006<s5>" /* Same */ 852 "\007<s6>" /* Same */ 853 "\010<s7>" /* Same */ 854 "\011<s8>" /* Same */ 855 "\012<s9>" /* Same */ 856 "\013<b10>" /* Undefined */ 857 "\014SYSCALL" /* Have SYSCALL/SYSRET */ 858 "\015<s12>" /* Same */ 859 "\016<s13>" /* Same */ 860 "\017<s14>" /* Same */ 861 "\020<s15>" /* Same */ 862 "\021<s16>" /* Same */ 863 "\022<s17>" /* Same */ 864 "\023<b18>" /* Reserved, unknown */ 865 "\024MP" /* Multiprocessor Capable */ 866 "\025NX" /* Has EFER.NXE, NX */ 867 "\026<b21>" /* Undefined */ 868 "\027MMX+" /* AMD MMX Extensions */ 869 "\030<s23>" /* Same */ 870 "\031<s24>" /* Same */ 871 "\032FFXSR" /* Fast FXSAVE/FXRSTOR */ 872 "\033Page1GB" /* 1-GB large page support */ 873 "\034RDTSCP" /* RDTSCP */ 874 "\035<b28>" /* Undefined */ 875 "\036LM" /* 64 bit long mode */ 876 "\0373DNow!+" /* AMD 3DNow! Extensions */ 877 "\0403DNow!" /* AMD 3DNow! */ 878 ); 879 } 880 881 if (amd_feature2 != 0) { 882 printf("\n AMD Features2=0x%b", amd_feature2, 883 "\020" 884 "\001LAHF" /* LAHF/SAHF in long mode */ 885 "\002CMP" /* CMP legacy */ 886 "\003SVM" /* Secure Virtual Mode */ 887 "\004ExtAPIC" /* Extended APIC register */ 888 "\005CR8" /* CR8 in legacy mode */ 889 "\006ABM" /* LZCNT instruction */ 890 "\007SSE4A" /* SSE4A */ 891 "\010MAS" /* Misaligned SSE mode */ 892 "\011Prefetch" /* 3DNow! Prefetch/PrefetchW */ 893 "\012OSVW" /* OS visible workaround */ 894 "\013IBS" /* Instruction based sampling */ 895 "\014XOP" /* XOP extended instructions */ 896 "\015SKINIT" /* SKINIT/STGI */ 897 "\016WDT" /* Watchdog timer */ 898 "\017<b14>" 899 "\020LWP" /* Lightweight Profiling */ 900 "\021FMA4" /* 4-operand FMA instructions */ 901 "\022TCE" /* Translation Cache Extension */ 902 "\023<b18>" 903 "\024NodeId" /* NodeId MSR support */ 904 "\025<b20>" 905 "\026TBM" /* Trailing Bit Manipulation */ 906 "\027Topology" /* Topology Extensions */ 907 "\030PCXC" /* Core perf count */ 908 "\031PNXC" /* NB perf count */ 909 "\032<b25>" 910 "\033DBE" /* Data Breakpoint extension */ 911 "\034PTSC" /* Performance TSC */ 912 "\035PL2I" /* L2I perf count */ 913 "\036MWAITX" /* MONITORX/MWAITX instructions */ 914 "\037<b30>" 915 "\040<b31>" 916 ); 917 } 918 919 if (cpu_stdext_feature != 0) { 920 printf("\n Structured Extended Features=0x%b", 921 cpu_stdext_feature, 922 "\020" 923 /* RDFSBASE/RDGSBASE/WRFSBASE/WRGSBASE */ 924 "\001FSGSBASE" 925 "\002TSCADJ" 926 "\003SGX" 927 /* Bit Manipulation Instructions */ 928 "\004BMI1" 929 /* Hardware Lock Elision */ 930 "\005HLE" 931 /* Advanced Vector Instructions 2 */ 932 "\006AVX2" 933 /* FDP_EXCPTN_ONLY */ 934 "\007FDPEXC" 935 /* Supervisor Mode Execution Prot. */ 936 "\010SMEP" 937 /* Bit Manipulation Instructions */ 938 "\011BMI2" 939 "\012ERMS" 940 /* Invalidate Processor Context ID */ 941 "\013INVPCID" 942 /* Restricted Transactional Memory */ 943 "\014RTM" 944 "\015PQM" 945 "\016NFPUSG" 946 /* Intel Memory Protection Extensions */ 947 "\017MPX" 948 "\020PQE" 949 /* AVX512 Foundation */ 950 "\021AVX512F" 951 "\022AVX512DQ" 952 /* Enhanced NRBG */ 953 "\023RDSEED" 954 /* ADCX + ADOX */ 955 "\024ADX" 956 /* Supervisor Mode Access Prevention */ 957 "\025SMAP" 958 "\026AVX512IFMA" 959 "\027PCOMMIT" 960 "\030CLFLUSHOPT" 961 "\031CLWB" 962 "\032PROCTRACE" 963 "\033AVX512PF" 964 "\034AVX512ER" 965 "\035AVX512CD" 966 "\036SHA" 967 "\037AVX512BW" 968 "\040AVX512VL" 969 ); 970 } 971 972 if (cpu_stdext_feature2 != 0) { 973 printf("\n Structured Extended Features2=0x%b", 974 cpu_stdext_feature2, 975 "\020" 976 "\001PREFETCHWT1" 977 "\002AVX512VBMI" 978 "\003UMIP" 979 "\004PKU" 980 "\005OSPKE" 981 "\027RDPID" 982 "\037SGXLC" 983 ); 984 } 985 986 if (cpu_stdext_feature3 != 0) { 987 printf("\n Structured Extended Features3=0x%b", 988 cpu_stdext_feature3, 989 "\020" 990 "\033IBPB" 991 "\034STIBP" 992 "\035L1DFL" 993 "\036ARCH_CAP" 994 "\040SSBD" 995 ); 996 } 997 998 if ((cpu_feature2 & CPUID2_XSAVE) != 0) { 999 cpuid_count(0xd, 0x1, regs); 1000 if (regs[0] != 0) { 1001 printf("\n XSAVE Features=0x%b", 1002 regs[0], 1003 "\020" 1004 "\001XSAVEOPT" 1005 "\002XSAVEC" 1006 "\003XINUSE" 1007 "\004XSAVES"); 1008 } 1009 } 1010 1011 if (cpu_ia32_arch_caps != 0) { 1012 printf("\n IA32_ARCH_CAPS=0x%b", 1013 (u_int)cpu_ia32_arch_caps, 1014 "\020" 1015 "\001RDCL_NO" 1016 "\002IBRS_ALL" 1017 "\003RSBA" 1018 "\004SKIP_L1DFL_VME" 1019 "\005SSB_NO" 1020 ); 1021 } 1022 1023 if (amd_extended_feature_extensions != 0) { 1024 printf("\n " 1025 "AMD Extended Feature Extensions ID EBX=" 1026 "0x%b", amd_extended_feature_extensions, 1027 "\020" 1028 "\001CLZERO" 1029 "\002IRPerf" 1030 "\003XSaveErPtr"); 1031 } btw the attached kernel is from 10.14.1 sources so it should work better on same os x version. 
     
    found pci/quircks fixs from linux we might need todo on xnu
    https://elixir.bootlin.com/linux/v5.0-rc3/source/arch/x86/pci/fixup.c
    https://elixir.bootlin.com/linux/v5.0-rc3/source/arch/x86/kernel/quirks.c#L50
    the usb fix is just great.
     
    kernel
     
    p3rupN.diff
  2. Like
    jalavoui got a reaction from XLNC in AMD Mojave Kernel Development and Testing   
    i've changed the pat patch in mtrr.c (check .diff)
    need re-check amd errata flags - linux as many more.
     
    please test it on 10.14.1/2
     
    safari issues might be fixed when we get 10.14.2 sources (this is 10.14.1 hacked version)
     
    updated with bsd code (for errata) - this rises others questions (check amd features code)
     
    shanee u need to revert previous github pach to apply this one.
     
    bsd sources can be found here http://fxr.watson.org/fxr/source/amd64/amd64/initcpu.c#L135
     
    xlnc this is from 10.14.2
    int __cdecl necp_client_action(proc *p, necp_client_action_args *uap, int *retval) { u_int32_t action; // [rsp+1Ch] [rbp-34h] necp_fd_data *fd_data; // [rsp+20h] [rbp-30h] int return_value; // [rsp+28h] [rbp-28h] int error; // [rsp+2Ch] [rbp-24h] int *retvala; // [rsp+30h] [rbp-20h] necp_client_action_args *uapa; // [rsp+38h] [rbp-18h] proc *pa; // [rsp+40h] [rbp-10h] int v11; // [rsp+4Ch] [rbp-4h] pa = p; uapa = uap; retvala = retval; error = 0; return_value = 0; fd_data = 0LL; error = necp_find_fd_data(uap->necp_fd, &fd_data); if ( error ) { log(3, "%s: necp_client_action find fd error (%d)\n", "necp_client_action", (unsigned int)error); v11 = error; } else { action = uapa->action; switch ( action ) { case 1u: return_value = necp_client_add(pa, fd_data, uapa, retvala); break; case 2u: return_value = necp_client_remove(fd_data, uapa, retvala); break; case 3u: case 4u: case 16u: return_value = necp_client_copy(fd_data, uapa, retvala); break; case 5u: return_value = necp_client_list(fd_data, uapa, retvala); break; case 6u: return_value = necp_client_request_nexus(fd_data, uapa, retvala); break; case 7u: return_value = necp_client_agent_action(fd_data, uapa, retvala); break; case 8u: return_value = necp_client_copy_agent(fd_data, uapa, retvala); break; case 9u: return_value = necp_client_copy_interface(fd_data, uapa, retvala); break; case 10u: return_value = 45; break; case 11u: return_value = necp_client_copy_route_statistics(fd_data, uapa, retvala); break; case 12u: return_value = necp_client_agent_use(fd_data, uapa, retvala); break; case 13u: return_value = necp_client_map_sysctls(fd_data, uapa, retvala); break; case 14u: return_value = necp_client_update_cache(fd_data, uapa, retvala); break; case 15u: return_value = necp_client_copy_client_update(fd_data, uapa, retvala); break; case 17u: return_value = necp_client_add_flow(fd_data, uapa, retvala); break; case 18u: return_value = necp_client_remove_flow(fd_data, uapa, retvala); break; default: log(3, "%s: necp_client_action unknown action (%u)\n", "necp_client_action", action); return_value = 22; break; } file_drop(uapa->necp_fd); v11 = return_value; } return v11; } we will get this code with new sources, i tried to start porting some code but it as so many calls - i'll wait for apple to release it.
     
    i'll keep this code here for further checking
    /* 753 * AMD CPUID Specification 754 * http://support.amd.com/us/Embedded_TechDocs/25481.pdf 755 * 756 * Intel Processor Identification and CPUID Instruction 757 * http://www.intel.com/assets/pdf/appnote/241618.pdf 758 */ 759 if (cpu_high > 0) { 760 761 /* 762 * Here we should probably set up flags indicating 763 * whether or not various features are available. 764 * The interesting ones are probably VME, PSE, PAE, 765 * and PGE. The code already assumes without bothering 766 * to check that all CPUs >= Pentium have a TSC and 767 * MSRs. 768 */ 769 printf("\n Features=0x%b", cpu_feature, 770 "\020" 771 "\001FPU" /* Integral FPU */ 772 "\002VME" /* Extended VM86 mode support */ 773 "\003DE" /* Debugging Extensions (CR4.DE) */ 774 "\004PSE" /* 4MByte page tables */ 775 "\005TSC" /* Timestamp counter */ 776 "\006MSR" /* Machine specific registers */ 777 "\007PAE" /* Physical address extension */ 778 "\010MCE" /* Machine Check support */ 779 "\011CX8" /* CMPEXCH8 instruction */ 780 "\012APIC" /* SMP local APIC */ 781 "\013oldMTRR" /* Previous implementation of MTRR */ 782 "\014SEP" /* Fast System Call */ 783 "\015MTRR" /* Memory Type Range Registers */ 784 "\016PGE" /* PG_G (global bit) support */ 785 "\017MCA" /* Machine Check Architecture */ 786 "\020CMOV" /* CMOV instruction */ 787 "\021PAT" /* Page attributes table */ 788 "\022PSE36" /* 36 bit address space support */ 789 "\023PN" /* Processor Serial number */ 790 "\024CLFLUSH" /* Has the CLFLUSH instruction */ 791 "\025<b20>" 792 "\026DTS" /* Debug Trace Store */ 793 "\027ACPI" /* ACPI support */ 794 "\030MMX" /* MMX instructions */ 795 "\031FXSR" /* FXSAVE/FXRSTOR */ 796 "\032SSE" /* Streaming SIMD Extensions */ 797 "\033SSE2" /* Streaming SIMD Extensions #2 */ 798 "\034SS" /* Self snoop */ 799 "\035HTT" /* Hyperthreading (see EBX bit 16-23) */ 800 "\036TM" /* Thermal Monitor clock slowdown */ 801 "\037IA64" /* CPU can execute IA64 instructions */ 802 "\040PBE" /* Pending Break Enable */ 803 ); 804 805 if (cpu_feature2 != 0) { 806 printf("\n Features2=0x%b", cpu_feature2, 807 "\020" 808 "\001SSE3" /* SSE3 */ 809 "\002PCLMULQDQ" /* Carry-Less Mul Quadword */ 810 "\003DTES64" /* 64-bit Debug Trace */ 811 "\004MON" /* MONITOR/MWAIT Instructions */ 812 "\005DS_CPL" /* CPL Qualified Debug Store */ 813 "\006VMX" /* Virtual Machine Extensions */ 814 "\007SMX" /* Safer Mode Extensions */ 815 "\010EST" /* Enhanced SpeedStep */ 816 "\011TM2" /* Thermal Monitor 2 */ 817 "\012SSSE3" /* SSSE3 */ 818 "\013CNXT-ID" /* L1 context ID available */ 819 "\014SDBG" /* IA32 silicon debug */ 820 "\015FMA" /* Fused Multiply Add */ 821 "\016CX16" /* CMPXCHG16B Instruction */ 822 "\017xTPR" /* Send Task Priority Messages*/ 823 "\020PDCM" /* Perf/Debug Capability MSR */ 824 "\021<b16>" 825 "\022PCID" /* Process-context Identifiers*/ 826 "\023DCA" /* Direct Cache Access */ 827 "\024SSE4.1" /* SSE 4.1 */ 828 "\025SSE4.2" /* SSE 4.2 */ 829 "\026x2APIC" /* xAPIC Extensions */ 830 "\027MOVBE" /* MOVBE Instruction */ 831 "\030POPCNT" /* POPCNT Instruction */ 832 "\031TSCDLT" /* TSC-Deadline Timer */ 833 "\032AESNI" /* AES Crypto */ 834 "\033XSAVE" /* XSAVE/XRSTOR States */ 835 "\034OSXSAVE" /* OS-Enabled State Management*/ 836 "\035AVX" /* Advanced Vector Extensions */ 837 "\036F16C" /* Half-precision conversions */ 838 "\037RDRAND" /* RDRAND Instruction */ 839 "\040HV" /* Hypervisor */ 840 ); 841 } 842 843 if (amd_feature != 0) { 844 printf("\n AMD Features=0x%b", amd_feature, 845 "\020" /* in hex */ 846 "\001<s0>" /* Same */ 847 "\002<s1>" /* Same */ 848 "\003<s2>" /* Same */ 849 "\004<s3>" /* Same */ 850 "\005<s4>" /* Same */ 851 "\006<s5>" /* Same */ 852 "\007<s6>" /* Same */ 853 "\010<s7>" /* Same */ 854 "\011<s8>" /* Same */ 855 "\012<s9>" /* Same */ 856 "\013<b10>" /* Undefined */ 857 "\014SYSCALL" /* Have SYSCALL/SYSRET */ 858 "\015<s12>" /* Same */ 859 "\016<s13>" /* Same */ 860 "\017<s14>" /* Same */ 861 "\020<s15>" /* Same */ 862 "\021<s16>" /* Same */ 863 "\022<s17>" /* Same */ 864 "\023<b18>" /* Reserved, unknown */ 865 "\024MP" /* Multiprocessor Capable */ 866 "\025NX" /* Has EFER.NXE, NX */ 867 "\026<b21>" /* Undefined */ 868 "\027MMX+" /* AMD MMX Extensions */ 869 "\030<s23>" /* Same */ 870 "\031<s24>" /* Same */ 871 "\032FFXSR" /* Fast FXSAVE/FXRSTOR */ 872 "\033Page1GB" /* 1-GB large page support */ 873 "\034RDTSCP" /* RDTSCP */ 874 "\035<b28>" /* Undefined */ 875 "\036LM" /* 64 bit long mode */ 876 "\0373DNow!+" /* AMD 3DNow! Extensions */ 877 "\0403DNow!" /* AMD 3DNow! */ 878 ); 879 } 880 881 if (amd_feature2 != 0) { 882 printf("\n AMD Features2=0x%b", amd_feature2, 883 "\020" 884 "\001LAHF" /* LAHF/SAHF in long mode */ 885 "\002CMP" /* CMP legacy */ 886 "\003SVM" /* Secure Virtual Mode */ 887 "\004ExtAPIC" /* Extended APIC register */ 888 "\005CR8" /* CR8 in legacy mode */ 889 "\006ABM" /* LZCNT instruction */ 890 "\007SSE4A" /* SSE4A */ 891 "\010MAS" /* Misaligned SSE mode */ 892 "\011Prefetch" /* 3DNow! Prefetch/PrefetchW */ 893 "\012OSVW" /* OS visible workaround */ 894 "\013IBS" /* Instruction based sampling */ 895 "\014XOP" /* XOP extended instructions */ 896 "\015SKINIT" /* SKINIT/STGI */ 897 "\016WDT" /* Watchdog timer */ 898 "\017<b14>" 899 "\020LWP" /* Lightweight Profiling */ 900 "\021FMA4" /* 4-operand FMA instructions */ 901 "\022TCE" /* Translation Cache Extension */ 902 "\023<b18>" 903 "\024NodeId" /* NodeId MSR support */ 904 "\025<b20>" 905 "\026TBM" /* Trailing Bit Manipulation */ 906 "\027Topology" /* Topology Extensions */ 907 "\030PCXC" /* Core perf count */ 908 "\031PNXC" /* NB perf count */ 909 "\032<b25>" 910 "\033DBE" /* Data Breakpoint extension */ 911 "\034PTSC" /* Performance TSC */ 912 "\035PL2I" /* L2I perf count */ 913 "\036MWAITX" /* MONITORX/MWAITX instructions */ 914 "\037<b30>" 915 "\040<b31>" 916 ); 917 } 918 919 if (cpu_stdext_feature != 0) { 920 printf("\n Structured Extended Features=0x%b", 921 cpu_stdext_feature, 922 "\020" 923 /* RDFSBASE/RDGSBASE/WRFSBASE/WRGSBASE */ 924 "\001FSGSBASE" 925 "\002TSCADJ" 926 "\003SGX" 927 /* Bit Manipulation Instructions */ 928 "\004BMI1" 929 /* Hardware Lock Elision */ 930 "\005HLE" 931 /* Advanced Vector Instructions 2 */ 932 "\006AVX2" 933 /* FDP_EXCPTN_ONLY */ 934 "\007FDPEXC" 935 /* Supervisor Mode Execution Prot. */ 936 "\010SMEP" 937 /* Bit Manipulation Instructions */ 938 "\011BMI2" 939 "\012ERMS" 940 /* Invalidate Processor Context ID */ 941 "\013INVPCID" 942 /* Restricted Transactional Memory */ 943 "\014RTM" 944 "\015PQM" 945 "\016NFPUSG" 946 /* Intel Memory Protection Extensions */ 947 "\017MPX" 948 "\020PQE" 949 /* AVX512 Foundation */ 950 "\021AVX512F" 951 "\022AVX512DQ" 952 /* Enhanced NRBG */ 953 "\023RDSEED" 954 /* ADCX + ADOX */ 955 "\024ADX" 956 /* Supervisor Mode Access Prevention */ 957 "\025SMAP" 958 "\026AVX512IFMA" 959 "\027PCOMMIT" 960 "\030CLFLUSHOPT" 961 "\031CLWB" 962 "\032PROCTRACE" 963 "\033AVX512PF" 964 "\034AVX512ER" 965 "\035AVX512CD" 966 "\036SHA" 967 "\037AVX512BW" 968 "\040AVX512VL" 969 ); 970 } 971 972 if (cpu_stdext_feature2 != 0) { 973 printf("\n Structured Extended Features2=0x%b", 974 cpu_stdext_feature2, 975 "\020" 976 "\001PREFETCHWT1" 977 "\002AVX512VBMI" 978 "\003UMIP" 979 "\004PKU" 980 "\005OSPKE" 981 "\027RDPID" 982 "\037SGXLC" 983 ); 984 } 985 986 if (cpu_stdext_feature3 != 0) { 987 printf("\n Structured Extended Features3=0x%b", 988 cpu_stdext_feature3, 989 "\020" 990 "\033IBPB" 991 "\034STIBP" 992 "\035L1DFL" 993 "\036ARCH_CAP" 994 "\040SSBD" 995 ); 996 } 997 998 if ((cpu_feature2 & CPUID2_XSAVE) != 0) { 999 cpuid_count(0xd, 0x1, regs); 1000 if (regs[0] != 0) { 1001 printf("\n XSAVE Features=0x%b", 1002 regs[0], 1003 "\020" 1004 "\001XSAVEOPT" 1005 "\002XSAVEC" 1006 "\003XINUSE" 1007 "\004XSAVES"); 1008 } 1009 } 1010 1011 if (cpu_ia32_arch_caps != 0) { 1012 printf("\n IA32_ARCH_CAPS=0x%b", 1013 (u_int)cpu_ia32_arch_caps, 1014 "\020" 1015 "\001RDCL_NO" 1016 "\002IBRS_ALL" 1017 "\003RSBA" 1018 "\004SKIP_L1DFL_VME" 1019 "\005SSB_NO" 1020 ); 1021 } 1022 1023 if (amd_extended_feature_extensions != 0) { 1024 printf("\n " 1025 "AMD Extended Feature Extensions ID EBX=" 1026 "0x%b", amd_extended_feature_extensions, 1027 "\020" 1028 "\001CLZERO" 1029 "\002IRPerf" 1030 "\003XSaveErPtr"); 1031 } btw the attached kernel is from 10.14.1 sources so it should work better on same os x version. 
     
    found pci/quircks fixs from linux we might need todo on xnu
    https://elixir.bootlin.com/linux/v5.0-rc3/source/arch/x86/pci/fixup.c
    https://elixir.bootlin.com/linux/v5.0-rc3/source/arch/x86/kernel/quirks.c#L50
    the usb fix is just great.
     
    kernel
     
    p3rupN.diff
  3. Like
    jalavoui got a reaction from carlo_67 in AMD Mojave Kernel Development and Testing   
    this can be ported from 10.14.2 (need some fixes to compile)
    int __cdecl necp_client_add_flow(necp_fd_data *fd_data, necp_client_action_args *uap, int *retval) { vm_size_t v3; // rdx vm_size_t v4; // rsi bool v5; // ST2F_1 bool v6; // ST2D_1 user_addr_t v7; // rdx vm_size_t v8; // rsi int result; // eax unsigned __int8 *necp_client_uuid; // [rsp+50h] [rbp-230h] unsigned int copy_error; // [rsp+7Ch] [rbp-204h] necp_stats_bufreq bufreq; // [rsp+80h] [rbp-200h] necp_client_flow_stats *stats_request; // [rsp+98h] [rbp-1E8h] int request_error; // [rsp+A4h] [rbp-1DCh] necp_client_interface_option *option_0; // [rsp+A8h] [rbp-1D8h] necp_client_interface_option *option; // [rsp+B0h] [rbp-1D0h] u_int32_t option_i; // [rsp+BCh] [rbp-1C4h] _Bool found_nexus; // [rsp+C3h] [rbp-1BDh] uint32_t_0 interface_index; // [rsp+C4h] [rbp-1BCh] size_t_0 assigned_results_length; // [rsp+C8h] [rbp-1B8h] void *assigned_results; // [rsp+D0h] [rbp-1B0h] necp_client_flow_registration *new_registration; // [rsp+D8h] [rbp-1A8h] pid_t pid; // [rsp+E4h] [rbp-19Ch] necp_client_add_flow *v24; // [rsp+E8h] [rbp-198h] necp_client_add_flow *allocated_add_request; // [rsp+F0h] [rbp-190h] necp_client_add_flow *add_request; // [rsp+F8h] [rbp-188h] proc *proc; // [rsp+100h] [rbp-180h] necp_client *client; // [rsp+108h] [rbp-178h] int error; // [rsp+114h] [rbp-16Ch] int *retvala; // [rsp+118h] [rbp-168h] necp_client_action_args *uapa; // [rsp+120h] [rbp-160h] necp_fd_data *fd_dataa; // [rsp+128h] [rbp-158h] __int64 v33; // [rsp+130h] [rbp-150h] vm_size_t nbytes; // [rsp+138h] [rbp-148h] void *kernel_addr; // [rsp+140h] [rbp-140h] user_addr_t user_addr; // [rsp+148h] [rbp-138h] __int64 v37; // [rsp+150h] [rbp-130h] vm_size_t v38; // [rsp+158h] [rbp-128h] void *v39; // [rsp+160h] [rbp-120h] user_addr_t v40; // [rsp+168h] [rbp-118h] __int64 v41; // [rsp+170h] [rbp-110h] vm_size_t v42; // [rsp+178h] [rbp-108h] void *v43; // [rsp+180h] [rbp-100h] user_addr_t v44; // [rsp+188h] [rbp-F8h] __int64 v45; // [rsp+190h] [rbp-F0h] vm_size_t v46; // [rsp+198h] [rbp-E8h] user_addr_t v47; // [rsp+1A0h] [rbp-E0h] void *v48; // [rsp+1A8h] [rbp-D8h] necp_client_add_flow_default default_add_request; // [rsp+1B0h] [rbp-D0h] necp_client_nexus_parameters parameters; // [rsp+1F0h] [rbp-90h] uuid_t client_id; // [rsp+250h] [rbp-30h] __int64 v52; // [rsp+268h] [rbp-18h] fd_dataa = fd_data; uapa = uap; retvala = retval; error = 0; client = 0LL; secure_memset(&parameters, 0, 0x60uLL); proc = 0LL; add_request = 0LL; allocated_add_request = 0LL; secure_memset(&default_add_request, 0, 0x3CuLL); if ( !uap->client_id || uapa->client_id_len != 16 ) { error = 22; log(3, "%s: necp_client_add_flow invalid client_id (length %zu)\n", "necp_client_add_flow", uapa->client_id_len); goto LABEL_64; } if ( !uapa->buffer || uapa->buffer_size < 0x24 ) { error = 22; log(3, "%s: necp_client_add_flow invalid buffer (length %zu)\n", "necp_client_add_flow", uapa->buffer_size); goto LABEL_64; } user_addr = uapa->client_id; kernel_addr = client_id; nbytes = 16LL; v33 = 16LL; error = copyin(user_addr, client_id, 0x10uLL); if ( error ) { log(3, "%s: necp_client_add_flow copyin client_id error (%d)\n", "necp_client_add_flow", (unsigned int)error); goto LABEL_64; } if ( uapa->buffer_size > 0x3C ) { v24 = (necp_client_add_flow *)_MALLOC(uapa->buffer_size, 118, 4, &necp_client_add_flow_site); allocated_add_request = v24; if ( !v24 ) { error = 12; goto LABEL_64; } v4 = uapa->buffer_size; v44 = uapa->buffer; v43 = allocated_add_request; v42 = v4; v41 = -1LL; if ( v4 > 0xFFFFFFFFFFFFFFFFLL ) panic( "\"__copyin_chk object size check failed: uaddr %p, kaddr %p, (%zu < %zu)\"@/BuildRoot/Library/Caches/com.apple.x" "bs/Sources/xnu_debug/xnu-4903.231.4/bsd/libkern/copyio.h:45", v44, v43, v42, v41); error = copyin(v44, v43, v42); if ( error ) { log( 3, "%s: necp_client_add_flow copyin default_add_request error (%d)\n", "necp_client_add_flow", (unsigned int)error); goto LABEL_64; } add_request = allocated_add_request; } else { v3 = uapa->buffer_size; v40 = uapa->buffer; v39 = &default_add_request; v38 = v3; v37 = 60LL; if ( v3 > 0x3C ) panic( "\"__copyin_chk object size check failed: uaddr %p, kaddr %p, (%zu < %zu)\"@/BuildRoot/Library/Caches/com.apple.x" "bs/Sources/xnu_debug/xnu-4903.231.4/bsd/libkern/copyio.h:45", v40, v39, v38, v37); error = copyin(v40, v39, v38); if ( error ) { log( 3, "%s: necp_client_add_flow copyin default_add_request error (%d)\n", "necp_client_add_flow", (unsigned int)error); goto LABEL_64; } add_request = (necp_client_add_flow *)&default_add_request; } lck_mtx_lock((lck_mtx_t *)&fd_dataa->fd_lock); pid = fd_dataa->proc_pid; proc = proc_find(pid); if ( proc ) { client = necp_client_fd_find_client_and_lock(fd_dataa, client_id); if ( client ) { *((_BYTE *)client + 100) &= 0xFBu; necp_client_retain_locked(client); necp_client_copy_parameters_locked(client, &parameters); new_registration = necp_client_create_flow_registration(fd_dataa, client); if ( new_registration ) { new_registration->flags = add_request->flags; uuid_copy(add_request->registration_id, new_registration->registration_id); if ( add_request->flags & 1 ) { assigned_results = 0LL; assigned_results_length = 0LL; interface_index = 0; found_nexus = 0; for ( option_i = 0; option_i < client->interface_option_count; ++option_i ) { if ( option_i >= 4 ) { option_0 = &client->extra_interface_options[option_i - 4]; if ( !uuid_compare(option_0->nexus_agent, add_request->agent_uuid) ) { interface_index = option_0->interface_index; found_nexus = 1; break; } } else { option = &client->interface_options[option_i]; if ( !uuid_compare(option->nexus_agent, add_request->agent_uuid) ) { interface_index = option->interface_index; found_nexus = 1; break; } } } if ( found_nexus ) { necp_client_add_nexus_flow_if_needed(new_registration, add_request->agent_uuid, interface_index); if ( new_registration->flags & 2 ) necp_client_uuid = client->client_id; else necp_client_uuid = new_registration->registration_id; request_error = netagent_client_message_with_params( add_request->agent_uuid, necp_client_uuid, pid, client->agent_handle, 0xAu, &parameters, &assigned_results, &assigned_results_length); if ( request_error ) { if ( assigned_results ) v5 = assfail( "assigned_results == NULL", "/BuildRoot/Library/Caches/com.apple.xbs/Sources/xnu_debug/xnu-4903.231.4/bsd/net/necp_client.c", 6107) != 0; if ( assigned_results_length ) v6 = assfail( "assigned_results_length == 0", "/BuildRoot/Library/Caches/com.apple.xbs/Sources/xnu_debug/xnu-4903.231.4/bsd/net/necp_client.c", 6108) != 0; log(3, "%s: netagent_client_message error (%d)\n", "necp_client_add_flow", (unsigned int)request_error); } else if ( assigned_results && assigned_results_length ) { if ( !necp_assign_client_result_locked( proc, fd_dataa, client, new_registration, add_request->agent_uuid, (u_int8_t *)assigned_results, assigned_results_length, 0) && assigned_results ) { FREE(assigned_results, 124); } } else if ( assigned_results ) { FREE(assigned_results, 124); } } else { log(3, "%s: %s\n", "necp_client_add_flow", "Requested nexus not found"); } } if ( (signed int)add_request->stats_request_count > 0 && !necp_arena_initialize(fd_dataa, 1) ) { stats_request = (necp_client_flow_stats *)&add_request[1]; secure_memset(&bufreq, 0, 0x18uLL); bufreq.necp_stats_bufreq_id = 191; *(_QWORD *)&bufreq.necp_stats_bufreq_type = *(_QWORD *)&stats_request->stats_type; bufreq.necp_stats_bufreq_size = stats_request->stats_size; bufreq._anon_0.necp_stats_bufreq_uaddr = stats_request->stats_addr; necp_stats_initialize(fd_dataa, client, new_registration, &bufreq); *(_QWORD *)&stats_request->stats_type = *(_QWORD *)&bufreq.necp_stats_bufreq_type; stats_request->stats_size = bufreq.necp_stats_bufreq_size; stats_request->stats_addr = bufreq._anon_0.necp_stats_bufreq_uaddr; } lck_mtx_unlock((lck_mtx_t *)&client->lock); lck_mtx_unlock((lck_mtx_t *)&fd_dataa->fd_lock); necp_client_release(client); v7 = uapa->buffer; v8 = uapa->buffer_size; v48 = add_request; v47 = v7; v46 = v8; v45 = -1LL; if ( v8 > 0xFFFFFFFFFFFFFFFFLL ) panic( "\"__copyout_chk object size check failed: uaddr %p, kaddr %p, (%zu < %zu)\"@/BuildRoot/Library/Caches/com.ap" "ple.xbs/Sources/xnu_debug/xnu-4903.231.4/bsd/libkern/copyio.h:54", v47, v48, v46, v45); copy_error = copyout(v48, v47, v46); if ( copy_error ) log(3, "%s: necp_client_add_flow copyout add_request error (%d)\n", "necp_client_add_flow", copy_error); } else { error = 12; lck_mtx_unlock((lck_mtx_t *)&client->lock); lck_mtx_unlock((lck_mtx_t *)&fd_dataa->fd_lock); log(3, "%s: %s\n", "necp_client_add_flow", "Failed to allocate flow registration"); } } else { error = 2; lck_mtx_unlock((lck_mtx_t *)&fd_dataa->fd_lock); } } else { lck_mtx_unlock((lck_mtx_t *)&fd_dataa->fd_lock); log( 3, "%s: necp_client_add_flow process not found for pid %d error (%d)\n", "necp_client_add_flow", (unsigned int)pid, (unsigned int)error); error = 3; } LABEL_64: *retvala = error; if ( error ) log(3, "%s: Add flow error (%d)\n", "necp_client_add_flow", (unsigned int)error); if ( allocated_add_request ) FREE(allocated_add_request, 118); if ( proc ) proc_rele(proc); result = error; if ( _stack_chk_guard == v52 ) result = error; return result; }  
    i've just added a cpu errata code to xnu (from freebsd)
    static void init_amd_erratas(i386_cpu_info_t *info_p) { uint64_t msr; /* * Work around Erratum 721 for Family 10h and 12h processors. * These processors may incorrectly update the stack pointer * after a long series of push and/or near-call instructions, * or a long series of pop and/or near-return instructions. * * http://support.amd.com/us/Processor_TechDocs/41322_10h_Rev_Gd.pdf * http://support.amd.com/us/Processor_TechDocs/44739_12h_Rev_Gd.pdf * * Hypervisors do not provide access to the errata MSR, * causing #GP exception on attempt to apply the errata. The * MSR write shall be done on host and persist globally * anyway, so do not try to do it when under virtualization. */ switch (info_p->cpuid_family) { case 0x10: case 0x12: if ((info_p->cpuid_features & 0x80000000) == 0) wrmsr64(0xc0011029, rdmsr64(0xc0011029) | 1); break; } /* * BIOS may fail to set InitApicIdCpuIdLo to 1 as it should per BKDG. * So, do it here or otherwise some tools could be confused by * Initial Local APIC ID reported with CPUID Function 1 in EBX. */ if (info_p->cpuid_family == 0x10) { if ((info_p->cpuid_features & 0x80000000) == 0) { msr = rdmsr64(0xc001001f); msr |= (uint64_t)1 << 54; wrmsr64(0xc001001f, msr); } } /* * BIOS may configure Family 10h processors to convert WC+ cache type * to CD. That can hurt performance of guest VMs using nested paging. * The relevant MSR bit is not documented in the BKDG, * the fix is borrowed from Linux. */ if (info_p->cpuid_family == 0x10) { if ((info_p->cpuid_features & 0x80000000) == 0) { msr = rdmsr64(0xc001102a); msr &= ~((uint64_t)1 << 24); wrmsr64(0xc001102a, msr); } } /* * Work around Erratum 793: Specific Combination of Writes to Write * Combined Memory Types and Locked Instructions May Cause Core Hang. * See Revision Guide for AMD Family 16h Models 00h-0Fh Processors, * revision 3.04 or later, publication 51810. */ if (info_p->cpuid_family== 0x16 && info_p->cpuid_model <= 0xf) { if ((info_p->cpuid_features & 0x80000000) == 0) { msr = rdmsr64(0xc0011020); msr |= (uint64_t)1 << 15; wrmsr64(0xc0011020, msr); } } /* Ryzen erratas. */ if (info_p->cpuid_family == 0x17 && info_p->cpuid_model == 0x1 && (info_p->cpuid_features & 0x80000000) == 0) { /* 1021 */ msr = rdmsr64(0xc0011029); msr |= 0x2000; wrmsr64(0xc0011029, msr); /* 1033 */ msr = rdmsr64(0xc0011020); msr |= 0x10; wrmsr64(0xc0011020, msr); /* 1049 */ msr = rdmsr64(0xc0011028); msr |= 0x10; wrmsr64(0xc0011028, msr); /* 1095 */ msr = rdmsr64(0xc0011020); msr |= 0x200000000000000; wrmsr64(0xc0011020, msr); } /* * Work around a problem on Ryzen that is triggered by executing * code near the top of user memory, in our case the signal * trampoline code in the shared page on amd64. * * This function is executed once for the BSP before tunables take * effect so the value determined here can be overridden by the * tunable. This function is then executed again for each AP and * also on resume. Set a flag the first time so that value set by * the tunable is not overwritten. * * The stepping and/or microcode versions should be checked after * this issue is fixed by AMD so that we don't use this mode if not * needed. */ /*if (lower_sharedpage_init == 0) { lower_sharedpage_init = 1; if (info_p->cpuid_family == 0x17) { hw_lower_amd64_sharedpage = 1; } } amd64_lower_shared_page(struct sysentvec *sv) if (hw_lower_amd64_sharedpage != 0) { sv->sv_maxuser -= PAGE_SIZE; sv->sv_shared_page_base -= PAGE_SIZE; sv->sv_usrstack -= PAGE_SIZE; sv->sv_psstrings -= PAGE_SIZE; }*/ } attached kernel for testing on 10.14.2
    source is based on https://github.com/Shaneee92/Mojave_AMD_XNU (with opemu) + 2 functions (check p1.diff)
     
    will also check https://github.com/torvalds/linux/blob/master/arch/x86/kernel/cpu/amd.c
     
    the mach_msg_destroy_from_kernel_proper() will be available as soon as 10.14.2 sources are out. 
    the necp_client_add_flow() doesnt exist in 10.14.1 sources - maybe remove it and test ?
     
    update:
    - fixed cpu errata call spot
     
     
     
     
    kernel
    p2.diff
  4. Like
    jalavoui got a reaction from carlo_67 in AMD Mojave Kernel Development and Testing   
    this can be ported from 10.14.2 (need some fixes to compile)
    int __cdecl necp_client_add_flow(necp_fd_data *fd_data, necp_client_action_args *uap, int *retval) { vm_size_t v3; // rdx vm_size_t v4; // rsi bool v5; // ST2F_1 bool v6; // ST2D_1 user_addr_t v7; // rdx vm_size_t v8; // rsi int result; // eax unsigned __int8 *necp_client_uuid; // [rsp+50h] [rbp-230h] unsigned int copy_error; // [rsp+7Ch] [rbp-204h] necp_stats_bufreq bufreq; // [rsp+80h] [rbp-200h] necp_client_flow_stats *stats_request; // [rsp+98h] [rbp-1E8h] int request_error; // [rsp+A4h] [rbp-1DCh] necp_client_interface_option *option_0; // [rsp+A8h] [rbp-1D8h] necp_client_interface_option *option; // [rsp+B0h] [rbp-1D0h] u_int32_t option_i; // [rsp+BCh] [rbp-1C4h] _Bool found_nexus; // [rsp+C3h] [rbp-1BDh] uint32_t_0 interface_index; // [rsp+C4h] [rbp-1BCh] size_t_0 assigned_results_length; // [rsp+C8h] [rbp-1B8h] void *assigned_results; // [rsp+D0h] [rbp-1B0h] necp_client_flow_registration *new_registration; // [rsp+D8h] [rbp-1A8h] pid_t pid; // [rsp+E4h] [rbp-19Ch] necp_client_add_flow *v24; // [rsp+E8h] [rbp-198h] necp_client_add_flow *allocated_add_request; // [rsp+F0h] [rbp-190h] necp_client_add_flow *add_request; // [rsp+F8h] [rbp-188h] proc *proc; // [rsp+100h] [rbp-180h] necp_client *client; // [rsp+108h] [rbp-178h] int error; // [rsp+114h] [rbp-16Ch] int *retvala; // [rsp+118h] [rbp-168h] necp_client_action_args *uapa; // [rsp+120h] [rbp-160h] necp_fd_data *fd_dataa; // [rsp+128h] [rbp-158h] __int64 v33; // [rsp+130h] [rbp-150h] vm_size_t nbytes; // [rsp+138h] [rbp-148h] void *kernel_addr; // [rsp+140h] [rbp-140h] user_addr_t user_addr; // [rsp+148h] [rbp-138h] __int64 v37; // [rsp+150h] [rbp-130h] vm_size_t v38; // [rsp+158h] [rbp-128h] void *v39; // [rsp+160h] [rbp-120h] user_addr_t v40; // [rsp+168h] [rbp-118h] __int64 v41; // [rsp+170h] [rbp-110h] vm_size_t v42; // [rsp+178h] [rbp-108h] void *v43; // [rsp+180h] [rbp-100h] user_addr_t v44; // [rsp+188h] [rbp-F8h] __int64 v45; // [rsp+190h] [rbp-F0h] vm_size_t v46; // [rsp+198h] [rbp-E8h] user_addr_t v47; // [rsp+1A0h] [rbp-E0h] void *v48; // [rsp+1A8h] [rbp-D8h] necp_client_add_flow_default default_add_request; // [rsp+1B0h] [rbp-D0h] necp_client_nexus_parameters parameters; // [rsp+1F0h] [rbp-90h] uuid_t client_id; // [rsp+250h] [rbp-30h] __int64 v52; // [rsp+268h] [rbp-18h] fd_dataa = fd_data; uapa = uap; retvala = retval; error = 0; client = 0LL; secure_memset(&parameters, 0, 0x60uLL); proc = 0LL; add_request = 0LL; allocated_add_request = 0LL; secure_memset(&default_add_request, 0, 0x3CuLL); if ( !uap->client_id || uapa->client_id_len != 16 ) { error = 22; log(3, "%s: necp_client_add_flow invalid client_id (length %zu)\n", "necp_client_add_flow", uapa->client_id_len); goto LABEL_64; } if ( !uapa->buffer || uapa->buffer_size < 0x24 ) { error = 22; log(3, "%s: necp_client_add_flow invalid buffer (length %zu)\n", "necp_client_add_flow", uapa->buffer_size); goto LABEL_64; } user_addr = uapa->client_id; kernel_addr = client_id; nbytes = 16LL; v33 = 16LL; error = copyin(user_addr, client_id, 0x10uLL); if ( error ) { log(3, "%s: necp_client_add_flow copyin client_id error (%d)\n", "necp_client_add_flow", (unsigned int)error); goto LABEL_64; } if ( uapa->buffer_size > 0x3C ) { v24 = (necp_client_add_flow *)_MALLOC(uapa->buffer_size, 118, 4, &necp_client_add_flow_site); allocated_add_request = v24; if ( !v24 ) { error = 12; goto LABEL_64; } v4 = uapa->buffer_size; v44 = uapa->buffer; v43 = allocated_add_request; v42 = v4; v41 = -1LL; if ( v4 > 0xFFFFFFFFFFFFFFFFLL ) panic( "\"__copyin_chk object size check failed: uaddr %p, kaddr %p, (%zu < %zu)\"@/BuildRoot/Library/Caches/com.apple.x" "bs/Sources/xnu_debug/xnu-4903.231.4/bsd/libkern/copyio.h:45", v44, v43, v42, v41); error = copyin(v44, v43, v42); if ( error ) { log( 3, "%s: necp_client_add_flow copyin default_add_request error (%d)\n", "necp_client_add_flow", (unsigned int)error); goto LABEL_64; } add_request = allocated_add_request; } else { v3 = uapa->buffer_size; v40 = uapa->buffer; v39 = &default_add_request; v38 = v3; v37 = 60LL; if ( v3 > 0x3C ) panic( "\"__copyin_chk object size check failed: uaddr %p, kaddr %p, (%zu < %zu)\"@/BuildRoot/Library/Caches/com.apple.x" "bs/Sources/xnu_debug/xnu-4903.231.4/bsd/libkern/copyio.h:45", v40, v39, v38, v37); error = copyin(v40, v39, v38); if ( error ) { log( 3, "%s: necp_client_add_flow copyin default_add_request error (%d)\n", "necp_client_add_flow", (unsigned int)error); goto LABEL_64; } add_request = (necp_client_add_flow *)&default_add_request; } lck_mtx_lock((lck_mtx_t *)&fd_dataa->fd_lock); pid = fd_dataa->proc_pid; proc = proc_find(pid); if ( proc ) { client = necp_client_fd_find_client_and_lock(fd_dataa, client_id); if ( client ) { *((_BYTE *)client + 100) &= 0xFBu; necp_client_retain_locked(client); necp_client_copy_parameters_locked(client, &parameters); new_registration = necp_client_create_flow_registration(fd_dataa, client); if ( new_registration ) { new_registration->flags = add_request->flags; uuid_copy(add_request->registration_id, new_registration->registration_id); if ( add_request->flags & 1 ) { assigned_results = 0LL; assigned_results_length = 0LL; interface_index = 0; found_nexus = 0; for ( option_i = 0; option_i < client->interface_option_count; ++option_i ) { if ( option_i >= 4 ) { option_0 = &client->extra_interface_options[option_i - 4]; if ( !uuid_compare(option_0->nexus_agent, add_request->agent_uuid) ) { interface_index = option_0->interface_index; found_nexus = 1; break; } } else { option = &client->interface_options[option_i]; if ( !uuid_compare(option->nexus_agent, add_request->agent_uuid) ) { interface_index = option->interface_index; found_nexus = 1; break; } } } if ( found_nexus ) { necp_client_add_nexus_flow_if_needed(new_registration, add_request->agent_uuid, interface_index); if ( new_registration->flags & 2 ) necp_client_uuid = client->client_id; else necp_client_uuid = new_registration->registration_id; request_error = netagent_client_message_with_params( add_request->agent_uuid, necp_client_uuid, pid, client->agent_handle, 0xAu, &parameters, &assigned_results, &assigned_results_length); if ( request_error ) { if ( assigned_results ) v5 = assfail( "assigned_results == NULL", "/BuildRoot/Library/Caches/com.apple.xbs/Sources/xnu_debug/xnu-4903.231.4/bsd/net/necp_client.c", 6107) != 0; if ( assigned_results_length ) v6 = assfail( "assigned_results_length == 0", "/BuildRoot/Library/Caches/com.apple.xbs/Sources/xnu_debug/xnu-4903.231.4/bsd/net/necp_client.c", 6108) != 0; log(3, "%s: netagent_client_message error (%d)\n", "necp_client_add_flow", (unsigned int)request_error); } else if ( assigned_results && assigned_results_length ) { if ( !necp_assign_client_result_locked( proc, fd_dataa, client, new_registration, add_request->agent_uuid, (u_int8_t *)assigned_results, assigned_results_length, 0) && assigned_results ) { FREE(assigned_results, 124); } } else if ( assigned_results ) { FREE(assigned_results, 124); } } else { log(3, "%s: %s\n", "necp_client_add_flow", "Requested nexus not found"); } } if ( (signed int)add_request->stats_request_count > 0 && !necp_arena_initialize(fd_dataa, 1) ) { stats_request = (necp_client_flow_stats *)&add_request[1]; secure_memset(&bufreq, 0, 0x18uLL); bufreq.necp_stats_bufreq_id = 191; *(_QWORD *)&bufreq.necp_stats_bufreq_type = *(_QWORD *)&stats_request->stats_type; bufreq.necp_stats_bufreq_size = stats_request->stats_size; bufreq._anon_0.necp_stats_bufreq_uaddr = stats_request->stats_addr; necp_stats_initialize(fd_dataa, client, new_registration, &bufreq); *(_QWORD *)&stats_request->stats_type = *(_QWORD *)&bufreq.necp_stats_bufreq_type; stats_request->stats_size = bufreq.necp_stats_bufreq_size; stats_request->stats_addr = bufreq._anon_0.necp_stats_bufreq_uaddr; } lck_mtx_unlock((lck_mtx_t *)&client->lock); lck_mtx_unlock((lck_mtx_t *)&fd_dataa->fd_lock); necp_client_release(client); v7 = uapa->buffer; v8 = uapa->buffer_size; v48 = add_request; v47 = v7; v46 = v8; v45 = -1LL; if ( v8 > 0xFFFFFFFFFFFFFFFFLL ) panic( "\"__copyout_chk object size check failed: uaddr %p, kaddr %p, (%zu < %zu)\"@/BuildRoot/Library/Caches/com.ap" "ple.xbs/Sources/xnu_debug/xnu-4903.231.4/bsd/libkern/copyio.h:54", v47, v48, v46, v45); copy_error = copyout(v48, v47, v46); if ( copy_error ) log(3, "%s: necp_client_add_flow copyout add_request error (%d)\n", "necp_client_add_flow", copy_error); } else { error = 12; lck_mtx_unlock((lck_mtx_t *)&client->lock); lck_mtx_unlock((lck_mtx_t *)&fd_dataa->fd_lock); log(3, "%s: %s\n", "necp_client_add_flow", "Failed to allocate flow registration"); } } else { error = 2; lck_mtx_unlock((lck_mtx_t *)&fd_dataa->fd_lock); } } else { lck_mtx_unlock((lck_mtx_t *)&fd_dataa->fd_lock); log( 3, "%s: necp_client_add_flow process not found for pid %d error (%d)\n", "necp_client_add_flow", (unsigned int)pid, (unsigned int)error); error = 3; } LABEL_64: *retvala = error; if ( error ) log(3, "%s: Add flow error (%d)\n", "necp_client_add_flow", (unsigned int)error); if ( allocated_add_request ) FREE(allocated_add_request, 118); if ( proc ) proc_rele(proc); result = error; if ( _stack_chk_guard == v52 ) result = error; return result; }  
    i've just added a cpu errata code to xnu (from freebsd)
    static void init_amd_erratas(i386_cpu_info_t *info_p) { uint64_t msr; /* * Work around Erratum 721 for Family 10h and 12h processors. * These processors may incorrectly update the stack pointer * after a long series of push and/or near-call instructions, * or a long series of pop and/or near-return instructions. * * http://support.amd.com/us/Processor_TechDocs/41322_10h_Rev_Gd.pdf * http://support.amd.com/us/Processor_TechDocs/44739_12h_Rev_Gd.pdf * * Hypervisors do not provide access to the errata MSR, * causing #GP exception on attempt to apply the errata. The * MSR write shall be done on host and persist globally * anyway, so do not try to do it when under virtualization. */ switch (info_p->cpuid_family) { case 0x10: case 0x12: if ((info_p->cpuid_features & 0x80000000) == 0) wrmsr64(0xc0011029, rdmsr64(0xc0011029) | 1); break; } /* * BIOS may fail to set InitApicIdCpuIdLo to 1 as it should per BKDG. * So, do it here or otherwise some tools could be confused by * Initial Local APIC ID reported with CPUID Function 1 in EBX. */ if (info_p->cpuid_family == 0x10) { if ((info_p->cpuid_features & 0x80000000) == 0) { msr = rdmsr64(0xc001001f); msr |= (uint64_t)1 << 54; wrmsr64(0xc001001f, msr); } } /* * BIOS may configure Family 10h processors to convert WC+ cache type * to CD. That can hurt performance of guest VMs using nested paging. * The relevant MSR bit is not documented in the BKDG, * the fix is borrowed from Linux. */ if (info_p->cpuid_family == 0x10) { if ((info_p->cpuid_features & 0x80000000) == 0) { msr = rdmsr64(0xc001102a); msr &= ~((uint64_t)1 << 24); wrmsr64(0xc001102a, msr); } } /* * Work around Erratum 793: Specific Combination of Writes to Write * Combined Memory Types and Locked Instructions May Cause Core Hang. * See Revision Guide for AMD Family 16h Models 00h-0Fh Processors, * revision 3.04 or later, publication 51810. */ if (info_p->cpuid_family== 0x16 && info_p->cpuid_model <= 0xf) { if ((info_p->cpuid_features & 0x80000000) == 0) { msr = rdmsr64(0xc0011020); msr |= (uint64_t)1 << 15; wrmsr64(0xc0011020, msr); } } /* Ryzen erratas. */ if (info_p->cpuid_family == 0x17 && info_p->cpuid_model == 0x1 && (info_p->cpuid_features & 0x80000000) == 0) { /* 1021 */ msr = rdmsr64(0xc0011029); msr |= 0x2000; wrmsr64(0xc0011029, msr); /* 1033 */ msr = rdmsr64(0xc0011020); msr |= 0x10; wrmsr64(0xc0011020, msr); /* 1049 */ msr = rdmsr64(0xc0011028); msr |= 0x10; wrmsr64(0xc0011028, msr); /* 1095 */ msr = rdmsr64(0xc0011020); msr |= 0x200000000000000; wrmsr64(0xc0011020, msr); } /* * Work around a problem on Ryzen that is triggered by executing * code near the top of user memory, in our case the signal * trampoline code in the shared page on amd64. * * This function is executed once for the BSP before tunables take * effect so the value determined here can be overridden by the * tunable. This function is then executed again for each AP and * also on resume. Set a flag the first time so that value set by * the tunable is not overwritten. * * The stepping and/or microcode versions should be checked after * this issue is fixed by AMD so that we don't use this mode if not * needed. */ /*if (lower_sharedpage_init == 0) { lower_sharedpage_init = 1; if (info_p->cpuid_family == 0x17) { hw_lower_amd64_sharedpage = 1; } } amd64_lower_shared_page(struct sysentvec *sv) if (hw_lower_amd64_sharedpage != 0) { sv->sv_maxuser -= PAGE_SIZE; sv->sv_shared_page_base -= PAGE_SIZE; sv->sv_usrstack -= PAGE_SIZE; sv->sv_psstrings -= PAGE_SIZE; }*/ } attached kernel for testing on 10.14.2
    source is based on https://github.com/Shaneee92/Mojave_AMD_XNU (with opemu) + 2 functions (check p1.diff)
     
    will also check https://github.com/torvalds/linux/blob/master/arch/x86/kernel/cpu/amd.c
     
    the mach_msg_destroy_from_kernel_proper() will be available as soon as 10.14.2 sources are out. 
    the necp_client_add_flow() doesnt exist in 10.14.1 sources - maybe remove it and test ?
     
    update:
    - fixed cpu errata call spot
     
     
     
     
    kernel
    p2.diff
  5. Like
    jalavoui got a reaction from carlo_67 in AMD Mojave Kernel Development and Testing   
    this can be ported from 10.14.2 (need some fixes to compile)
    int __cdecl necp_client_add_flow(necp_fd_data *fd_data, necp_client_action_args *uap, int *retval) { vm_size_t v3; // rdx vm_size_t v4; // rsi bool v5; // ST2F_1 bool v6; // ST2D_1 user_addr_t v7; // rdx vm_size_t v8; // rsi int result; // eax unsigned __int8 *necp_client_uuid; // [rsp+50h] [rbp-230h] unsigned int copy_error; // [rsp+7Ch] [rbp-204h] necp_stats_bufreq bufreq; // [rsp+80h] [rbp-200h] necp_client_flow_stats *stats_request; // [rsp+98h] [rbp-1E8h] int request_error; // [rsp+A4h] [rbp-1DCh] necp_client_interface_option *option_0; // [rsp+A8h] [rbp-1D8h] necp_client_interface_option *option; // [rsp+B0h] [rbp-1D0h] u_int32_t option_i; // [rsp+BCh] [rbp-1C4h] _Bool found_nexus; // [rsp+C3h] [rbp-1BDh] uint32_t_0 interface_index; // [rsp+C4h] [rbp-1BCh] size_t_0 assigned_results_length; // [rsp+C8h] [rbp-1B8h] void *assigned_results; // [rsp+D0h] [rbp-1B0h] necp_client_flow_registration *new_registration; // [rsp+D8h] [rbp-1A8h] pid_t pid; // [rsp+E4h] [rbp-19Ch] necp_client_add_flow *v24; // [rsp+E8h] [rbp-198h] necp_client_add_flow *allocated_add_request; // [rsp+F0h] [rbp-190h] necp_client_add_flow *add_request; // [rsp+F8h] [rbp-188h] proc *proc; // [rsp+100h] [rbp-180h] necp_client *client; // [rsp+108h] [rbp-178h] int error; // [rsp+114h] [rbp-16Ch] int *retvala; // [rsp+118h] [rbp-168h] necp_client_action_args *uapa; // [rsp+120h] [rbp-160h] necp_fd_data *fd_dataa; // [rsp+128h] [rbp-158h] __int64 v33; // [rsp+130h] [rbp-150h] vm_size_t nbytes; // [rsp+138h] [rbp-148h] void *kernel_addr; // [rsp+140h] [rbp-140h] user_addr_t user_addr; // [rsp+148h] [rbp-138h] __int64 v37; // [rsp+150h] [rbp-130h] vm_size_t v38; // [rsp+158h] [rbp-128h] void *v39; // [rsp+160h] [rbp-120h] user_addr_t v40; // [rsp+168h] [rbp-118h] __int64 v41; // [rsp+170h] [rbp-110h] vm_size_t v42; // [rsp+178h] [rbp-108h] void *v43; // [rsp+180h] [rbp-100h] user_addr_t v44; // [rsp+188h] [rbp-F8h] __int64 v45; // [rsp+190h] [rbp-F0h] vm_size_t v46; // [rsp+198h] [rbp-E8h] user_addr_t v47; // [rsp+1A0h] [rbp-E0h] void *v48; // [rsp+1A8h] [rbp-D8h] necp_client_add_flow_default default_add_request; // [rsp+1B0h] [rbp-D0h] necp_client_nexus_parameters parameters; // [rsp+1F0h] [rbp-90h] uuid_t client_id; // [rsp+250h] [rbp-30h] __int64 v52; // [rsp+268h] [rbp-18h] fd_dataa = fd_data; uapa = uap; retvala = retval; error = 0; client = 0LL; secure_memset(&parameters, 0, 0x60uLL); proc = 0LL; add_request = 0LL; allocated_add_request = 0LL; secure_memset(&default_add_request, 0, 0x3CuLL); if ( !uap->client_id || uapa->client_id_len != 16 ) { error = 22; log(3, "%s: necp_client_add_flow invalid client_id (length %zu)\n", "necp_client_add_flow", uapa->client_id_len); goto LABEL_64; } if ( !uapa->buffer || uapa->buffer_size < 0x24 ) { error = 22; log(3, "%s: necp_client_add_flow invalid buffer (length %zu)\n", "necp_client_add_flow", uapa->buffer_size); goto LABEL_64; } user_addr = uapa->client_id; kernel_addr = client_id; nbytes = 16LL; v33 = 16LL; error = copyin(user_addr, client_id, 0x10uLL); if ( error ) { log(3, "%s: necp_client_add_flow copyin client_id error (%d)\n", "necp_client_add_flow", (unsigned int)error); goto LABEL_64; } if ( uapa->buffer_size > 0x3C ) { v24 = (necp_client_add_flow *)_MALLOC(uapa->buffer_size, 118, 4, &necp_client_add_flow_site); allocated_add_request = v24; if ( !v24 ) { error = 12; goto LABEL_64; } v4 = uapa->buffer_size; v44 = uapa->buffer; v43 = allocated_add_request; v42 = v4; v41 = -1LL; if ( v4 > 0xFFFFFFFFFFFFFFFFLL ) panic( "\"__copyin_chk object size check failed: uaddr %p, kaddr %p, (%zu < %zu)\"@/BuildRoot/Library/Caches/com.apple.x" "bs/Sources/xnu_debug/xnu-4903.231.4/bsd/libkern/copyio.h:45", v44, v43, v42, v41); error = copyin(v44, v43, v42); if ( error ) { log( 3, "%s: necp_client_add_flow copyin default_add_request error (%d)\n", "necp_client_add_flow", (unsigned int)error); goto LABEL_64; } add_request = allocated_add_request; } else { v3 = uapa->buffer_size; v40 = uapa->buffer; v39 = &default_add_request; v38 = v3; v37 = 60LL; if ( v3 > 0x3C ) panic( "\"__copyin_chk object size check failed: uaddr %p, kaddr %p, (%zu < %zu)\"@/BuildRoot/Library/Caches/com.apple.x" "bs/Sources/xnu_debug/xnu-4903.231.4/bsd/libkern/copyio.h:45", v40, v39, v38, v37); error = copyin(v40, v39, v38); if ( error ) { log( 3, "%s: necp_client_add_flow copyin default_add_request error (%d)\n", "necp_client_add_flow", (unsigned int)error); goto LABEL_64; } add_request = (necp_client_add_flow *)&default_add_request; } lck_mtx_lock((lck_mtx_t *)&fd_dataa->fd_lock); pid = fd_dataa->proc_pid; proc = proc_find(pid); if ( proc ) { client = necp_client_fd_find_client_and_lock(fd_dataa, client_id); if ( client ) { *((_BYTE *)client + 100) &= 0xFBu; necp_client_retain_locked(client); necp_client_copy_parameters_locked(client, &parameters); new_registration = necp_client_create_flow_registration(fd_dataa, client); if ( new_registration ) { new_registration->flags = add_request->flags; uuid_copy(add_request->registration_id, new_registration->registration_id); if ( add_request->flags & 1 ) { assigned_results = 0LL; assigned_results_length = 0LL; interface_index = 0; found_nexus = 0; for ( option_i = 0; option_i < client->interface_option_count; ++option_i ) { if ( option_i >= 4 ) { option_0 = &client->extra_interface_options[option_i - 4]; if ( !uuid_compare(option_0->nexus_agent, add_request->agent_uuid) ) { interface_index = option_0->interface_index; found_nexus = 1; break; } } else { option = &client->interface_options[option_i]; if ( !uuid_compare(option->nexus_agent, add_request->agent_uuid) ) { interface_index = option->interface_index; found_nexus = 1; break; } } } if ( found_nexus ) { necp_client_add_nexus_flow_if_needed(new_registration, add_request->agent_uuid, interface_index); if ( new_registration->flags & 2 ) necp_client_uuid = client->client_id; else necp_client_uuid = new_registration->registration_id; request_error = netagent_client_message_with_params( add_request->agent_uuid, necp_client_uuid, pid, client->agent_handle, 0xAu, &parameters, &assigned_results, &assigned_results_length); if ( request_error ) { if ( assigned_results ) v5 = assfail( "assigned_results == NULL", "/BuildRoot/Library/Caches/com.apple.xbs/Sources/xnu_debug/xnu-4903.231.4/bsd/net/necp_client.c", 6107) != 0; if ( assigned_results_length ) v6 = assfail( "assigned_results_length == 0", "/BuildRoot/Library/Caches/com.apple.xbs/Sources/xnu_debug/xnu-4903.231.4/bsd/net/necp_client.c", 6108) != 0; log(3, "%s: netagent_client_message error (%d)\n", "necp_client_add_flow", (unsigned int)request_error); } else if ( assigned_results && assigned_results_length ) { if ( !necp_assign_client_result_locked( proc, fd_dataa, client, new_registration, add_request->agent_uuid, (u_int8_t *)assigned_results, assigned_results_length, 0) && assigned_results ) { FREE(assigned_results, 124); } } else if ( assigned_results ) { FREE(assigned_results, 124); } } else { log(3, "%s: %s\n", "necp_client_add_flow", "Requested nexus not found"); } } if ( (signed int)add_request->stats_request_count > 0 && !necp_arena_initialize(fd_dataa, 1) ) { stats_request = (necp_client_flow_stats *)&add_request[1]; secure_memset(&bufreq, 0, 0x18uLL); bufreq.necp_stats_bufreq_id = 191; *(_QWORD *)&bufreq.necp_stats_bufreq_type = *(_QWORD *)&stats_request->stats_type; bufreq.necp_stats_bufreq_size = stats_request->stats_size; bufreq._anon_0.necp_stats_bufreq_uaddr = stats_request->stats_addr; necp_stats_initialize(fd_dataa, client, new_registration, &bufreq); *(_QWORD *)&stats_request->stats_type = *(_QWORD *)&bufreq.necp_stats_bufreq_type; stats_request->stats_size = bufreq.necp_stats_bufreq_size; stats_request->stats_addr = bufreq._anon_0.necp_stats_bufreq_uaddr; } lck_mtx_unlock((lck_mtx_t *)&client->lock); lck_mtx_unlock((lck_mtx_t *)&fd_dataa->fd_lock); necp_client_release(client); v7 = uapa->buffer; v8 = uapa->buffer_size; v48 = add_request; v47 = v7; v46 = v8; v45 = -1LL; if ( v8 > 0xFFFFFFFFFFFFFFFFLL ) panic( "\"__copyout_chk object size check failed: uaddr %p, kaddr %p, (%zu < %zu)\"@/BuildRoot/Library/Caches/com.ap" "ple.xbs/Sources/xnu_debug/xnu-4903.231.4/bsd/libkern/copyio.h:54", v47, v48, v46, v45); copy_error = copyout(v48, v47, v46); if ( copy_error ) log(3, "%s: necp_client_add_flow copyout add_request error (%d)\n", "necp_client_add_flow", copy_error); } else { error = 12; lck_mtx_unlock((lck_mtx_t *)&client->lock); lck_mtx_unlock((lck_mtx_t *)&fd_dataa->fd_lock); log(3, "%s: %s\n", "necp_client_add_flow", "Failed to allocate flow registration"); } } else { error = 2; lck_mtx_unlock((lck_mtx_t *)&fd_dataa->fd_lock); } } else { lck_mtx_unlock((lck_mtx_t *)&fd_dataa->fd_lock); log( 3, "%s: necp_client_add_flow process not found for pid %d error (%d)\n", "necp_client_add_flow", (unsigned int)pid, (unsigned int)error); error = 3; } LABEL_64: *retvala = error; if ( error ) log(3, "%s: Add flow error (%d)\n", "necp_client_add_flow", (unsigned int)error); if ( allocated_add_request ) FREE(allocated_add_request, 118); if ( proc ) proc_rele(proc); result = error; if ( _stack_chk_guard == v52 ) result = error; return result; }  
    i've just added a cpu errata code to xnu (from freebsd)
    static void init_amd_erratas(i386_cpu_info_t *info_p) { uint64_t msr; /* * Work around Erratum 721 for Family 10h and 12h processors. * These processors may incorrectly update the stack pointer * after a long series of push and/or near-call instructions, * or a long series of pop and/or near-return instructions. * * http://support.amd.com/us/Processor_TechDocs/41322_10h_Rev_Gd.pdf * http://support.amd.com/us/Processor_TechDocs/44739_12h_Rev_Gd.pdf * * Hypervisors do not provide access to the errata MSR, * causing #GP exception on attempt to apply the errata. The * MSR write shall be done on host and persist globally * anyway, so do not try to do it when under virtualization. */ switch (info_p->cpuid_family) { case 0x10: case 0x12: if ((info_p->cpuid_features & 0x80000000) == 0) wrmsr64(0xc0011029, rdmsr64(0xc0011029) | 1); break; } /* * BIOS may fail to set InitApicIdCpuIdLo to 1 as it should per BKDG. * So, do it here or otherwise some tools could be confused by * Initial Local APIC ID reported with CPUID Function 1 in EBX. */ if (info_p->cpuid_family == 0x10) { if ((info_p->cpuid_features & 0x80000000) == 0) { msr = rdmsr64(0xc001001f); msr |= (uint64_t)1 << 54; wrmsr64(0xc001001f, msr); } } /* * BIOS may configure Family 10h processors to convert WC+ cache type * to CD. That can hurt performance of guest VMs using nested paging. * The relevant MSR bit is not documented in the BKDG, * the fix is borrowed from Linux. */ if (info_p->cpuid_family == 0x10) { if ((info_p->cpuid_features & 0x80000000) == 0) { msr = rdmsr64(0xc001102a); msr &= ~((uint64_t)1 << 24); wrmsr64(0xc001102a, msr); } } /* * Work around Erratum 793: Specific Combination of Writes to Write * Combined Memory Types and Locked Instructions May Cause Core Hang. * See Revision Guide for AMD Family 16h Models 00h-0Fh Processors, * revision 3.04 or later, publication 51810. */ if (info_p->cpuid_family== 0x16 && info_p->cpuid_model <= 0xf) { if ((info_p->cpuid_features & 0x80000000) == 0) { msr = rdmsr64(0xc0011020); msr |= (uint64_t)1 << 15; wrmsr64(0xc0011020, msr); } } /* Ryzen erratas. */ if (info_p->cpuid_family == 0x17 && info_p->cpuid_model == 0x1 && (info_p->cpuid_features & 0x80000000) == 0) { /* 1021 */ msr = rdmsr64(0xc0011029); msr |= 0x2000; wrmsr64(0xc0011029, msr); /* 1033 */ msr = rdmsr64(0xc0011020); msr |= 0x10; wrmsr64(0xc0011020, msr); /* 1049 */ msr = rdmsr64(0xc0011028); msr |= 0x10; wrmsr64(0xc0011028, msr); /* 1095 */ msr = rdmsr64(0xc0011020); msr |= 0x200000000000000; wrmsr64(0xc0011020, msr); } /* * Work around a problem on Ryzen that is triggered by executing * code near the top of user memory, in our case the signal * trampoline code in the shared page on amd64. * * This function is executed once for the BSP before tunables take * effect so the value determined here can be overridden by the * tunable. This function is then executed again for each AP and * also on resume. Set a flag the first time so that value set by * the tunable is not overwritten. * * The stepping and/or microcode versions should be checked after * this issue is fixed by AMD so that we don't use this mode if not * needed. */ /*if (lower_sharedpage_init == 0) { lower_sharedpage_init = 1; if (info_p->cpuid_family == 0x17) { hw_lower_amd64_sharedpage = 1; } } amd64_lower_shared_page(struct sysentvec *sv) if (hw_lower_amd64_sharedpage != 0) { sv->sv_maxuser -= PAGE_SIZE; sv->sv_shared_page_base -= PAGE_SIZE; sv->sv_usrstack -= PAGE_SIZE; sv->sv_psstrings -= PAGE_SIZE; }*/ } attached kernel for testing on 10.14.2
    source is based on https://github.com/Shaneee92/Mojave_AMD_XNU (with opemu) + 2 functions (check p1.diff)
     
    will also check https://github.com/torvalds/linux/blob/master/arch/x86/kernel/cpu/amd.c
     
    the mach_msg_destroy_from_kernel_proper() will be available as soon as 10.14.2 sources are out. 
    the necp_client_add_flow() doesnt exist in 10.14.1 sources - maybe remove it and test ?
     
    update:
    - fixed cpu errata call spot
     
     
     
     
    kernel
    p2.diff
  6. Like
    jalavoui got a reaction from AkimoA in AMD Mojave Kernel Development and Testing   
    testing both kernels, all good so far.
    Is there a way to ignore kext errors and generate a valid prelinkedkernel ?
     
    got missing symbols in AppleMobileFileIntegrity.kext
    so i hacked 10.14.1 shanee source and rebuild for 10.14.2
    this version rebuilds the prelinked kernel without errors
     
    i've made a prelinkedkernel using the basesystem kexts (from the installer media)
    might help if u cant use the os x installer (just replace the prelinkedkernel in your usb install media) 
     
    System.zip
    prelinkedkernel.zip
  7. Like
    jalavoui got a reaction from Slice in ATI Oland family cards   
    This are the kexts i'm using on 10.14.2
     
    the 7000 controller is limited to 1 framebuffer only (CFG_FB_LIMIT=1) 
    this are original kexts with some plist patches
    metal graphics working on this "great" card.
    atm I'm booting in legacy mode. need to fix acpi timeouts in kernel to boot in uefi mode.
    update:
    managed to boot in uefi mode (applesmc in S/L/E fixed the timeouts issue)
     
    enjoy
    1042.zip
  8. Like
    jalavoui got a reaction from carlo_67 in AMD Mojave Kernel Development and Testing   
    void mach_msg_destroy_from_kernel_proper(     mach_msg_header_t    *msg) {   char v1;   mach_msg_type_number_t j;   ipc_object_t objects;    mach_msg_bits_t i;    mach_msg_descriptor_t *daddr;    mach_port_t object;    struct ipc_object *objecta;    signed int mbits;    mbits = msg->msgh_bits;   object = msg->msgh_remote_port;   if ( object && object != (mach_port_t)-1LL )     ipc_object_destroy(&object->ip_object, msg->msgh_bits & 0x1F);   v1 = 0;   if ( msg->msgh_voucher_port )     v1 = (int)msg->msgh_voucher_port != -1;   if ( !(~v1 & 1) )     return;   if ( mbits < 0 )   {     daddr = (mach_msg_descriptor_t *)&msg[1].msgh_size;     i = 0;     while ( i < msg[1].msgh_bits )     {       switch ( *((unsigned int*)&daddr->type + 2) >> 24 )       {         case 0:           if ( daddr->port.name )           {             if ( daddr->port.name != (mach_port_t)-1LL )               ipc_object_destroy(&daddr->port.name->ip_object, (*((unsigned int*)&daddr->type + 2) >> 16) & 0xFF);           }           break;         case 1:         case 3:           if ( *((unsigned int*)&daddr->type + 3) )           {             vm_map_copy_discard((vm_map_copy_t)daddr->port.name);           }           else if ( daddr->port.name )           {             break;           }           break;         case 2:           objects = &daddr->port.name->ip_object;           if ( *((unsigned int*)&daddr->type + 3) )           {             if ( !objects )               break;             for ( j = 0; j < *((unsigned int*)&daddr->type + 3); ++j )             {               objecta = (struct ipc_object*)*((unsigned int*)&objects->io_bits + j);               if ( objecta && objecta != (struct ipc_object*)-1LL )                 ipc_object_destroy(objecta, (*((unsigned int*)&daddr->type + 2) >> 16) & 0xFF);             }             kfree(daddr->port.name, 8LL * *((unsigned int *)&daddr->type + 3));           }           break;         default:           break;       }       ++i;       ++daddr;     }   } }  
    i've added this code to shanee kernel for testing on 10.14.2 (ipc_mig.c - missing symbols in AppleMobileFileIntegrity prevent prelinkedkernel build)
    to test move it to S/L/Kernels and do in terminal kextcache -invalidate / to rebuild the prelinkedkernel
    only do it if u have a stable system.
     
    also sharing my clover files for those who still get installer/boot issues (be sure to use latest clover)
     
    i'm forced to boot in legacy mode (non uefi) due to appleacpi timeouts
    need to figure out why this is happening. Anyway u guys can try a non uefi boot to check if those boot errors go away (enter bios menu and check uefi/legacy mode).
    atm i only use 1 kext to boot (AppleSMC)
     
    xlnc - the patch is a simple jump on AppleSSE::start() 
    u'll need to check the code for 10.14.1
    check this in code and play with it
    LABEL_11:
      *((_BYTE *)v2 + 4324) = 1;
    LABEL_12:
      if ( *((_BYTE *)v2 + 8476) )
     
    kernel
     
    clover.zip
  9. Like
    jalavoui got a reaction from carlo_67 in AMD Mojave Kernel Development and Testing   
    void mach_msg_destroy_from_kernel_proper(     mach_msg_header_t    *msg) {   char v1;   mach_msg_type_number_t j;   ipc_object_t objects;    mach_msg_bits_t i;    mach_msg_descriptor_t *daddr;    mach_port_t object;    struct ipc_object *objecta;    signed int mbits;    mbits = msg->msgh_bits;   object = msg->msgh_remote_port;   if ( object && object != (mach_port_t)-1LL )     ipc_object_destroy(&object->ip_object, msg->msgh_bits & 0x1F);   v1 = 0;   if ( msg->msgh_voucher_port )     v1 = (int)msg->msgh_voucher_port != -1;   if ( !(~v1 & 1) )     return;   if ( mbits < 0 )   {     daddr = (mach_msg_descriptor_t *)&msg[1].msgh_size;     i = 0;     while ( i < msg[1].msgh_bits )     {       switch ( *((unsigned int*)&daddr->type + 2) >> 24 )       {         case 0:           if ( daddr->port.name )           {             if ( daddr->port.name != (mach_port_t)-1LL )               ipc_object_destroy(&daddr->port.name->ip_object, (*((unsigned int*)&daddr->type + 2) >> 16) & 0xFF);           }           break;         case 1:         case 3:           if ( *((unsigned int*)&daddr->type + 3) )           {             vm_map_copy_discard((vm_map_copy_t)daddr->port.name);           }           else if ( daddr->port.name )           {             break;           }           break;         case 2:           objects = &daddr->port.name->ip_object;           if ( *((unsigned int*)&daddr->type + 3) )           {             if ( !objects )               break;             for ( j = 0; j < *((unsigned int*)&daddr->type + 3); ++j )             {               objecta = (struct ipc_object*)*((unsigned int*)&objects->io_bits + j);               if ( objecta && objecta != (struct ipc_object*)-1LL )                 ipc_object_destroy(objecta, (*((unsigned int*)&daddr->type + 2) >> 16) & 0xFF);             }             kfree(daddr->port.name, 8LL * *((unsigned int *)&daddr->type + 3));           }           break;         default:           break;       }       ++i;       ++daddr;     }   } }  
    i've added this code to shanee kernel for testing on 10.14.2 (ipc_mig.c - missing symbols in AppleMobileFileIntegrity prevent prelinkedkernel build)
    to test move it to S/L/Kernels and do in terminal kextcache -invalidate / to rebuild the prelinkedkernel
    only do it if u have a stable system.
     
    also sharing my clover files for those who still get installer/boot issues (be sure to use latest clover)
     
    i'm forced to boot in legacy mode (non uefi) due to appleacpi timeouts
    need to figure out why this is happening. Anyway u guys can try a non uefi boot to check if those boot errors go away (enter bios menu and check uefi/legacy mode).
    atm i only use 1 kext to boot (AppleSMC)
     
    xlnc - the patch is a simple jump on AppleSSE::start() 
    u'll need to check the code for 10.14.1
    check this in code and play with it
    LABEL_11:
      *((_BYTE *)v2 + 4324) = 1;
    LABEL_12:
      if ( *((_BYTE *)v2 + 8476) )
     
    kernel
     
    clover.zip
  10. Like
    jalavoui got a reaction from carlo_67 in AMD Mojave Kernel Development and Testing   
    void mach_msg_destroy_from_kernel_proper(     mach_msg_header_t    *msg) {   char v1;   mach_msg_type_number_t j;   ipc_object_t objects;    mach_msg_bits_t i;    mach_msg_descriptor_t *daddr;    mach_port_t object;    struct ipc_object *objecta;    signed int mbits;    mbits = msg->msgh_bits;   object = msg->msgh_remote_port;   if ( object && object != (mach_port_t)-1LL )     ipc_object_destroy(&object->ip_object, msg->msgh_bits & 0x1F);   v1 = 0;   if ( msg->msgh_voucher_port )     v1 = (int)msg->msgh_voucher_port != -1;   if ( !(~v1 & 1) )     return;   if ( mbits < 0 )   {     daddr = (mach_msg_descriptor_t *)&msg[1].msgh_size;     i = 0;     while ( i < msg[1].msgh_bits )     {       switch ( *((unsigned int*)&daddr->type + 2) >> 24 )       {         case 0:           if ( daddr->port.name )           {             if ( daddr->port.name != (mach_port_t)-1LL )               ipc_object_destroy(&daddr->port.name->ip_object, (*((unsigned int*)&daddr->type + 2) >> 16) & 0xFF);           }           break;         case 1:         case 3:           if ( *((unsigned int*)&daddr->type + 3) )           {             vm_map_copy_discard((vm_map_copy_t)daddr->port.name);           }           else if ( daddr->port.name )           {             break;           }           break;         case 2:           objects = &daddr->port.name->ip_object;           if ( *((unsigned int*)&daddr->type + 3) )           {             if ( !objects )               break;             for ( j = 0; j < *((unsigned int*)&daddr->type + 3); ++j )             {               objecta = (struct ipc_object*)*((unsigned int*)&objects->io_bits + j);               if ( objecta && objecta != (struct ipc_object*)-1LL )                 ipc_object_destroy(objecta, (*((unsigned int*)&daddr->type + 2) >> 16) & 0xFF);             }             kfree(daddr->port.name, 8LL * *((unsigned int *)&daddr->type + 3));           }           break;         default:           break;       }       ++i;       ++daddr;     }   } }  
    i've added this code to shanee kernel for testing on 10.14.2 (ipc_mig.c - missing symbols in AppleMobileFileIntegrity prevent prelinkedkernel build)
    to test move it to S/L/Kernels and do in terminal kextcache -invalidate / to rebuild the prelinkedkernel
    only do it if u have a stable system.
     
    also sharing my clover files for those who still get installer/boot issues (be sure to use latest clover)
     
    i'm forced to boot in legacy mode (non uefi) due to appleacpi timeouts
    need to figure out why this is happening. Anyway u guys can try a non uefi boot to check if those boot errors go away (enter bios menu and check uefi/legacy mode).
    atm i only use 1 kext to boot (AppleSMC)
     
    xlnc - the patch is a simple jump on AppleSSE::start() 
    u'll need to check the code for 10.14.1
    check this in code and play with it
    LABEL_11:
      *((_BYTE *)v2 + 4324) = 1;
    LABEL_12:
      if ( *((_BYTE *)v2 + 8476) )
     
    kernel
     
    clover.zip
  11. Like
    jalavoui got a reaction from carlo_67 in AMD Mojave Kernel Development and Testing   
    on 10.14.2 the AppleSSE.kext checks for coprocessor on the efi string and hangs with assertion at boot.
    i've made 2 patches ( A & B ) due to dual checks in code
    check both - i got better performance using B patch.
     
    ssepatch.zip
  12. Like
    jalavoui got a reaction from carlo_67 in AMD Mojave Kernel Development and Testing   
    void mach_msg_destroy_from_kernel_proper(     mach_msg_header_t    *msg) {   char v1;   mach_msg_type_number_t j;   ipc_object_t objects;    mach_msg_bits_t i;    mach_msg_descriptor_t *daddr;    mach_port_t object;    struct ipc_object *objecta;    signed int mbits;    mbits = msg->msgh_bits;   object = msg->msgh_remote_port;   if ( object && object != (mach_port_t)-1LL )     ipc_object_destroy(&object->ip_object, msg->msgh_bits & 0x1F);   v1 = 0;   if ( msg->msgh_voucher_port )     v1 = (int)msg->msgh_voucher_port != -1;   if ( !(~v1 & 1) )     return;   if ( mbits < 0 )   {     daddr = (mach_msg_descriptor_t *)&msg[1].msgh_size;     i = 0;     while ( i < msg[1].msgh_bits )     {       switch ( *((unsigned int*)&daddr->type + 2) >> 24 )       {         case 0:           if ( daddr->port.name )           {             if ( daddr->port.name != (mach_port_t)-1LL )               ipc_object_destroy(&daddr->port.name->ip_object, (*((unsigned int*)&daddr->type + 2) >> 16) & 0xFF);           }           break;         case 1:         case 3:           if ( *((unsigned int*)&daddr->type + 3) )           {             vm_map_copy_discard((vm_map_copy_t)daddr->port.name);           }           else if ( daddr->port.name )           {             break;           }           break;         case 2:           objects = &daddr->port.name->ip_object;           if ( *((unsigned int*)&daddr->type + 3) )           {             if ( !objects )               break;             for ( j = 0; j < *((unsigned int*)&daddr->type + 3); ++j )             {               objecta = (struct ipc_object*)*((unsigned int*)&objects->io_bits + j);               if ( objecta && objecta != (struct ipc_object*)-1LL )                 ipc_object_destroy(objecta, (*((unsigned int*)&daddr->type + 2) >> 16) & 0xFF);             }             kfree(daddr->port.name, 8LL * *((unsigned int *)&daddr->type + 3));           }           break;         default:           break;       }       ++i;       ++daddr;     }   } }  
    i've added this code to shanee kernel for testing on 10.14.2 (ipc_mig.c - missing symbols in AppleMobileFileIntegrity prevent prelinkedkernel build)
    to test move it to S/L/Kernels and do in terminal kextcache -invalidate / to rebuild the prelinkedkernel
    only do it if u have a stable system.
     
    also sharing my clover files for those who still get installer/boot issues (be sure to use latest clover)
     
    i'm forced to boot in legacy mode (non uefi) due to appleacpi timeouts
    need to figure out why this is happening. Anyway u guys can try a non uefi boot to check if those boot errors go away (enter bios menu and check uefi/legacy mode).
    atm i only use 1 kext to boot (AppleSMC)
     
    xlnc - the patch is a simple jump on AppleSSE::start() 
    u'll need to check the code for 10.14.1
    check this in code and play with it
    LABEL_11:
      *((_BYTE *)v2 + 4324) = 1;
    LABEL_12:
      if ( *((_BYTE *)v2 + 8476) )
     
    kernel
     
    clover.zip
  13. Like
    jalavoui got a reaction from carlo_67 in AMD Mojave Kernel Development and Testing   
    on 10.14.2 the AppleSSE.kext checks for coprocessor on the efi string and hangs with assertion at boot.
    i've made 2 patches ( A & B ) due to dual checks in code
    check both - i got better performance using B patch.
     
    ssepatch.zip
  14. Like
    jalavoui got a reaction from AkimoA in AMD Mojave Kernel Development and Testing   
    testing both kernels, all good so far.
    Is there a way to ignore kext errors and generate a valid prelinkedkernel ?
     
    got missing symbols in AppleMobileFileIntegrity.kext
    so i hacked 10.14.1 shanee source and rebuild for 10.14.2
    this version rebuilds the prelinked kernel without errors
     
    i've made a prelinkedkernel using the basesystem kexts (from the installer media)
    might help if u cant use the os x installer (just replace the prelinkedkernel in your usb install media) 
     
    System.zip
    prelinkedkernel.zip
  15. Like
    jalavoui got a reaction from carlo_67 in AMD Mojave Kernel Development and Testing   
    on 10.14.2 the AppleSSE.kext checks for coprocessor on the efi string and hangs with assertion at boot.
    i've made 2 patches ( A & B ) due to dual checks in code
    check both - i got better performance using B patch.
     
    ssepatch.zip
  16. Like
    jalavoui got a reaction from AkimoA in AMD Mojave Kernel Development and Testing   
    testing both kernels, all good so far.
    Is there a way to ignore kext errors and generate a valid prelinkedkernel ?
     
    got missing symbols in AppleMobileFileIntegrity.kext
    so i hacked 10.14.1 shanee source and rebuild for 10.14.2
    this version rebuilds the prelinked kernel without errors
     
    i've made a prelinkedkernel using the basesystem kexts (from the installer media)
    might help if u cant use the os x installer (just replace the prelinkedkernel in your usb install media) 
     
    System.zip
    prelinkedkernel.zip
  17. Like
    jalavoui got a reaction from nms in Atheros wireless driver OS X 10.11/12 for unsupported cards   
    The ATH9KFixup was updated to work with Mojave (check github).
     
    Some people working on it so maybe ask them to post the base kexts they are using to apply the patch + working dependencies.
     
    The code found in kern_ath9xxx.h might be updated on linux sources (rx/tx issues, etc).
     
    Glad to see this old driver still alive
  18. Like
    jalavoui got a reaction from kyndder in Atheros wireless driver OS X 10.11/12 for unsupported cards   
    The AirPortAtheros40.kext as similiar  code found on linux freebsd. This first patch was tested on OS X 10.11.0
     
     
    Working card: Qualcomm Atheros AR9565 pci168c,36 with bluetooth
     
     

     
     
    Download v01 for 0036 card + BTFirmwareUploader in attachments. Post your questions here
    You can find updates on EMlyDinEsH BTFirmwareUploader here http://forum.osxlatitude.com/index.php?/topic/2925-bluetooth-firmware-uploader/
     
    v01 also works on 10.11.4
     
    TOFIX: Bands/Channels limitation exist in macosx/windows driver but not in linux
     
    UPDATE:  v03 fixed eprom local check.
     
    This kext check the following mac models. This might disable/enable some features. plz check your smbios mac model. I'm not using any of this models in my smbios
    v21 = 31; if ( PEGetModelName(&v40, 32LL) ) { v22 = !strcmp(&v40, "iMac10,1") || !strcmp(&v40, "iMac11,1") || !strcmp(&v40, "iMac11,2") || !strcmp(&v40, "MacBookPro5,2"); if ( !strcmp(&v40, "iMac12,1") || !strcmp(&v40, "iMac12,2") ) v21 = 29; } else { v22 = 0; } DEV NOTES:
     
    The driver attach procedure loads one of 2 main subs:
    ar5416Attach(); ar9300Attach(); On the 9300 tree we have native support for #define AR_SREV_VERSION_OSPREY 0x1C0 #define AR_SREV_VERSION_AR9580 0x1C0 #define AR_SREV_VERSION_HORNET 0x200 The 0036 card is set here #define AR_SREV_VERSION_APHRODITE 0x2C0 For other cards check here
    ath_hal_mac_name(struct ath_hal *ah) 90 { 91 switch (ah->ah_macVersion) { 92 case AR_SREV_VERSION_CRETE: 93 case AR_SREV_VERSION_MAUI_1: 94 return "AR5210"; 95 case AR_SREV_VERSION_MAUI_2: 96 case AR_SREV_VERSION_OAHU: 97 return "AR5211"; 98 case AR_SREV_VERSION_VENICE: 99 return "AR5212"; 100 case AR_SREV_VERSION_GRIFFIN: 101 return "AR2413"; 102 case AR_SREV_VERSION_CONDOR: 103 return "AR5424"; 104 case AR_SREV_VERSION_EAGLE: 105 return "AR5413"; 106 case AR_SREV_VERSION_COBRA: 107 return "AR2415"; 108 case AR_SREV_2425: /* Swan */ 109 return "AR2425"; 110 case AR_SREV_2417: /* Nala */ 111 return "AR2417"; 112 case AR_XSREV_VERSION_OWL_PCI: 113 return "AR5416"; 114 case AR_XSREV_VERSION_OWL_PCIE: 115 return "AR5418"; 116 case AR_XSREV_VERSION_HOWL: 117 return "AR9130"; 118 case AR_XSREV_VERSION_SOWL: 119 return "AR9160"; 120 case AR_XSREV_VERSION_MERLIN: 121 if (AH_PRIVATE(ah)->ah_ispcie) 122 return "AR9280"; 123 return "AR9220"; 124 case AR_XSREV_VERSION_KITE: 125 return "AR9285"; 126 case AR_XSREV_VERSION_KIWI: 127 if (AH_PRIVATE(ah)->ah_ispcie) 128 return "AR9287"; 129 return "AR9227"; 130 case AR_SREV_VERSION_AR9380: 131 if (ah->ah_macRev >= AR_SREV_REVISION_AR9580_10) 132 return "AR9580"; 133 return "AR9380"; 134 case AR_SREV_VERSION_AR9460: 135 return "AR9460"; 136 case AR_SREV_VERSION_AR9330: 137 return "AR9330"; 138 case AR_SREV_VERSION_AR9340: 139 return "AR9340"; 140 case AR_SREV_VERSION_QCA9550: 141 return "QCA9550"; 142 case AR_SREV_VERSION_AR9485: 143 return "AR9485"; 144 case AR_SREV_VERSION_QCA9565: 145 return "QCA9565"; 146 case AR_SREV_VERSION_QCA9530: 147 return "QCA9530"; 148 } 149 return "????"; 150 } A reference to freebsd source code (usefull to in code research for other cards): http://code.metager.de/source/xref/freebsd/sys/contrib/dev/ath/ath_hal/ar9300/
    And ofc the linux id search engine: http://lxr.free-electrons.com/ident
    apple code is very old but still some patches can be done
     
     
    Todo: Test domains references:
    static REG_DMN_PAIR_MAPPING regDomainPairs[] = { 32 {NO_ENUMRD, DEBUG_REG_DMN, DEBUG_REG_DMN, NO_REQ, NO_REQ, PSCAN_DEFER, CTRY_DEFAULT }, 33 {NULL1_WORLD, NULL1, WORLD, NO_REQ, NO_REQ, PSCAN_DEFER, CTRY_DEFAULT }, 34 {NULL1_ETSIB, NULL1, ETSIB, NO_REQ, NO_REQ, PSCAN_DEFER, CTRY_DEFAULT }, 35 {NULL1_ETSIC, NULL1, ETSIC, NO_REQ, NO_REQ, PSCAN_DEFER, CTRY_DEFAULT }, 36 37 {FCC2_FCCA, FCC2, FCCA, NO_REQ, NO_REQ, PSCAN_DEFER, CTRY_DEFAULT }, 38 {FCC2_WORLD, FCC2, WORLD, NO_REQ, NO_REQ, PSCAN_DEFER, CTRY_DEFAULT }, 39 {FCC2_ETSIC, FCC2, ETSIC, NO_REQ, NO_REQ, PSCAN_DEFER, CTRY_DEFAULT }, 40 {FCC3_FCCA, FCC3, FCCA, NO_REQ, NO_REQ, PSCAN_DEFER, CTRY_DEFAULT }, 41 {FCC3_WORLD, FCC3, WORLD, NO_REQ, NO_REQ, PSCAN_DEFER, CTRY_DEFAULT }, 42 {FCC4_FCCA, FCC4, FCCA, DISALLOW_ADHOC_11A | DISALLOW_ADHOC_11A_TURB, NO_REQ, PSCAN_DEFER, CTRY_DEFAULT }, 43 {FCC5_FCCB, FCC5, FCCB, NO_REQ, NO_REQ, PSCAN_DEFER, CTRY_DEFAULT }, 44 45 {ETSI1_WORLD, ETSI1, WORLD, DISALLOW_ADHOC_11A | DISALLOW_ADHOC_11A_TURB, NO_REQ, PSCAN_DEFER, CTRY_DEFAULT }, 46 {ETSI2_WORLD, ETSI2, WORLD, DISALLOW_ADHOC_11A | DISALLOW_ADHOC_11A_TURB, NO_REQ, PSCAN_DEFER, CTRY_DEFAULT }, 47 {ETSI3_WORLD, ETSI3, WORLD, DISALLOW_ADHOC_11A | DISALLOW_ADHOC_11A_TURB, NO_REQ, PSCAN_DEFER, CTRY_DEFAULT }, 48 {ETSI4_WORLD, ETSI4, WORLD, DISALLOW_ADHOC_11A | DISALLOW_ADHOC_11A_TURB, NO_REQ, PSCAN_DEFER, CTRY_DEFAULT }, 49 {ETSI5_WORLD, ETSI5, WORLD, DISALLOW_ADHOC_11A | DISALLOW_ADHOC_11A_TURB, NO_REQ, PSCAN_DEFER, CTRY_DEFAULT }, 50 {ETSI6_WORLD, ETSI6, WORLD, DISALLOW_ADHOC_11A | DISALLOW_ADHOC_11A_TURB, NO_REQ, PSCAN_DEFER, CTRY_DEFAULT }, 51 52 {ETSI3_ETSIA, ETSI3, WORLD, DISALLOW_ADHOC_11A | DISALLOW_ADHOC_11A_TURB, NO_REQ, PSCAN_DEFER, CTRY_DEFAULT }, 53 {FRANCE_RES, ETSI3, WORLD, NO_REQ, NO_REQ, PSCAN_DEFER, CTRY_DEFAULT }, 54 55 {FCC1_WORLD, FCC1, WORLD, NO_REQ, NO_REQ, PSCAN_DEFER, CTRY_DEFAULT }, 56 {FCC1_FCCA, FCC1, FCCA, NO_REQ, NO_REQ, PSCAN_DEFER, CTRY_DEFAULT }, 57 {APL1_WORLD, APL1, WORLD, NO_REQ, NO_REQ, PSCAN_DEFER, CTRY_DEFAULT }, 58 {APL2_WORLD, APL2, WORLD, NO_REQ, NO_REQ, PSCAN_DEFER, CTRY_DEFAULT }, 59 {APL3_WORLD, APL3, WORLD, NO_REQ, NO_REQ, PSCAN_DEFER, CTRY_DEFAULT }, 60 {APL4_WORLD, APL4, WORLD, NO_REQ, NO_REQ, PSCAN_DEFER, CTRY_DEFAULT }, 61 {APL5_WORLD, APL5, WORLD, NO_REQ, NO_REQ, PSCAN_DEFER, CTRY_DEFAULT }, 62 {APL6_WORLD, APL6, WORLD, NO_REQ, NO_REQ, PSCAN_DEFER, CTRY_DEFAULT }, 63 {APL8_WORLD, APL8, WORLD, NO_REQ, NO_REQ, PSCAN_DEFER, CTRY_DEFAULT }, 64 {APL9_WORLD, APL9, WORLD, NO_REQ, NO_REQ, PSCAN_DEFER, CTRY_DEFAULT }, 65 66 {APL3_FCCA, APL3, FCCA, NO_REQ, NO_REQ, PSCAN_DEFER, CTRY_DEFAULT }, 67 {APL1_ETSIC, APL1, ETSIC, NO_REQ, NO_REQ, PSCAN_DEFER, CTRY_DEFAULT }, 68 {APL2_ETSIC, APL2, ETSIC, NO_REQ, NO_REQ, PSCAN_DEFER, CTRY_DEFAULT }, 69 {APL2_APLD, APL2, APLD, NO_REQ, NO_REQ, PSCAN_DEFER, CTRY_DEFAULT }, 70 71 {MKK1_MKKA, MKK1, MKKA, DISALLOW_ADHOC_11A_TURB | NEED_NFC | LIMIT_FRAME_4MS, NEED_NFC, PSCAN_MKK1 | PSCAN_MKKA, CTRY_JAPAN }, 72 {MKK1_MKKB, MKK1, MKKA, DISALLOW_ADHOC_11A | DISALLOW_ADHOC_11A_TURB | NEED_NFC| LIMIT_FRAME_4MS, NEED_NFC, PSCAN_MKK1 | PSCAN_MKKA | PSCAN_MKKA_G, CTRY_JAPAN1 }, 73 {MKK1_FCCA, MKK1, FCCA, DISALLOW_ADHOC_11A_TURB | NEED_NFC| LIMIT_FRAME_4MS, NEED_NFC, PSCAN_MKK1, CTRY_JAPAN2 }, 74 {MKK1_MKKA1, MKK1, MKKA, DISALLOW_ADHOC_11A_TURB | NEED_NFC| LIMIT_FRAME_4MS, NEED_NFC, PSCAN_MKK1 | PSCAN_MKKA1 | PSCAN_MKKA1_G, CTRY_JAPAN4 }, 75 {MKK1_MKKA2, MKK1, MKKA, DISALLOW_ADHOC_11A_TURB | NEED_NFC| LIMIT_FRAME_4MS, NEED_NFC, PSCAN_MKK1 | PSCAN_MKKA2 | PSCAN_MKKA2_G, CTRY_JAPAN5 }, 76 {MKK1_MKKC, MKK1, MKKC, DISALLOW_ADHOC_11A_TURB | NEED_NFC| LIMIT_FRAME_4MS, NEED_NFC, PSCAN_MKK1, CTRY_JAPAN6 }, 77 78 /* MKK2 */ 79 {MKK2_MKKA, MKK2, MKKA, DISALLOW_ADHOC_11A | DISALLOW_ADHOC_11A_TURB | NEED_NFC| LIMIT_FRAME_4MS, NEED_NFC, PSCAN_MKK2 | PSCAN_MKKA | PSCAN_MKKA_G, CTRY_JAPAN3 }, 80 81 /* MKK3 */ 82 {MKK3_MKKA, MKK3, MKKA, DISALLOW_ADHOC_11A_TURB | NEED_NFC | LIMIT_FRAME_4MS, NEED_NFC , PSCAN_MKKA, CTRY_DEFAULT }, 83 {MKK3_MKKB, MKK3, MKKA, DISALLOW_ADHOC_11A | DISALLOW_ADHOC_11A_TURB | NEED_NFC | LIMIT_FRAME_4MS, NEED_NFC, PSCAN_MKKA | PSCAN_MKKA_G, CTRY_JAPAN7 }, 84 {MKK3_MKKA1, MKK3, MKKA, DISALLOW_ADHOC_11A_TURB | NEED_NFC | LIMIT_FRAME_4MS, NEED_NFC, PSCAN_MKKA1 | PSCAN_MKKA1_G, CTRY_DEFAULT }, 85 {MKK3_MKKA2,MKK3, MKKA, DISALLOW_ADHOC_11A_TURB | NEED_NFC | LIMIT_FRAME_4MS, NEED_NFC, PSCAN_MKKA2 | PSCAN_MKKA2_G, CTRY_JAPAN8 }, 86 {MKK3_MKKC, MKK3, MKKC, DISALLOW_ADHOC_11A_TURB | NEED_NFC | LIMIT_FRAME_4MS, NEED_NFC, NO_PSCAN, CTRY_JAPAN9 }, 87 {MKK3_FCCA, MKK3, FCCA, DISALLOW_ADHOC_11A_TURB | NEED_NFC | LIMIT_FRAME_4MS, NEED_NFC, NO_PSCAN, CTRY_DEFAULT }, 88 89 /* MKK4 */ 90 {MKK4_MKKB, MKK4, MKKA, DISALLOW_ADHOC_11A | DISALLOW_ADHOC_11A_TURB | NEED_NFC | LIMIT_FRAME_4MS, NEED_NFC, PSCAN_MKK3 | PSCAN_MKKA | PSCAN_MKKA_G, CTRY_JAPAN10 }, 91 {MKK4_MKKA1, MKK4, MKKA, DISALLOW_ADHOC_11A_TURB | NEED_NFC | LIMIT_FRAME_4MS, NEED_NFC, PSCAN_MKK3 | PSCAN_MKKA1 | PSCAN_MKKA1_G, CTRY_DEFAULT }, 92 {MKK4_MKKA2, MKK4, MKKA, DISALLOW_ADHOC_11A_TURB | NEED_NFC | LIMIT_FRAME_4MS, NEED_NFC, PSCAN_MKK3 |PSCAN_MKKA2 | PSCAN_MKKA2_G, CTRY_JAPAN11 }, 93 {MKK4_MKKC, MKK4, MKKC, DISALLOW_ADHOC_11A_TURB | NEED_NFC | LIMIT_FRAME_4MS, NEED_NFC, PSCAN_MKK3, CTRY_JAPAN12 }, 94 {MKK4_FCCA, MKK4, FCCA, DISALLOW_ADHOC_11A_TURB | NEED_NFC | LIMIT_FRAME_4MS, NEED_NFC, PSCAN_MKK3, CTRY_DEFAULT }, 95 96 /* MKK5 */ 97 {MKK5_MKKB, MKK5, MKKA, DISALLOW_ADHOC_11A | DISALLOW_ADHOC_11A_TURB | NEED_NFC | LIMIT_FRAME_4MS, NEED_NFC, PSCAN_MKK3 | PSCAN_MKKA | PSCAN_MKKA_G, CTRY_JAPAN13 }, 98 {MKK5_MKKA2,MKK5, MKKA, DISALLOW_ADHOC_11A_TURB | NEED_NFC | LIMIT_FRAME_4MS, NEED_NFC, PSCAN_MKK3 | PSCAN_MKKA2 | PSCAN_MKKA2_G, CTRY_JAPAN14 }, 99 {MKK5_MKKC, MKK5, MKKC, DISALLOW_ADHOC_11A_TURB | NEED_NFC | LIMIT_FRAME_4MS, NEED_NFC, PSCAN_MKK3, CTRY_JAPAN15 }, 100 101 /* MKK6 */ 102 {MKK6_MKKB, MKK6, MKKA, DISALLOW_ADHOC_11A | DISALLOW_ADHOC_11A_TURB | NEED_NFC | LIMIT_FRAME_4MS, NEED_NFC, PSCAN_MKK1 | PSCAN_MKKA | PSCAN_MKKA_G, CTRY_JAPAN16 }, 103 {MKK6_MKKA2, MKK6, MKKA, DISALLOW_ADHOC_11A_TURB | NEED_NFC | LIMIT_FRAME_4MS, NEED_NFC, PSCAN_MKK1 | PSCAN_MKKA2 | PSCAN_MKKA2_G, CTRY_JAPAN17 }, 104 {MKK6_MKKC, MKK6, MKKC, DISALLOW_ADHOC_11A_TURB | NEED_NFC | LIMIT_FRAME_4MS, NEED_NFC, PSCAN_MKK1, CTRY_JAPAN18 }, 105 106 /* MKK7 */ 107 {MKK7_MKKB, MKK7, MKKA, DISALLOW_ADHOC_11A | DISALLOW_ADHOC_11A_TURB | NEED_NFC | LIMIT_FRAME_4MS, NEED_NFC, PSCAN_MKK1 | PSCAN_MKK3 | PSCAN_MKKA | PSCAN_MKKA_G, CTRY_JAPAN19 }, 108 {MKK7_MKKA2, MKK7, MKKA, DISALLOW_ADHOC_11A_TURB | NEED_NFC | LIMIT_FRAME_4MS, NEED_NFC, PSCAN_MKK1 | PSCAN_MKK3 | PSCAN_MKKA2 | PSCAN_MKKA2_G, CTRY_JAPAN20 }, 109 {MKK7_MKKC, MKK7, MKKC, DISALLOW_ADHOC_11A_TURB | NEED_NFC | LIMIT_FRAME_4MS, NEED_NFC, PSCAN_MKK1 | PSCAN_MKK3, CTRY_JAPAN21 }, 110 111 /* MKK8 */ 112 {MKK8_MKKB, MKK8, MKKA, DISALLOW_ADHOC_11A | DISALLOW_ADHOC_11A_TURB | NEED_NFC | LIMIT_FRAME_4MS, NEED_NFC, PSCAN_MKK1 | PSCAN_MKK3 | PSCAN_MKKA | PSCAN_MKKA_G, CTRY_JAPAN22 }, 113 {MKK8_MKKA2,MKK8, MKKA, DISALLOW_ADHOC_11A_TURB | NEED_NFC | LIMIT_FRAME_4MS, NEED_NFC, PSCAN_MKK1 | PSCAN_MKK3 | PSCAN_MKKA2 | PSCAN_MKKA2_G, CTRY_JAPAN23 }, 114 {MKK8_MKKC, MKK8, MKKC, DISALLOW_ADHOC_11A_TURB | NEED_NFC | LIMIT_FRAME_4MS, NEED_NFC, PSCAN_MKK1 | PSCAN_MKK3 , CTRY_JAPAN24 }, 115 116 {MKK9_MKKA, MKK9, MKKA, DISALLOW_ADHOC_11A | DISALLOW_ADHOC_11A_TURB | NEED_NFC | LIMIT_FRAME_4MS, NEED_NFC, PSCAN_MKK3 | PSCAN_MKKA | PSCAN_MKKA_G, CTRY_DEFAULT }, 117 {MKK10_MKKA, MKK10, MKKA, DISALLOW_ADHOC_11A | DISALLOW_ADHOC_11A_TURB | NEED_NFC | LIMIT_FRAME_4MS, NEED_NFC, PSCAN_MKK3 | PSCAN_MKKA | PSCAN_MKKA_G, CTRY_DEFAULT }, 118 119 /* These are super domains */ 120 {WOR0_WORLD, WOR0_WORLD, WOR0_WORLD, NO_REQ, NO_REQ, PSCAN_DEFER, CTRY_DEFAULT }, 121 {WOR1_WORLD, WOR1_WORLD, WOR1_WORLD, DISALLOW_ADHOC_11A | DISALLOW_ADHOC_11A_TURB, NO_REQ, PSCAN_DEFER, CTRY_DEFAULT }, 122 {WOR2_WORLD, WOR2_WORLD, WOR2_WORLD, DISALLOW_ADHOC_11A_TURB, NO_REQ, PSCAN_DEFER, CTRY_DEFAULT }, 123 {WOR3_WORLD, WOR3_WORLD, WOR3_WORLD, NO_REQ, NO_REQ, PSCAN_DEFER, CTRY_DEFAULT }, 124 {WOR4_WORLD, WOR4_WORLD, WOR4_WORLD, DISALLOW_ADHOC_11A | DISALLOW_ADHOC_11A_TURB, NO_REQ, PSCAN_DEFER, CTRY_DEFAULT }, 125 {WOR5_ETSIC, WOR5_ETSIC, WOR5_ETSIC, DISALLOW_ADHOC_11A | DISALLOW_ADHOC_11A_TURB, NO_REQ, PSCAN_DEFER, CTRY_DEFAULT }, 126 {WOR01_WORLD, WOR01_WORLD, WOR01_WORLD, NO_REQ, NO_REQ, PSCAN_DEFER, CTRY_DEFAULT }, 127 {WOR02_WORLD, WOR02_WORLD, WOR02_WORLD, NO_REQ, NO_REQ, PSCAN_DEFER, CTRY_DEFAULT }, 128 {EU1_WORLD, EU1_WORLD, EU1_WORLD, NO_REQ, NO_REQ, PSCAN_DEFER, CTRY_DEFAULT }, 129 {WOR9_WORLD, WOR9_WORLD, WOR9_WORLD, DISALLOW_ADHOC_11A | DISALLOW_ADHOC_11A_TURB, NO_REQ, PSCAN_DEFER, CTRY_DEFAULT }, 130 {WORA_WORLD, WORA_WORLD, WORA_WORLD, DISALLOW_ADHOC_11A | DISALLOW_ADHOC_11A_TURB, NO_REQ, PSCAN_DEFER, CTRY_DEFAULT }, 131 {WORB_WORLD, WORB_WORLD, WORB_WORLD, DISALLOW_ADHOC_11A | DISALLOW_ADHOC_11A_TURB, NO_REQ, PSCAN_DEFER, CTRY_DEFAULT }, 132 {WORC_WORLD, WORC_WORLD, WORC_WORLD, NO_REQ, NO_REQ, PSCAN_DEFER, CTRY_DEFAULT }, 133}; and the ids:
    enum { 31 /* 32 * The following regulatory domain definitions are 33 * found in the EEPROM. Each regulatory domain 34 * can operate in either a 5GHz or 2.4GHz wireless mode or 35 * both 5GHz and 2.4GHz wireless modes. 36 * In general, the value holds no special 37 * meaning and is used to decode into either specific 38 * 2.4GHz or 5GHz wireless mode for that particular 39 * regulatory domain. 40 */ 41 NO_ENUMRD = 0x00, 42 NULL1_WORLD = 0x03, /* For 11b-only countries (no 11a allowed) */ 43 NULL1_ETSIB = 0x07, /* Israel */ 44 NULL1_ETSIC = 0x08, 45 FCC1_FCCA = 0x10, /* USA */ 46 FCC1_WORLD = 0x11, /* Hong Kong */ 47 FCC4_FCCA = 0x12, /* USA - Public Safety */ 48 FCC5_FCCB = 0x13, /* USA w/ 1/2 and 1/4 width channels */ 49 FCC6_FCCA = 0x14, /* Canada for AP only */ 50 51 FCC2_FCCA = 0x20, /* Canada */ 52 FCC2_WORLD = 0x21, /* Australia & HK */ 53 FCC2_ETSIC = 0x22, 54 FCC_UBNT = 0x2A, /* Ubiquity PicoStation M2HP */ 55 FRANCE_RES = 0x31, /* Legacy France for OEM */ 56 FCC3_FCCA = 0x3A, /* USA & Canada w/5470 band, 11h, DFS enabled */ 57 FCC3_WORLD = 0x3B, /* USA & Canada w/5470 band, 11h, DFS enabled */ 58 59 ETSI1_WORLD = 0x37, 60 ETSI3_ETSIA = 0x32, /* France (optional) */ 61 ETSI2_WORLD = 0x35, /* Hungary & others */ 62 ETSI3_WORLD = 0x36, /* France & others */ 63 ETSI4_WORLD = 0x30, 64 ETSI4_ETSIC = 0x38, 65 ETSI5_WORLD = 0x39, 66 ETSI6_WORLD = 0x34, /* Bulgaria */ 67 ETSI8_WORLD = 0x3D, /* Russia */ 68 ETSI9_WORLD = 0x3E, /* Ukraine */ 69 ETSI_RESERVED = 0x33, /* Reserved (Do not used) */ 70 71 MKK1_MKKA = 0x40, /* Japan (JP1) */ 72 MKK1_MKKB = 0x41, /* Japan (JP0) */ 73 APL4_WORLD = 0x42, /* Singapore */ 74 MKK2_MKKA = 0x43, /* Japan with 4.9G channels */ 75 APL_RESERVED = 0x44, /* Reserved (Do not used) */ 76 APL2_WORLD = 0x45, /* Korea */ 77 APL2_APLC = 0x46, 78 APL3_WORLD = 0x47, 79 MKK1_FCCA = 0x48, /* Japan (JP1-1) */ 80 APL2_APLD = 0x49, /* Korea with 2.3G channels */ 81 MKK1_MKKA1 = 0x4A, /* Japan (JE1) */ 82 MKK1_MKKA2 = 0x4B, /* Japan (JE2) */ 83 MKK1_MKKC = 0x4C, /* Japan (MKK1_MKKA,except Ch14) */ 84 APL2_FCCA = 0x4D, /* Mobile customer */ 85 86 APL3_FCCA = 0x50, 87 APL1_WORLD = 0x52, /* Latin America */ 88 APL1_FCCA = 0x53, 89 APL1_APLA = 0x54, 90 APL1_ETSIC = 0x55, 91 APL2_ETSIC = 0x56, /* Venezuela */ 92 APL5_WORLD = 0x58, /* Chile */ 93 APL6_WORLD = 0x5B, /* Singapore */ 94 APL7_FCCA = 0x5C, /* Taiwan 5.47 Band */ 95 APL8_WORLD = 0x5D, /* Malaysia 5GHz */ 96 APL9_WORLD = 0x5E, /* Korea 5GHz; before 11/2007; now APs only */ 97 APL10_WORLD = 0x5F, /* Korea 5GHz; After 11/2007; STAs only */ 98 99 /* 100 * World mode SKUs 101 */ 102 WOR0_WORLD = 0x60, /* World0 (WO0 SKU) */ 103 WOR1_WORLD = 0x61, /* World1 (WO1 SKU) */ 104 WOR2_WORLD = 0x62, /* World2 (WO2 SKU) */ 105 WOR3_WORLD = 0x63, /* World3 (WO3 SKU) */ 106 WOR4_WORLD = 0x64, /* World4 (WO4 SKU) */ 107 WOR5_ETSIC = 0x65, /* World5 (WO5 SKU) */ 108 109 WOR01_WORLD = 0x66, /* World0-1 (WW0-1 SKU) */ 110 WOR02_WORLD = 0x67, /* World0-2 (WW0-2 SKU) */ 111 EU1_WORLD = 0x68, /* Same as World0-2 (WW0-2 SKU), except active scan ch1-13. No ch14 */ 112 113 WOR9_WORLD = 0x69, /* World9 (WO9 SKU) */ 114 WORA_WORLD = 0x6A, /* WorldA (WOA SKU) */ 115 WORB_WORLD = 0x6B, /* WorldB (WOB SKU) */ 116 WORC_WORLD = 0x6C, /* WorldC (WOC SKU) */ 117 118 MKK3_MKKB = 0x80, /* Japan UNI-1 even + MKKB */ 119 MKK3_MKKA2 = 0x81, /* Japan UNI-1 even + MKKA2 */ 120 MKK3_MKKC = 0x82, /* Japan UNI-1 even + MKKC */ 121 122 MKK4_MKKB = 0x83, /* Japan UNI-1 even + UNI-2 + MKKB */ 123 MKK4_MKKA2 = 0x84, /* Japan UNI-1 even + UNI-2 + MKKA2 */ 124 MKK4_MKKC = 0x85, /* Japan UNI-1 even + UNI-2 + MKKC */ 125 126 MKK5_MKKB = 0x86, /* Japan UNI-1 even + UNI-2 + mid-band + MKKB */ 127 MKK5_MKKA2 = 0x87, /* Japan UNI-1 even + UNI-2 + mid-band + MKKA2 */ 128 MKK5_MKKC = 0x88, /* Japan UNI-1 even + UNI-2 + mid-band + MKKC */ 129 130 MKK6_MKKB = 0x89, /* Japan UNI-1 even + UNI-1 odd MKKB */ 131 MKK6_MKKA2 = 0x8A, /* Japan UNI-1 even + UNI-1 odd + MKKA2 */ 132 MKK6_MKKC = 0x8B, /* Japan UNI-1 even + UNI-1 odd + MKKC */ 133 134 MKK7_MKKB = 0x8C, /* Japan UNI-1 even + UNI-1 odd + UNI-2 + MKKB */ 135 MKK7_MKKA2 = 0x8D, /* Japan UNI-1 even + UNI-1 odd + UNI-2 + MKKA2 */ 136 MKK7_MKKC = 0x8E, /* Japan UNI-1 even + UNI-1 odd + UNI-2 + MKKC */ 137 138 MKK8_MKKB = 0x8F, /* Japan UNI-1 even + UNI-1 odd + UNI-2 + mid-band + MKKB */ 139 MKK8_MKKA2 = 0x90, /* Japan UNI-1 even + UNI-1 odd + UNI-2 + mid-band + MKKA2 */ 140 MKK8_MKKC = 0x91, /* Japan UNI-1 even + UNI-1 odd + UNI-2 + mid-band + MKKC */ 141 142 MKK14_MKKA1 = 0x92, /* Japan UNI-1 even + UNI-1 odd + 4.9GHz + MKKA1 */ 143 MKK15_MKKA1 = 0x93, /* Japan UNI-1 even + UNI-1 odd + UNI-2 + 4.9GHz + MKKA1 */ 144 145 MKK10_FCCA = 0xD0, /* Japan UNI-1 even + UNI-2 + 4.9GHz + FCCA */ 146 MKK10_MKKA1 = 0xD1, /* Japan UNI-1 even + UNI-2 + 4.9GHz + MKKA1 */ 147 MKK10_MKKC = 0xD2, /* Japan UNI-1 even + UNI-2 + 4.9GHz + MKKC */ 148 MKK10_MKKA2 = 0xD3, /* Japan UNI-1 even + UNI-2 + 4.9GHz + MKKA2 */ 149 150 MKK11_MKKA = 0xD4, /* Japan UNI-1 even + UNI-2 + mid-band + 4.9GHz + MKKA */ 151 MKK11_FCCA = 0xD5, /* Japan UNI-1 even + UNI-2 + mid-band + 4.9GHz + FCCA */ 152 MKK11_MKKA1 = 0xD6, /* Japan UNI-1 even + UNI-2 + mid-band + 4.9GHz + MKKA1 */ 153 MKK11_MKKC = 0xD7, /* Japan UNI-1 even + UNI-2 + mid-band + 4.9GHz + MKKC */ 154 MKK11_MKKA2 = 0xD8, /* Japan UNI-1 even + UNI-2 + mid-band + 4.9GHz + MKKA2 */ 155 156 MKK12_MKKA = 0xD9, /* Japan UNI-1 even + UNI-1 odd + UNI-2 + mid-band + 4.9GHz + MKKA */ 157 MKK12_FCCA = 0xDA, /* Japan UNI-1 even + UNI-1 odd + UNI-2 + mid-band + 4.9GHz + FCCA */ 158 MKK12_MKKA1 = 0xDB, /* Japan UNI-1 even + UNI-1 odd + UNI-2 + mid-band + 4.9GHz + MKKA1 */ 159 MKK12_MKKC = 0xDC, /* Japan UNI-1 even + UNI-1 odd + UNI-2 + mid-band + 4.9GHz + MKKC */ 160 MKK12_MKKA2 = 0xDD, /* Japan UNI-1 even + UNI-1 odd + UNI-2 + mid-band + 4.9GHz + MKKA2 */ 161 162 MKK13_MKKB = 0xDE, /* Japan UNI-1 even + UNI-1 odd + UNI-2 + mid-band + MKKB + All passive + no adhoc */ 163 164 /* 165 * Following definitions are used only by s/w to map old 166 * Japan SKUs. 167 */ 168 MKK3_MKKA = 0xF0, /* Japan UNI-1 even + MKKA */ 169 MKK3_MKKA1 = 0xF1, /* Japan UNI-1 even + MKKA1 */ 170 MKK3_FCCA = 0xF2, /* Japan UNI-1 even + FCCA */ 171 MKK4_MKKA = 0xF3, /* Japan UNI-1 even + UNI-2 + MKKA */ 172 MKK4_MKKA1 = 0xF4, /* Japan UNI-1 even + UNI-2 + MKKA1 */ 173 MKK4_FCCA = 0xF5, /* Japan UNI-1 even + UNI-2 + FCCA */ 174 MKK9_MKKA = 0xF6, /* Japan UNI-1 even + 4.9GHz */ 175 MKK10_MKKA = 0xF7, /* Japan UNI-1 even + UNI-2 + 4.9GHz */ 176 MKK6_MKKA1 = 0xF8, /* Japan UNI-1 even + UNI-1 odd + UNI-2 + MKKA1 */ 177 MKK6_FCCA = 0xF9, /* Japan UNI-1 even + UNI-1 odd + UNI-2 + FCCA */ 178 MKK7_MKKA1 = 0xFA, /* Japan UNI-1 even + UNI-1 odd + UNI-2 + MKKA1 */ 179 MKK7_FCCA = 0xFB, /* Japan UNI-1 even + UNI-1 odd + UNI-2 + FCCA */ 180 MKK9_FCCA = 0xFC, /* Japan UNI-1 even + 4.9GHz + FCCA */ 181 MKK9_MKKA1 = 0xFD, /* Japan UNI-1 even + 4.9GHz + MKKA1 */ 182 MKK9_MKKC = 0xFE, /* Japan UNI-1 even + 4.9GHz + MKKC */ 183 MKK9_MKKA2 = 0xFF, /* Japan UNI-1 even + 4.9GHz + MKKA2 */ 184 185 /* 186 * Regulator domains ending in a number (e.g. APL1, 187 * MK1, ETSI4, etc) apply to 5GHz channel and power 188 * information. Regulator domains ending in a letter 189 * (e.g. APLA, FCCA, etc) apply to 2.4GHz channel and 190 * power information. 191 */ 192 APL1 = 0x0150, /* LAT & Asia */ 193 APL2 = 0x0250, /* LAT & Asia */ 194 APL3 = 0x0350, /* Taiwan */ 195 APL4 = 0x0450, /* Jordan */ 196 APL5 = 0x0550, /* Chile */ 197 APL6 = 0x0650, /* Singapore */ 198 APL7 = 0x0750, /* Taiwan, disable ch52 */ 199 APL8 = 0x0850, /* Malaysia */ 200 APL9 = 0x0950, /* Korea. Before 11/2007. Now used only by APs */ 201 APL10 = 0x1050, /* Korea. After 11/2007. For STAs only */ 202 203 ETSI1 = 0x0130, /* Europe & others */ 204 ETSI2 = 0x0230, /* Europe & others */ 205 ETSI3 = 0x0330, /* Europe & others */ 206 ETSI4 = 0x0430, /* Europe & others */ 207 ETSI5 = 0x0530, /* Europe & others */ 208 ETSI6 = 0x0630, /* Europe & others */ 209 ETSI8 = 0x0830, /* Russia */ 210 ETSI9 = 0x0930, /* Ukraine */ 211 ETSIA = 0x0A30, /* France */ 212 ETSIB = 0x0B30, /* Israel */ 213 ETSIC = 0x0C30, /* Latin America */ 214 215 FCC1 = 0x0110, /* US & others */ 216 FCC2 = 0x0120, /* Canada, Australia & New Zealand */ 217 FCC3 = 0x0160, /* US w/new middle band & DFS */ 218 FCC4 = 0x0165, /* US Public Safety */ 219 FCC5 = 0x0166, /* US w/ 1/2 and 1/4 width channels */ 220 FCC6 = 0x0610, /* Canada and Australia */ 221 FCCA = 0x0A10, 222 FCCB = 0x0A11, /* US w/ 1/2 and 1/4 width channels */ 223 224 APLD = 0x0D50, /* South Korea */ 225 226 MKK1 = 0x0140, /* Japan (UNI-1 odd)*/ 227 MKK2 = 0x0240, /* Japan (4.9 GHz + UNI-1 odd) */ 228 MKK3 = 0x0340, /* Japan (UNI-1 even) */ 229 MKK4 = 0x0440, /* Japan (UNI-1 even + UNI-2) */ 230 MKK5 = 0x0540, /* Japan (UNI-1 even + UNI-2 + mid-band) */ 231 MKK6 = 0x0640, /* Japan (UNI-1 odd + UNI-1 even) */ 232 MKK7 = 0x0740, /* Japan (UNI-1 odd + UNI-1 even + UNI-2 */ 233 MKK8 = 0x0840, /* Japan (UNI-1 odd + UNI-1 even + UNI-2 + mid-band) */ 234 MKK9 = 0x0940, /* Japan (UNI-1 even + 4.9 GHZ) */ 235 MKK10 = 0x0B40, /* Japan (UNI-1 even + UNI-2 + 4.9 GHZ) */ 236 MKK11 = 0x1140, /* Japan (UNI-1 even + UNI-2 + 4.9 GHZ) */ 237 MKK12 = 0x1240, /* Japan (UNI-1 even + UNI-2 + 4.9 GHZ) */ 238 MKK13 = 0x0C40, /* Same as MKK8 but all passive and no adhoc 11a */ 239 MKK14 = 0x1440, /* Japan UNI-1 even + UNI-1 odd + 4.9GHz */ 240 MKK15 = 0x1540, /* Japan UNI-1 even + UNI-1 odd + UNI-2 + 4.9GHz */ 241 242 MKKA = 0x0A40, /* Japan */ 243 MKKC = 0x0A50, 244 245 NULL1 = 0x0198, 246 WORLD = 0x0199, 247 DEBUG_REG_DMN = 0x01ff, 248}; This can be changed in (btw original code as a little hack from apple):
    ar9300FillCapabilityInfo() ... *(_WORD *)(a1 + 2326) = 141; KPCM Tool to install extensions
     
    Check here https://www.firewolf.science/2015/10/kcpm-utility-pro-v5-0-installing-kexts-repairing-permissions-rebuilding-caches-configuring-sip-and-more/
     
    Kernel kext debug here http://www.insanelymac.com/forum/topic/312254-realtek-ethernet-panic-debug-driver-using-xcode-ui/
     
    Atm AR9462 and 9565 were patched using this mehod. I'll stop on 10.11 for the 9565 card as i cant get a stable kernel to work on my amd machine.
     
    AR9485, pci168c,32 also working gj
     

    dev9565.zip
    0036v03.zip
  19. Like
    jalavoui got a reaction from Slice in ATI Oland family cards   
    some opengl profilles code from gldriver
    __int64 __fastcall sub_8DCDC(__int64 a1, unsigned int a2) { unsigned int v2; // eax int v3; // edx signed int v4; // ecx const char *v5; // r15 unsigned int v6; // ecx unsigned int v7; // eax const char *v8; // rdx unsigned int v9; // eax const char *v10; // rdx unsigned int v11; // ecx signed int v12; // eax unsigned int v13; // eax const char *v14; // rdx signed int v15; // eax __int64 v16; // rcx char *v17; // rbx char *v18; // rax v2 = *(_DWORD *)(a1 + 624); v3 = *(_DWORD *)(a1 + 624) & 0xFF80000; v4 = 7168; if ( v3 > 0x7FFFFF ) { if ( v3 > 0x7FFFFFF ) { if ( v3 == 0x8000000 ) v4 = 7177; } else if ( v3 > 0x1FFFFFF ) { if ( v3 == 0x2000000 ) { v4 = 7175; } else if ( v3 == 0x4000000 ) { v4 = 7176; } } else if ( v3 == 0x800000 ) { v4 = 7173; } else if ( v3 == 0x1000000 ) { v4 = 7174; } } else if ( v3 > 0x1FFFFF ) { if ( v3 == 0x200000 ) { v4 = 7171; } else if ( v3 == 0x400000 ) { v4 = 7172; } } else if ( v3 == (_DWORD)&loc_80000 ) { v4 = 7169; } else if ( v3 == 0x100000 ) { v4 = 7170; } *(_DWORD *)(a1 + 636) = v4; *(_QWORD *)(a1 + 528) = 0x610LL; *(_QWORD *)(a1 + 544) = 8LL; if ( !(v2 & 0x380000) ) { if ( v2 & 0xC00000 ) { if ( v3 == 0x800000 ) { if ( (signed int)(unsigned __int16)v2 > 26557 ) { if ( (unsigned __int16)v2 == 26558 ) v5 = "Radeon HD Hawaii LE Prototype"; else LABEL_66: v5 = "Radeon HD Hawaii Unknown Prototype"; } else { v5 = "Radeon HD Hawaii XT Prototype"; switch ( (unsigned __int16)v2 ) { case 0x67A8u: case 0x67B0u: goto LABEL_124; case 0x67AAu: case 0x67B1u: v5 = "Radeon HD Hawaii PRO Prototype"; break; default: goto LABEL_66; } } } else if ( v3 == 0x400000 ) { if ( (signed int)(unsigned __int16)v2 > 26191 ) { v11 = (unsigned __int16)v2 - 26192; if ( v11 <= 0xD ) { v12 = 4353; if ( _bittest(&v12, v11) ) { v5 = "Radeon HD Bonaire XT Prototype"; goto LABEL_124; } v15 = 8194; if ( _bittest(&v15, v11) ) { v5 = "Radeon HD Bonaire PRO Prototype"; goto LABEL_124; } } LABEL_113: v5 = "Radeon HD Bonaire Unknown Prototype"; goto LABEL_124; } switch ( (unsigned __int16)v2 ) { case 0x6640u: v5 = "Radeon HD Saturn XT Prototype"; if ( (v2 & 0xF0000000) == 0x80000000 ) v5 = "Radeon R9 M380"; break; case 0x6641u: v5 = "Radeon HD Saturn PRO Prototype"; break; case 0x6646u: v5 = "Radeon HD Emerald XT Prototype"; break; case 0x6647u: v5 = "Radeon HD Emerald PRO Prototype"; break; default: goto LABEL_113; } } else { v5 = "Radeon CI Unknown Prototype"; } goto LABEL_124; } if ( !(v2 & 0xF000000) ) { v5 = "Radeon Unknown Prototype"; goto LABEL_124; } if ( v3 > 0x3FFFFFF ) { if ( v3 == 0x4000000 ) { v5 = "Radeon HD Ellesmere Unknown Prototype"; goto LABEL_124; } if ( v3 == 0x8000000 ) { v5 = "Radeon HD Baffin Unknown Prototype"; goto LABEL_124; } } else { if ( v3 == 0x1000000 ) { if ( (signed int)(unsigned __int16)v2 > 26935 ) { if ( (unsigned __int16)v2 != 26937 ) { if ( (unsigned __int16)v2 == 26936 ) { v5 = "Radeon HD Tonga XT Prototype"; if ( (v2 & 0xF0000000) == 0x40000000 ) v5 = "Radeon R9 M295X"; goto LABEL_124; } LABEL_123: v5 = "Radeon HD Tonga Unknown Prototype"; goto LABEL_124; } } else { if ( (signed int)(unsigned __int16)v2 <= 26919 ) { if ( (unsigned __int16)v2 == 26912 ) { v7 = v2 >> 28; v8 = "Radeon HD Amethyst XT Prototype"; if ( v7 == 8 ) v8 = "Radeon R9 M395"; v5 = "Radeon R9 M395X"; if ( v7 != 9 ) v5 = v8; goto LABEL_124; } if ( (unsigned __int16)v2 == 26913 ) { v5 = "Radeon HD Amethyst XT Prototype"; goto LABEL_124; } goto LABEL_123; } if ( (unsigned __int16)v2 == 26920 ) { v5 = "Radeon HD Tonga XT Prototype"; goto LABEL_124; } if ( (unsigned __int16)v2 != 26923 ) goto LABEL_123; } v5 = "Radeon HD Tonga PRO Prototype"; goto LABEL_124; } if ( v3 == 0x2000000 ) { v5 = "Radeon HD Fiji Unknown Prototype"; if ( (unsigned __int16)v2 == 29440 ) v5 = "Radeon HD Fiji XT Prototype"; goto LABEL_124; } } v5 = "Radeon VI Unknown Prototype"; goto LABEL_124; } if ( v3 == 0x200000 ) { v6 = (unsigned __int16)v2 - 26656; if ( v6 >= 0x20 ) v5 = "Radeon HD Verde Unknown Prototype"; else v5 = (&off_C0760)[v6]; goto LABEL_124; } if ( v3 != 0x100000 ) { if ( v3 != (_DWORD)&loc_80000 ) { v5 = "Radeon SI Unknown Prototype"; goto LABEL_124; } if ( (signed int)(unsigned __int16)v2 > 0x679D ) { if ( (unsigned __int16)v2 == 0x679E ) { v5 = "Radeon HD Tahiti LE Prototype"; if ( (v2 & 0xF0000000) == 0x50000000 ) v5 = "Radeon HD - FirePro D500"; goto LABEL_124; } } else { if ( (unsigned __int16)v2 == 0x6611 ) { v5 = "Radeon HD - FirePro D700"; goto LABEL_124; } if ( (unsigned __int16)v2 == 0x679A ) { v5 = "Radeon HD 7950"; goto LABEL_124; } } v5 = "Radeon HD Tahiti Unknown Prototype"; goto LABEL_124; } if ( (signed int)(unsigned __int16)v2 > 26645 ) { v5 = "Radeon HD Pitcairn XT Prototype"; switch ( (unsigned __int16)v2 ) { case 0x6816u: case 0x6818u: goto LABEL_124; case 0x6817u: goto LABEL_101; case 0x6819u: v9 = v2 >> 28; v10 = "Radeon HD Pitcairn PRO Prototype"; if ( v9 == 3 ) v10 = "Radeon R9 M390"; v5 = "Radeon R9 M290"; if ( v9 != 8 ) v5 = v10; goto LABEL_124; default: goto LABEL_102; } goto LABEL_102; } if ( (signed int)(unsigned __int16)v2 <= 26624 ) { if ( (unsigned __int16)v2 == 26624 ) { v5 = "Radeon HD Wimbledon XT Prototype"; goto LABEL_124; } LABEL_102: v5 = "Radeon HD Pitcairn Unknown Prototype"; goto LABEL_124; } if ( (signed int)(unsigned __int16)v2 <= 26639 ) { if ( (unsigned __int16)v2 == 26625 ) { v5 = "Radeon HD Wimbledon PRO Prototype"; goto LABEL_124; } if ( (unsigned __int16)v2 == 26630 ) { v5 = "Radeon HD Neptune XT Prototype"; goto LABEL_124; } goto LABEL_102; } if ( (unsigned __int16)v2 != 26640 ) { if ( (unsigned __int16)v2 == 26641 ) { LABEL_101: v5 = "Radeon HD Pitcairn PRO Prototype"; goto LABEL_124; } goto LABEL_102; } v13 = v2 >> 28; v14 = "Radeon HD Pitcairn PRO Prototype"; if ( v13 == 4 ) v14 = "Radeon R9 M290X"; v5 = "Radeon HD - FirePro D300"; if ( v13 != 5 ) v5 = v14; LABEL_124: v16 = *(unsigned __int8 *)(*(_QWORD *)a1 + 238LL); *(_BYTE *)(a1 + 660) = 0; *(_DWORD *)(a1 + 656) = 0x20495441; *(_BYTE *)(a1 + 724) = 0; *(_DWORD *)(a1 + 720) = 0x20495441; v17 = stpcpy((char *)(a1 + 660), v5); v18 = stpcpy((char *)(a1 + 724), v5); *(_QWORD *)v17 = 0x204C476E65704F20LL; v17[14] = 0; *((_WORD *)v17 + 6) = 0x656E; *((_DWORD *)v17 + 2) = 0x69676E45; *((_QWORD *)v18 + 1) = 0x656E69676E4520LL; *(_QWORD *)v18 = 0x657475706D6F4320LL; sub_51D62(a1, a2); return 0LL; }  
  20. Like
    jalavoui got a reaction from Gigamaxx in AMD High Sierra Kernel Release and Testing   
    when you install a new kernel always do a kextcache -u / before reboot
    open the console log and if the prelinkedkernel isnt rebuild you will have in the log the kext that break it
    if the prelinkedkernel can't be rebuild the system will always be unstable
    i do get some bugs if i have a few osx versions on same machine (10.11/12) - maybe this happens with other users
  21. Like
    jalavoui got a reaction from JorgeMax in ATI Radeon unsupported cards debugging   
    This must be the worst graphic card ever made http://www.notebookcheck.net/AMD-Radeon-R2-Mullins-Beema.115402.0.html
     
    Anyway atm i got this...
     

     
     
    This is just a small step in making it full usuable. Current stage loads framebuffer only.
     
    Tested on ATI 0x9852 - os x 10.11.4
     
     
    Howto use
     
    - Download latest attach
    - Get your card bios rom file.
    - Open and paste in ATY,bin_image in AMD8000Controller.kext plist file.
    - Care if you're changing aty_config parameters.
    - reboot and cross fingers.
     
     
    V02 fixes
    - no need to edit framebuffer/connectors in kext/clover/dsdt - they will be auto assigned from bios table.
    - removed patch from 7000. added info.plist from 8000
    - out of sync when using a 2nd screen can be fixed using the attached s.zip script + fixedid (move edid folder to s/l/displays)
     
     
     
     
    Developper notes
     
    - Debug tool from http://www.insanelymac.com/forum/topic/312254-realtek-ethernet-panic-debug-driver-using-xcode-ui/
    - i've just compiled DisableMonitor.app from github - maybe usefull for some1
    v01.zip
    v02.zip
    DisableMonitor.zip
    atomdis.zip
    s.zip
    FixEDID.zip
  22. Like
    jalavoui got a reaction from Rockey12 in ATI Oland family cards   
    I found a way to get acceleration on 10.11.6
     
    this helps a lot on debugging the card (faster logging)
     
    tested on a 0x6611 - try other ids and report
     
    disable any hdmi audio patch as it doesn't work atm.
    v1-10.11.6.zip
  23. Like
    jalavoui got a reaction from Rockey12 in ATI Oland family cards   
    Tested on 10.12.5 a oland card with id 0x6611
    I got it working with full acceleration
     
    TODO:
    - test AMDRadeonVADriver.bundle
    - test on 10.14
     
    If you have a card of this type try and post results. I managed to make it work on the dvi port and hdmi ports. 
     
     
    Cards id found in the 10.12 accelerator:
    0x6610, 0x6611, 0x6617, 0x6613, 0x6631, 0x6600. the 0x6620 is a "oland pro gl card" (as a extra 0x40 at byte 7 caps)
    Note that some ids have double configs e.g. the 0x6600 and 0x6610
     
    PowerTuneDefaults
    those can be found on the 7000 controller - on osx10.11
    if ( v12 == 0x6611 || v12 == 0x6613 ) { *(_QWORD *)(v17 + 7120) = &CACWeights_OlandPro; *(_QWORD *)(v17 + 7128) = &LCAC_MarsPro; *(_QWORD *)(v17 + 7136) = &CACOverride_Oland; *(_QWORD *)(v17 + 7168) = &PowerTuneData_MarsPro; *(_QWORD *)(v17 + 7480) = &DteData_MarsPro; } and on 10.12 some changes
    else if ( *((_DWORD *)v19 + 3) == 0x6604 ) { *(_QWORD *)(v18 + 7120) = &CACWeights_MarsXT; *(_QWORD *)(v18 + 7128) = &LCAC_MarsPro; *(_QWORD *)(v18 + 7136) = &CACOverride_Oland; *(_QWORD *)(v18 + 7168) = &PowerTuneData_MarsPro; *(_QWORD *)(v18 + 7480) = &DteData_MarsPro; } else { *(_QWORD *)(v18 + 7120) = &CACWeights_Oland; *(_QWORD *)(v18 + 7128) = &LCAC_Oland; *(_QWORD *)(v18 + 7136) = &CACOverride_Oland; *(_QWORD *)(v18 + 7168) = &PowerTuneData_Oland; *(_QWORD *)(v18 + 7480) = &DteData_Oland; } Howto test:
     
    - this are 10.12.5 kext files
    - swap id 0x6611 for other if need (oland cards only)
    - check the controller first AMD7000Controller.kext
    - If u get. a screen install the AMDRadeonX4000.kext and reboot
    - atm i'm not using any assigned framebuffer name (futomaki, etc). if u have connectors issues try it in clover.
     
     
    Status
    got a few IOAccelFenceMachine::fence_timeout random in logs (10.12) - need further testing
    multi-monitor works
    hdmi audio works - no volume control.
    v1.zip
  24. Like
    jalavoui got a reaction from Rockey12 in ATI Oland family cards   
    Tested on 10.12.5 a oland card with id 0x6611
    I got it working with full acceleration
     
    TODO:
    - test AMDRadeonVADriver.bundle
    - test on 10.14
     
    If you have a card of this type try and post results. I managed to make it work on the dvi port and hdmi ports. 
     
     
    Cards id found in the 10.12 accelerator:
    0x6610, 0x6611, 0x6617, 0x6613, 0x6631, 0x6600. the 0x6620 is a "oland pro gl card" (as a extra 0x40 at byte 7 caps)
    Note that some ids have double configs e.g. the 0x6600 and 0x6610
     
    PowerTuneDefaults
    those can be found on the 7000 controller - on osx10.11
    if ( v12 == 0x6611 || v12 == 0x6613 ) { *(_QWORD *)(v17 + 7120) = &CACWeights_OlandPro; *(_QWORD *)(v17 + 7128) = &LCAC_MarsPro; *(_QWORD *)(v17 + 7136) = &CACOverride_Oland; *(_QWORD *)(v17 + 7168) = &PowerTuneData_MarsPro; *(_QWORD *)(v17 + 7480) = &DteData_MarsPro; } and on 10.12 some changes
    else if ( *((_DWORD *)v19 + 3) == 0x6604 ) { *(_QWORD *)(v18 + 7120) = &CACWeights_MarsXT; *(_QWORD *)(v18 + 7128) = &LCAC_MarsPro; *(_QWORD *)(v18 + 7136) = &CACOverride_Oland; *(_QWORD *)(v18 + 7168) = &PowerTuneData_MarsPro; *(_QWORD *)(v18 + 7480) = &DteData_MarsPro; } else { *(_QWORD *)(v18 + 7120) = &CACWeights_Oland; *(_QWORD *)(v18 + 7128) = &LCAC_Oland; *(_QWORD *)(v18 + 7136) = &CACOverride_Oland; *(_QWORD *)(v18 + 7168) = &PowerTuneData_Oland; *(_QWORD *)(v18 + 7480) = &DteData_Oland; } Howto test:
     
    - this are 10.12.5 kext files
    - swap id 0x6611 for other if need (oland cards only)
    - check the controller first AMD7000Controller.kext
    - If u get. a screen install the AMDRadeonX4000.kext and reboot
    - atm i'm not using any assigned framebuffer name (futomaki, etc). if u have connectors issues try it in clover.
     
     
    Status
    got a few IOAccelFenceMachine::fence_timeout random in logs (10.12) - need further testing
    multi-monitor works
    hdmi audio works - no volume control.
    v1.zip
  25. Like
    jalavoui got a reaction from Rockey12 in ATI Oland family cards   
    I found a way to get acceleration on 10.11.6
     
    this helps a lot on debugging the card (faster logging)
     
    tested on a 0x6611 - try other ids and report
     
    disable any hdmi audio patch as it doesn't work atm.
    v1-10.11.6.zip
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