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ar4er

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About ar4er

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    InsanelyMac Protégé

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    Donetsk, Ukraine

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  1. ar4er

    Filevault 2 (FV2) with ps2 keyboard

    Jief_Machak, yes, between keystrokes. Last version work fine, much better than previous.
  2. ar4er

    Filevault 2 (FV2) with ps2 keyboard

    The second version works on Lenovo V580, though with a long delay. The third version does not work.
  3. Apparently this is not possible for 9485, as in apples driver for all of the cards used two opcode to initialize baseband,but for 9485 need be three. 00000000000b16f6 mov qword [ds:r15+0x14660], 0x0 00000000000b1701 mov dword [ds:r15+0x14668], 0x0 00000000000b170c mov dword [ds:r15+0x1466c], 0x0 00000000000b1717 lea rcx, qword [ds:_ar9330Common_osprey2_0] 00000000000b171e mov qword [ds:r15+0x14670], rcx 00000000000b1725 mov dword [ds:r15+0x14678], 0x82 00000000000b1730 mov dword [ds:r15+0x1467c], 0x2 00000000000b173b lea rcx, qword [ds:_ar9330Modes_osprey2_0_BB_postamble] /* bb */ INIT_INI_ARRAY(&ahp->ah_ini_bb[ATH_INI_PRE], ar9485_poseidon1_1, ARRAY_LENGTH(ar9485_poseidon1_1), 2); INIT_INI_ARRAY(&ahp->ah_ini_bb[ATH_INI_CORE], ar9485_poseidon1_1_baseband_core, ARRAY_LENGTH(ar9485_poseidon1_1_baseband_core), 2); INIT_INI_ARRAY(&ahp->ah_ini_bb[ATH_INI_POST], ar9485_poseidon1_1_baseband_postamble, ARRAY_LENGTH(ar9485_poseidon1_1_baseband_postamble), 5);
  4. ar4er

    Ozmosis

    I edit bios with UEFITool and flash it with FTK
  5. ar4er

    Ozmosis

    I test ozmosis 1479 on Lenovo V580 and it just not work.
  6. Hmmm... strange. Can you just write that (as I understand - Snow Leopard 10.6.1-10.6.2 Intel AMD by Hazard, right?) installed, and what options selected during installation, does any manipulation after the installation (well, except for strings).
  7. xan1242, аre you sure that you have working QE/CI? Built-in nvidia video card not working in Mac OS X.
  8. ar4er

    куда делся applelife.ru

    ИМХО, мне кажется числа до двенадцатого ничего делать не будут, рождественские отпуска, каникулы... Да и хватит, товарищи, с маками любовью заниматся, новый год на носу... Я вот, например, завтра уезжаю, подальше от техники и всякой хрени, нажрусь как сволочь и буду спать пока новый год не наступит. P.S> С Новым 2009-м Годом всех!!!
  9. real run VIA VT1708B at 5.1 or 7.1?
  10. ar4er

    S-ATA & IOKitWait timeout...

    Just need to add plug-ins. Here with plug-ins: IOATAFamily.kext.zip
  11. ar4er

    S-ATA & IOKitWait timeout...

    New version for 10.5.6 in post №21
  12. ar4er

    GTA IV on a macbook?

    ha-ha-ha, this is not real! Only hi-end PC or PS3(xBox)
  13. ar4er

    S-ATA & IOKitWait timeout...

    I'm fix IOATAController.cpp before: for( int i = 0; i < 3100; i++) { // read the status register - helps deal with devices which errantly // set interrupt pending states during resets. Reset operations are not // supposed to generate interrupts, but some devices do anyway. // interrupt handlers should be prepared to deal with errant interrupts on ATA busses. OSSynchronizeIO(); UInt8 status = *_tfStatusCmdReg; // when drive is ready, break the loop if( ( status & readyMask )== readyOn) { // device reset completed in time resetFailed = false; break; } IOSleep( 10 ); // sleep thread for another 10 ms } if( resetFailed ) { // it is likely that this hardware is broken. // There's no recovery action if the drive fails // to reset. DLOG("IOATA device failed to reset.\n"); result = kATATimeoutErr; } DLOG("IOATA reset complete.\n"); return result; } /*--------------------------------------------------------------------------- * * Subclasses should take necessary action to create DMA channel programs, * for the current memory descriptor in _currentCommand and activate the * the DMA hardware ---------------------------------------------------------------------------*/ IOReturn IOATAController::startDMA( void ) { DLOG("IOATA Bus controllers that offer DMA must provide implementation/n"); return kATAModeNotSupported; } /*--------------------------------------------------------------------------- * Subclasses should take all actions necesary to safely shutdown DMA engines * in any state of activity, whether finished, pending or stopped. Calling * this function must be harmless reguardless of the state of the engine. * ---------------------------------------------------------------------------*/ IOReturn IOATAController::stopDMA( void ) { DLOG("IOATA Bus controllers that offer DMA must provide implementation/n"); return kATAModeNotSupported; } /*--------------------------------------------------------------------------- // WaitForU8Status // Will wait up to one millisecond for the value in the altStatus register & mask to equal the value // passed in. Note that I always use the altStatus register so as not to have the side affect of clearing // the interrupt if there is one. ---------------------------------------------------------------------------*/ bool IOATAController::waitForU8Status (UInt8 mask, UInt8 value) { int i; // we will read the status from the alt status register so as not // to clear the interrupt accidentally for (i=0; i < kStatusDelayLoopMS; i++) { OSSynchronizeIO(); if ((*_tfAltSDevCReg & mask) == value) { return true; } IODelay( kStatusDelayTime ); } return false; // time's up } /*---------------------------------------------------------------------------------------------------- ** Routine ATAPISlaveExists ** ** Purpose: Determines whether an ATAPI device seen as a "slave" of a master ATAPI device ** is actually present, or the product of the master shadowing a not-present slave's registers ** Call this function when the master device shows EBh 14h, and the slave also shows the ATAPI ** protocol signature. ** Returns: False if a device is ruled out. True if a device is verified. Leaves device in a ready state, ** But no longer showing signatures. NOTE: Device 1 (slave) is assumed already selected. */ bool IOATAController::ATAPISlaveExists( void ) { UInt8 scratchByte; UInt16 scratchWord; UInt32 dataCounter; UInt32 loopCounter; // The only option is to issue a command and see what happens. OSSynchronizeIO(); *_tfAltSDevCReg = 0x02; // disable interrupts //issue INDENTIFY PACKET DEVICE OSSynchronizeIO(); *_tfStatusCmdReg = 0xA1; // reading and disreguarding a register provides the required 400ns delay time. OSSynchronizeIO(); scratchByte = *_tfAltSDevCReg; OSSynchronizeIO(); scratchByte = *_tfAltSDevCReg; // if the device returns status 00h, we declare it not present. A real device would probably be // status BSY (80h) now. An incredibly fast device might be ready to move data and show DRQ. // However, by ATA standards, a not present device is required to return 00h. // Lucky break, no device and we figured it out in a hurry. if( (scratchByte == 0x00) ) { // enable device interrupt *_tfAltSDevCReg = 0x00; OSSynchronizeIO(); return false; } // OK we probably have a device now. We have to wait for drive to send data, and read it and clear it. // It is possible that the a misbehaving master has decided to respond to the command. So, we'll // break on error bit and say it's not a real slave should that happen. // take a leisurely approach, this will take a while. // give the device up to 10 seconds to respond with data. for( loopCounter = 0; loopCounter < 10000; loopCounter++) { OSSynchronizeIO(); scratchByte = *_tfAltSDevCReg; // If drive sets error, clear status and return false. It's probably a misbehaving master if( scratchByte & 0x01 ) break; // this means the drive is really there. Clear the data and return true. if( (scratchByte & 0x58) == 0x58) // RDY=1 DRQ=1 { OSSynchronizeIO(); scratchByte = *_tfStatusCmdReg; // clear pending interrupt state for( dataCounter = 0; dataCounter < 256; dataCounter++ ) { OSSynchronizeIO(); scratchWord = *_tfDataReg; } // enable device interrupt *_tfAltSDevCReg = 0x00; OSSynchronizeIO(); return true; } // OK, sleep for 10 ms and try again. IOSleep(10); } // In the ugly case, a drive set BSY, and didn't respond within 10 seconds with data. // Otherwise, this is the for loop terminating on seeing the error bit. // We'll read status and return false. OSSynchronizeIO(); scratchByte = *_tfStatusCmdReg; // clear pending interrupt state // enable device interrupt *_tfAltSDevCReg = 0x00; OSSynchronizeIO(); return false; } /*--------------------------------------------------------------------------- * scan the bus to see if devices are attached. The assumption is that the * devices are in a cleanly-reset state, showing their protocol signatures, * and the bus is properly wired with a pull down resistor on DD:7. * If your bus controller does not meet these conditions, you should override * and supply your own function which meets your specific hardware needs. * Your controller may or may not require a reset, or it may require more * thorough scanning, or additional configuration prior to looking for drives, * or it may aquire information from firmware indicating the devices attached. * This function should be self contained and not rely upon work loop or * or anything other than the register pointers being setup and enabled for access ---------------------------------------------------------------------------*/ UInt32 IOATAController::scanForDrives( void ) { UInt32 unitsFound = 0; UInt8 status = 0x00; // count total time spent searching max time allowed = 31 secs // it RARELY takes this long. UInt32 milsSpent = 0; // wait for a not busy bus // should be ready, but some devices may be slow to wake or spin up. for( int loopMils = 0; milsSpent < 3100; loopMils++ ) { OSSynchronizeIO(); status = *_tfStatusCmdReg; if( (status & mATABusy) == 0x00 ) break; IOSleep( 10 ); milsSpent++; } // spun on BSY for too long, declare bus empty if( ! (milsSpent < 3100) ) goto AllDone; // select each possible device on the bus, wait for BSY- // then check for protocol signatures. for( int unit = 0; unit < 2; unit++ ) { // wait for a not busy bus for( int loopMils = 0; milsSpent < 3100; loopMils++ ) { // write the selection bit OSSynchronizeIO(); *_tfSDHReg = ( unit << 4 ); IODelay( 10 ); // typically, devices respond quickly to selection // but we'll give it a chance in case it is slow for some reason. status = *_tfStatusCmdReg; if( (status & mATABusy) == 0x00 ) { break; } IOSleep( 10 ); milsSpent++; } // spun on BSY too long, probably bad device if( ! (milsSpent < 3100) ) goto AllDone; // check for ATAPI device signature first if ( ( *_tfCylLoReg == 0x14) && ( *_tfCylHiReg == 0xEB) ) { if( (unit == 1 ) && ( _devInfo[0].type == kATAPIDeviceType ) ) { // OK we've met the condition for an indeterminate bus, master is atapi and we see a slave atapi // signature. This is legal ATA, though we are fortunate enough that most devices don't do this. if( ATAPISlaveExists( ) != true ) { _devInfo[unit].type = kUnknownATADeviceType; goto AllDone; } } _devInfo[unit].type = kATAPIDeviceType; _devInfo[unit].packetSend = kATAPIDRQFast; // this is the safest default setting unitsFound++; } // check for ATA signature, including status RDY=1 and ERR=0 else if ( (*_tfCylLoReg == 0x00) && (*_tfCylHiReg == 0x00) && (*_tfSCountReg == 0x01) && (*_tfSectorNReg == 0x01) && ( (*_tfAltSDevCReg & 0x51) == 0x50) ) { _devInfo[unit].type = kATADeviceType; _devInfo[unit].packetSend = kATAPIUnknown; unitsFound++; }else{ _devInfo[unit].type = kUnknownATADeviceType; _devInfo[unit].packetSend = kATAPIUnknown; } } after: for( int i = 0; i < 100; i++) { // read the status register - helps deal with devices which errantly // set interrupt pending states during resets. Reset operations are not // supposed to generate interrupts, but some devices do anyway. // interrupt handlers should be prepared to deal with errant interrupts on ATA busses. OSSynchronizeIO(); UInt8 status = *_tfStatusCmdReg; // when drive is ready, break the loop if( ( status & readyMask )== readyOn) { // device reset completed in time resetFailed = false; break; } IOSleep( 10 ); // sleep thread for another 10 ms } if( resetFailed ) { // it is likely that this hardware is broken. // There's no recovery action if the drive fails // to reset. DLOG("IOATA device failed to reset.\n"); result = kATATimeoutErr; } DLOG("IOATA reset complete.\n"); return result; } /*--------------------------------------------------------------------------- * * Subclasses should take necessary action to create DMA channel programs, * for the current memory descriptor in _currentCommand and activate the * the DMA hardware ---------------------------------------------------------------------------*/ IOReturn IOATAController::startDMA( void ) { DLOG("IOATA Bus controllers that offer DMA must provide implementation/n"); return kATAModeNotSupported; } /*--------------------------------------------------------------------------- * Subclasses should take all actions necesary to safely shutdown DMA engines * in any state of activity, whether finished, pending or stopped. Calling * this function must be harmless reguardless of the state of the engine. * ---------------------------------------------------------------------------*/ IOReturn IOATAController::stopDMA( void ) { DLOG("IOATA Bus controllers that offer DMA must provide implementation/n"); return kATAModeNotSupported; } /*--------------------------------------------------------------------------- // WaitForU8Status // Will wait up to one millisecond for the value in the altStatus register & mask to equal the value // passed in. Note that I always use the altStatus register so as not to have the side affect of clearing // the interrupt if there is one. ---------------------------------------------------------------------------*/ bool IOATAController::waitForU8Status (UInt8 mask, UInt8 value) { int i; // we will read the status from the alt status register so as not // to clear the interrupt accidentally for (i=0; i < kStatusDelayLoopMS; i++) { OSSynchronizeIO(); if ((*_tfAltSDevCReg & mask) == value) { return true; } IODelay( kStatusDelayTime ); } return false; // time's up } /*---------------------------------------------------------------------------------------------------- ** Routine ATAPISlaveExists ** ** Purpose: Determines whether an ATAPI device seen as a "slave" of a master ATAPI device ** is actually present, or the product of the master shadowing a not-present slave's registers ** Call this function when the master device shows EBh 14h, and the slave also shows the ATAPI ** protocol signature. ** Returns: False if a device is ruled out. True if a device is verified. Leaves device in a ready state, ** But no longer showing signatures. NOTE: Device 1 (slave) is assumed already selected. */ bool IOATAController::ATAPISlaveExists( void ) { UInt8 scratchByte; UInt16 scratchWord; UInt32 dataCounter; UInt32 loopCounter; // The only option is to issue a command and see what happens. OSSynchronizeIO(); *_tfAltSDevCReg = 0x02; // disable interrupts //issue INDENTIFY PACKET DEVICE OSSynchronizeIO(); *_tfStatusCmdReg = 0xA1; // reading and disreguarding a register provides the required 400ns delay time. OSSynchronizeIO(); scratchByte = *_tfAltSDevCReg; OSSynchronizeIO(); scratchByte = *_tfAltSDevCReg; // if the device returns status 00h, we declare it not present. A real device would probably be // status BSY (80h) now. An incredibly fast device might be ready to move data and show DRQ. // However, by ATA standards, a not present device is required to return 00h. // Lucky break, no device and we figured it out in a hurry. if( (scratchByte == 0x00) ) { // enable device interrupt *_tfAltSDevCReg = 0x00; OSSynchronizeIO(); return false; } // OK we probably have a device now. We have to wait for drive to send data, and read it and clear it. // It is possible that the a misbehaving master has decided to respond to the command. So, we'll // break on error bit and say it's not a real slave should that happen. // take a leisurely approach, this will take a while. // give the device up to 10 seconds to respond with data. for( loopCounter = 0; loopCounter < 10000; loopCounter++) { OSSynchronizeIO(); scratchByte = *_tfAltSDevCReg; // If drive sets error, clear status and return false. It's probably a misbehaving master if( scratchByte & 0x01 ) break; // this means the drive is really there. Clear the data and return true. if( (scratchByte & 0x58) == 0x58) // RDY=1 DRQ=1 { OSSynchronizeIO(); scratchByte = *_tfStatusCmdReg; // clear pending interrupt state for( dataCounter = 0; dataCounter < 256; dataCounter++ ) { OSSynchronizeIO(); scratchWord = *_tfDataReg; } // enable device interrupt *_tfAltSDevCReg = 0x00; OSSynchronizeIO(); return true; } // OK, sleep for 10 ms and try again. IOSleep(10); } // In the ugly case, a drive set BSY, and didn't respond within 10 seconds with data. // Otherwise, this is the for loop terminating on seeing the error bit. // We'll read status and return false. OSSynchronizeIO(); scratchByte = *_tfStatusCmdReg; // clear pending interrupt state // enable device interrupt *_tfAltSDevCReg = 0x00; OSSynchronizeIO(); return false; } /*--------------------------------------------------------------------------- * scan the bus to see if devices are attached. The assumption is that the * devices are in a cleanly-reset state, showing their protocol signatures, * and the bus is properly wired with a pull down resistor on DD:7. * If your bus controller does not meet these conditions, you should override * and supply your own function which meets your specific hardware needs. * Your controller may or may not require a reset, or it may require more * thorough scanning, or additional configuration prior to looking for drives, * or it may aquire information from firmware indicating the devices attached. * This function should be self contained and not rely upon work loop or * or anything other than the register pointers being setup and enabled for access ---------------------------------------------------------------------------*/ UInt32 IOATAController::scanForDrives( void ) { UInt32 unitsFound = 0; UInt8 status = 0x00; // count total time spent searching max time allowed = 31 secs // it RARELY takes this long. UInt32 milsSpent = 0; // wait for a not busy bus // should be ready, but some devices may be slow to wake or spin up. for( int loopMils = 0; milsSpent < 100; loopMils++ ) { OSSynchronizeIO(); status = *_tfStatusCmdReg; if( (status & mATABusy) == 0x00 ) break; IOSleep( 10 ); milsSpent++; } // spun on BSY for too long, declare bus empty if( ! (milsSpent < 100) ) goto AllDone; // select each possible device on the bus, wait for BSY- // then check for protocol signatures. for( int unit = 0; unit < 2; unit++ ) { // wait for a not busy bus for( int loopMils = 0; milsSpent < 100; loopMils++ ) { // write the selection bit OSSynchronizeIO(); *_tfSDHReg = ( unit << 4 ); IODelay( 10 ); // typically, devices respond quickly to selection // but we'll give it a chance in case it is slow for some reason. status = *_tfStatusCmdReg; if( (status & mATABusy) == 0x00 ) { break; } IOSleep( 10 ); milsSpent++; } // spun on BSY too long, probably bad device if( ! (milsSpent < 100) ) goto AllDone; // check for ATAPI device signature first if ( ( *_tfCylLoReg == 0x14) && ( *_tfCylHiReg == 0xEB) ) { if( (unit == 1 ) && ( _devInfo[0].type == kATAPIDeviceType ) ) { // OK we've met the condition for an indeterminate bus, master is atapi and we see a slave atapi // signature. This is legal ATA, though we are fortunate enough that most devices don't do this. if( ATAPISlaveExists( ) != true ) { _devInfo[unit].type = kUnknownATADeviceType; goto AllDone; } } _devInfo[unit].type = kATAPIDeviceType; _devInfo[unit].packetSend = kATAPIDRQFast; // this is the safest default setting unitsFound++; } // check for ATA signature, including status RDY=1 and ERR=0 else if ( (*_tfCylLoReg == 0x00) && (*_tfCylHiReg == 0x00) && (*_tfSCountReg == 0x01) && (*_tfSectorNReg == 0x01) && ( (*_tfAltSDevCReg & 0x51) == 0x50) ) { _devInfo[unit].type = kATADeviceType; _devInfo[unit].packetSend = kATAPIUnknown; unitsFound++; }else{ _devInfo[unit].type = kUnknownATADeviceType; _devInfo[unit].packetSend = kATAPIUnknown; } }
  14. ar4er

    S-ATA & IOKitWait timeout...

    I'm find in IOATAFamily source timeout on 31sec i'm done it IOATAFamily.kext.zip
  15. ar4er

    S-ATA & IOKitWait timeout...

    I have the same problem on a PC in the signature has not been able to find solutions. Maybe someone has ideas?
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