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spakk

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  1. Like
    spakk got a reaction from AXAXAXAXAXAX in TASK FORCE - [AMD] to missing SSE4.1 Instruction set - older CPUs on macOS Sierra (10.12.x)   
    Insert the USB dummies into S/L/E and test again
    USB-Fix.zip
  2. Like
    spakk reacted to AXAXAXAXAXAX in TASK FORCE - [AMD] to missing SSE4.1 Instruction set - older CPUs on macOS Sierra (10.12.x)   
    I managed to boot into single user mode. Can I do something useful there?
  3. Like
    spakk reacted to Shaneee in A note about support questions.   
    Hello fellow AMD Users. Please make your own dedicated support topic in the following sub-forums. This way support topics are more arranged and easier to follow. This will also stop a question of yours being missed. If it's a question regarding the development of AMD on macOS then by all means post it in this forum.
     
    AMD 10.13 Installation Help - http://www.insanelymac.com/forum/forum/637-amd/
     
    AMD 10.13 Post Installation Help - http://www.insanelymac.com/forum/forum/641-amd/
     
    Let's keep the forum tidy
     
    Thanks,
    Shaneee
  4. Like
    spakk reacted to ydeng in TASK FORCE - [AMD] to missing SSE4.1 Instruction set - older CPUs on macOS Sierra (10.12.x)   
    Here you go.  May the source be with you.  Notice there is a bug fix for libuids86.
    A separate patch is needed for standalone libuids86 because that file is generated at compile time.
     
    Can not use intrinsics for this, circular logic. 
    patch.zip
  5. Like
    spakk reacted to ydeng in TASK FORCE - [AMD] to missing SSE4.1 Instruction set - older CPUs on macOS Sierra (10.12.x)   
    That means something else is wrong.
    My change handles invalid opcode traps for all sse4.1 instructions with emulations.
    All the emulations are tested against compiler intrinsics.
  6. Like
    spakk got a reaction from ydeng in TASK FORCE - [AMD] to missing SSE4.1 Instruction set - older CPUs on macOS Sierra (10.12.x)   
    same problem
     
    Edit:
    current bootloader version is better than previous version. The image shows another panic message from my last faulty kernel

  7. Like
    spakk reacted to AXAXAXAXAXAX in TASK FORCE - [AMD] to missing SSE4.1 Instruction set - older CPUs on macOS Sierra (10.12.x)   
    This issue will go away with Enoch r2902
  8. Like
    spakk reacted to ydeng in TASK FORCE - [AMD] to missing SSE4.1 Instruction set - older CPUs on macOS Sierra (10.12.x)   
    did not turn on user mode print.  How about this one?
     
    kernel binary deleted.  source code posted in this thread.
  9. Like
    spakk got a reaction from jmacie in 10.9.5 Pentium / Celeron / ATOM Kernel   
    read this thread in relation to FakeCPUID and suitable adjustments in the config.plist: www.insanelymac.com/forum/topic/303755-how-to-intel-pentium-g3xxx-and-celeron-g1xxx-haswell-works- with-speedstep yosemite-1010-and-mavericks-109 / page-3 may it can help
  10. Like
    spakk reacted to ydeng in TASK FORCE - [AMD] to missing SSE4.1 Instruction set - older CPUs on macOS Sierra (10.12.x)   
    I think I need to copyin/out between user space memory and kernel space.
    Thanks for the update.  This takes a lot of patience.  But we are getting there.
     
    Please try again.  Fixed a bunch of bugs.
  11. Like
  12. Like
    spakk reacted to AXAXAXAXAXAX in TASK FORCE - [AMD] to missing SSE4.1 Instruction set - older CPUs on macOS Sierra (10.12.x)   
    the first kernel with Enoch r2902:

     
    the latest kernel:

    and it gives a lot of messages of "mnemonic: 422" and things like "0x103777000     uuid = <13d3b12d-3c1c-3f22-8735-f8ec784714f4>"  before  and says initproc exited -- no exit reason available -- (signal 6, exit status 0 )
  13. Like
    spakk got a reaction from ITzTravelInTime in TASK FORCE - [AMD] to missing SSE4.1 Instruction set - older CPUs on macOS Sierra (10.12.x)   
    You can not compare the FX-6300 or the FX8350 which that has the CPU Features SSE4.1 and SSE4.2 with a simple CPU such as Phenom II X6 or AMD Athlon X2 4050. Therefore, check the kernel only with a CPU without SSE4. 1 / SSE4.2, so we can see if the changes work, which we all hope.
    I can not check ydeng kernel until the end of next week. When I'm home
  14. Like
    spakk reacted to ydeng in TASK FORCE - [AMD] to missing SSE4.1 Instruction set - older CPUs on macOS Sierra (10.12.x)   
    Forgot to turn sse4.1 emulation on in kernel trap.  Please try this one.
    This one comes from here https://github.com/Shaneee92/SierraAMD-XNU/blob/master/osfmk/i386/trap.c#L802.  The memory address pointed to by instruction counter does not exist!
  15. Like
    spakk reacted to ydeng in TASK FORCE - [AMD] to missing SSE4.1 Instruction set - older CPUs on macOS Sierra (10.12.x)   
    Found an online assembler to generate opcode and use _load_xmm from opemu to load data to registers.
    Finally extractps to gives correct result.  Need to test  pextrb, pextrw, pextrd and pextrw.  These things have
    general register or memory address as dest, different from the xmm dest in existing code.  After that, things
    are down hill.  Almost there!
  16. Like
    spakk reacted to Shaneee in AMD High Sierra Kernel Release and Testing   
    I got to the desktop once in safe boot. Now facing issues with IOConsoleUsers. I think it's a mistake in the kernel. I know it is possible though.
     
    Edit: Proof of running system. Still trying to get GPU working so I can test kernel before sharing Shouldn't be long.
     

  17. Like
  18. Like
    spakk got a reaction from Shaneee in TASK FORCE - [AMD] to missing SSE4.1 Instruction set - older CPUs on macOS Sierra (10.12.x)   
    here are my last two Test-kernels
    1. with SSEPlus
    2. with modified libudis and Sinetek OPEMU III
    AMD-10.12.6_SSEPlus.zip
    AMD-10.12.6-mod-Libudis.zip
  19. Like
    spakk got a reaction from Shaneee in TASK FORCE - [AMD] to missing SSE4.1 Instruction set - older CPUs on macOS Sierra (10.12.x)   
    here are my last two Test-kernels
    1. with SSEPlus
    2. with modified libudis and Sinetek OPEMU III
    AMD-10.12.6_SSEPlus.zip
    AMD-10.12.6-mod-Libudis.zip
  20. Like
    spakk reacted to ydeng in TASK FORCE - [AMD] to missing SSE4.1 Instruction set - older CPUs on macOS Sierra (10.12.x)   
    I cannot tell why init got killed.
    The corecryto one says the kext does not pass POST test, which means math error.
    Apparently there are different versions of functions with different instruction sets.  avx2 functions should not be called if not available.
     
    Have you tried to build the kernel with sse4.1 off?
     
    Here's an implementation of corecrypto, it is worth a try.  https://github.com/samdmarshall/apple-corecrypto 
     
    If opemu fails, it prints "OPEMU: instruction nmenic" , like the screen shots in AkimoA's post.
     
    https://github.com/Shaneee92/SierraAMD-XNU/blob/master/osfmk/OPEMU/opemu.c#L104
  21. Like
    spakk reacted to ydeng in TASK FORCE - [AMD] to missing SSE4.1 Instruction set - older CPUs on macOS Sierra (10.12.x)   
    This is only useful for committing emulation results of pextr and ptest.
    I have coded all sse4.1 emulations.  Now I need to test them and integrate with opemu.
  22. Like
    spakk reacted to ydeng in TASK FORCE - [AMD] to missing SSE4.1 Instruction set - older CPUs on macOS Sierra (10.12.x)   
    rflags are restored here https://github.com/Shaneee92/SierraAMD-XNU/blob/master/osfmk/x86_64/idt64.s#L539 from  x86_saved_state_t .
  23. Like
    spakk reacted to ydeng in TASK FORCE - [AMD] to missing SSE4.1 Instruction set - older CPUs on macOS Sierra (10.12.x)   
    You hit pextrq twice which is sse4.1.  These extract instructions are different because the destination is a regular register or memory.  The existing opemu code expect xmm registers as destination.  That's why fisttp emulation uses x87 instructions to modify memory location directly.  sse4.2 emulation writes to state64 to write registers.  Anyone knows x86 flags are restored when trap handler returns?  ptest instructions only changes the flags.  I could get the correct behavior by pushf/popf instuctions but if the flags get restored somewhere else.  These will have not effect.  Anyway to test opemu without working AMD Phenom system?  I have most of the emulation written.  Need to test against intrinsics first.  For pextr and ptest instructions, need to actually put this opemu.  Maybe I need to write a proper integration test.
    It is futile without proper sse4.1 emulation.  SSE4.1 is turned on in Xcode by default.  User programs will have sse4.1 instructions.
    You can verify this by the following command.
     
     
     
    gcc -dM -E - < /dev/null | grep SSE
    #define __SSE2_MATH__ 1
    #define __SSE2__ 1
    #define __SSE3__ 1
    #define __SSE4_1__ 1
    #define __SSE_MATH__ 1
    #define __SSE__ 1
    #define __SSSE3__ 1
  24. Like
    spakk got a reaction from carlo_67 in Richiesta DSDT PER ACER E1-570G   
    provare ad utilizzare la DSDT patch. installare il MacIASL.app (RehabMan-MaciASL-2017-0117) ==> https://bitbucket.org/RehabMan/os-x-maciasl-patchmatic/downloads/
     
    e le DSDT patch di Rehabman: https://github.com/RehabMan/Laptop-DSDT-Patch
     
    per risolvere questi deficit (solo un esempio):
    batteria
    HD4000 patch
    Backlight
    etc....
  25. Like
    spakk reacted to Gigamaxx in [RYZEN] macOS 10.12.x (Sierra) Kernel Research&Development Thread   
    Anytime, my friend, it will be nice to have a 12.6 kernel. A lot of AMD graphics card support was added in 12.6.
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