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About apfelnico

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    InsanelyMac Protégé

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  1. apfelnico

    Clover General discussion

    Create a clone with "Carbon Copy Cloner" on a new disk with HFS +. You can then clone back to the original drive (after reformatting in also HFS +).
  2. apfelnico

    Clover General discussion

    What is the difference between "DSDT" and "RenameDevices" in the ACPI section? In both cases, can I do the same?
  3. That should work, I also have such a system.
  4. OK, I have updated: Please note, these patches are for the ASUS PRIME X299 DELUXE motherboard. DsdtPatchesAsusPrimeX299DELUXE.txt
  5. Patch DSDT, second part I have created a DsdtPatchesAsusPrimeX299.txt to patch the DSDT at once. All devices installed in the board are included, including the Darwin Check. Clover ACPI patches (except for "PC00-> PCI0") are no longer needed. In the SSDT, you only define devices that are additionally available (graphics card, Thunderbolt card, Wifi / Bluetooth combo etc.). how is it done? Open a copy of the DSDT (EFI / CLOVER / ACPI / origin) with MaciASL, select "Patch" and insert the contents of "DsdtPatchesAsusPrimeX299.txt". Choose "Apply", then "Close" and save your new DSDT to EFI / CLOVER / ACPI / patched. That's it. Edit: How can I convert completely PC00 PC0 to PCI0? Edit2: If there is something to improve, then do it. DsdtPatchesAsusPrimeX299.txt
  6. Your DSDT is called DSDT.aml and in Clover in the ACPI section is the DSDT also named? And the DSDT is in EFI/CLOVER/ACPI/patched?
  7. Then, of course, do not use a Clover ACPI patch, otherwise it would also be changed in your SSDT GPRW in UPRW. Change it directly in the DSDT via search and replace
  8. Your code: Device (XHC3) { Name (_ADR, Zero) // _ADR: Address Name (_PRW, Package (0x02) // _PRW: Power Resources for Wake { 0x6D, Zero }) } Should not it possibly mean: Device (XHC3) { Name (_ADR, Zero) // _ADR: Address Method (_PRW, 0, NotSerialized) // _PRW: Power Resources for Wake { Return (GPRW (0x6D, 0x00)) } }
  9. Today we want to dedicate ourselves to the DSDT of the X299 system. Why should we edit the DSDT? There are at least four good reasons for this. 1. CPU 2. SMBus 3. PEGP 4. RP02/Ethernet Is it not enough to use the ACPI patches from Clover and additional SSDT's? This is basically a good idea and should be maintained. I think it makes sense to make only the few changes in the DSDT, which are difficult or impossible to realize in other ways. The problem with the DSDT is that when something elementary is changed in the BIOS, the DSDT changes on our complex X299 system. Likewise with a BIOS update. That's why we should not invest much effort into a perfect DSDT. But these little changes will make our system better and it can be repeated quickly. 1. What's wrong with the CPU? If we look at our system with IORegistryExplorer, then we see (example i9-7900X) a weird distribution of CPU cores. These are not linear in a row. If I use Piker-Alpha's script (ssdtPRGen.sh), then it assumes a linear count and the resulting SSDT does not match the actual distribution of the cores. This can be fixed easily and looks more beautiful in IORegistryExplorer. We open the extracted DSDT (in the Clover boot menu press F4, now the original DSDT is in EFI/CLOVER/ACPI/origin) with MaciASL and we take a closer look at the device (SCK0). Here we delete the unused CPxx's, which we can clearly identify by means of IORegistryExplorer. With this we adapt the generic DSDT to our specific processor. If we click on "Compile" now, we get some error messages. Absolutely clear, some of the "Notify (\ _SB.SCK0.CPxx, 0x83)" HLVT method now go to nowhere. We simply delete these now redundant lines. 2. There is a Device SMBS in PC00. Unfortunately, in the same region (PC00) there is a device SBUS, which points exactly to the same position "Name (_ADR, 0x001F0004)". We can fix that very easily. Press "comand + f" (Find) and enter "SBUS". There are five entries. We look at the first entry and change "Device" to "Scope" and delete the line "Name (_ADR, 0x001F0004) // _ADR: Address". Now we search (comand + f) for "SMBS". We change the name of the device SMBS to SBUS. 3. There are so-called PEGPs for the PCIe slots BR1A, BR2A, BR3A and BR3D. We would like to use these instead of the SL01, SL05, SL09 and SL0C. A PEGP has already integrated Power Resources for Wake. The problem is that, for example, a graphics card integrates with the first device (SL01) instead of the more appropriate PEGP. The solution is quite simple, we delete the devices SL01, SL05, SL09 and SL0C from the corresponding BR1A, BR2A, BR3A and BR3D. This will get our graphics and Thunderbolt cards into the correct slots. Subsequent renaming in, for example, "GFX0" can be done via an SSDT, if necessary. 4. It looks similar with the Intel I211VA Ethernet. It docks on the device "D0A4", but could be attached to the much more suitable "PXSX". The latter (which houses every RPxx) also uses Power Resources for Wake. Again, just remove the device D0A4 completely. Now put this DSDT in EFI/CLOVER/ACPI/patched and restart. Of course it is necessary to correct the new paths to the devices in the SSDT's accordingly.
  10. apfelnico

    Clover General discussion

    Nope. My MacPro4.1 (Firmware Upgrade to 5.1, macOS.10.12) does the same, white logo on a black background.
  11. @deckardlives - use only the "AptioMemoryFix.efi", remove the "OsxAptioFix2Drv.efi" - use a current "Clover Configurator" ("Vibrant Edition" instead of "Classic Edition") - remove the "Slide = 0" entry - select checkbox ACPI / SSDT / Generate Options -> "PluginType" - remove "npci = 0x3000" - Update the "USB Port Limit Patch" for 10.13.4
  12. apfelnico

    AMD Radeon RX Vega 64

    Sorry, but that's not helpful. Did not you read this thread? There are no answers to my questions. My two cards are also running. Also I have an SSDT to it. Metal is succinctly "supported". But that is no support for the current Metal2. Edit: Japura, Iriri or Kamarang? Scope (\_SB.PCI2.BR2A.GFX0) { OperationRegion (PCIS, PCI_Config, Zero, 0x0100) Field (PCIS, AnyAcc, NoLock, Preserve) { PVID, 16, PDID, 16 } Method (_PRW, 0, NotSerialized) // _PRW: Power Resources for Wake { Return (GPRW (0x69, 0x04)) } Device (GFXA) { Name (_ADR, Zero) // _ADR: Address Device (GFX0) { Name (_ADR, Zero) // _ADR: Address OperationRegion (PCIB, PCI_Config, Zero, 0x0100) Field (PCIB, AnyAcc, NoLock, Preserve) { Offset (0x10), BAR0, 32, BAR1, 32, BAR2, 64, BAR4, 32, BAR5, 32 } Method (_INI, 0, NotSerialized) // _INI: Initialize { If (LEqual (BAR5, Zero)) { Store (BAR2, Local0) } Else { Store (BAR5, Local0) } OperationRegion (GREG, SystemMemory, And (Local0, 0xFFFFFFF0), 0x8000) Field (GREG, AnyAcc, NoLock, Preserve) { Offset (0x6800), GENA, 32, GCTL, 32, LTBC, 32, Offset (0x6810), PSBL, 32, SSBL, 32, PTCH, 32, PSBH, 32, SSBH, 32, Offset (0x6848), FCTL, 32, Offset (0x6EF8), MUMD, 32 } Store (Zero, FCTL) Store (Zero, PSBH) Store (Zero, SSBH) Store (Zero, LTBC) Store (One, GENA) Store (Zero, MUMD) } Method (_DSM, 4, NotSerialized) // _DSM: Device-Specific Method { Store (Package (0x14) { "AAPL,slot-name", Buffer (0x07) { "Slot-1" }, "CFG,CFG_USE_AGDC", Buffer (One) { 0x00 }, "PP,PP_DisableAutoWattman", Buffer (One) { 0x00 }, "@0,AAPL,boot-display", Buffer (One) { 0x00 }, "@0,name", Buffer (0x0D) { "ATY,Kamarang" }, "@1,name", Buffer (0x0D) { "ATY,Kamarang" }, "@2,name", Buffer (0x0D) { "ATY,Kamarang" }, "@3,name", Buffer (0x0D) { "ATY,Kamarang" }, "model", Buffer (0x13) { "AMD Radeon Vega 64" }, "hda-gfx", Buffer (0x0A) { "onboard-2" } }, Local0) DTGP (Arg0, Arg1, Arg2, Arg3, RefOf (Local0)) Return (Local0) } } Device (HDAU) { Name (_ADR, One) // _ADR: Address Method (_DSM, 4, NotSerialized) // _DSM: Device-Specific Method { Store (Package (0x0C) { "built-in", Buffer (One) { 0x00 }, "AAPL,slot-name", Buffer (0x07) { "Slot-1" }, "layout-id", Buffer (0x04) { 0x01, 0x00, 0x00, 0x00 }, "name", Buffer (0x0D) { "AMD HD-Audio" }, "model", Buffer (0x0D) { "AMD HD-Audio" }, "hda-gfx", Buffer (0x0A) { "onboard-2" } }, Local0) DTGP (Arg0, Arg1, Arg2, Arg3, RefOf (Local0)) Return (Local0) } } } }
  13. apfelnico

    AMD Radeon RX Vega 64

    What is the correct name of the framebuffer from the following video card: AMD Radeon RX Vega 64? How do I get the latest Metal Support (Supports, Function set macOS GPUFamily1 v3)? macOS 10.13.1
  14. No special AppleALC patches are required. • CAVS -> HDEF is the first step (Clover ACPI patch (or directly in the DSDT)) • The second is is a big change: PC00 -> PCI0 (and PC01->PCI1 and so on) • And now set the layout ID to "7" • optional you can describe the device "HDEF" with a "_DSM method"
  15. Of course that is possible (Lilu+AppleALC+DSDT/SSDT):