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Would be a great idea to update it. If anyone have the complete knowledge about Clover, we can create a "second" Wiki here in IM. What do you think?

k replace DSDT DSDT.aml.zip and replace UsbInjectall too, use this version USBInjectAll.kext.zip

Guys this package: HWSensors-3_r118.pkg.zip contains an improved version of HWMonitorSMC2.app: - new SMART core made in swift (world first?) that can read s.m.a.r.t. attributes from ATA and finally from NVMe disks - on right click over any rows (not all but most of it) show detailed info about: CPU (brand string, system usage) RAM S.M.A.R.T. attributes with detailed informations about your disks (BSD name, vendor name, serial etc.), Battery (laptops) with capacity, max capacity, cycle count, temperature etc. (anyway not with VoodooBattery but works with Rehabman's kext or in a real mac) SYSTEM with info about processes, threads and more. POWER (if supported), with info about cpu limit, thermal level etc. Please show a screen shot about S.M.A.R.T on SATA and NVMe because I worked hard on this. Big thanks goes to @fabiosun for tens and tens of tests made who helped me a lot debugging smart on mechanical and nvme drives (which I did not own). Thanks goes also to SystemKit.framenwork, now embedded into the project and smartmontools for the reverse engineering that make possible acquire smart datas for NVMe drives on macOS! TODO: - do a better layout of the datas showned when you right click fixed - find gpu information somehow @Slice, soon (tonight) I'll commit those changes, just waiting some tests here EDIT commited

the sb0570 is the audigy se which is not compatible with this driver, you have to own sound cards based on the 10k1 or 10k2 or similar chipsets to work with this driver, yours uses a totally different architecture, but if you want to test it, compatible sound cards like sopund blaster live are cheap to get and compatible, for pcie you can use the sound blaster audigy rx

Hi ITzTravelInTime. I am new to hackintosh world. I have a Sound Blaster Audigy SE SB0570. I tried your driver and it is not working, as expected. I would like to help you in some way, I am a developer. Please fell free to ask me for tests or anything. Thanks for your effort!

If Clover is going to GitHub, having a GitHub wiki would be easier for people to update, and translate.

I have 3 Radeon HD 5450 testing in HighSierra and its working like Sierra no difference here

-Donations with PayPal https://tinyurl.com/r2bvzm7 -Donations with Bitcoin 33HeGCuCSh4tUBqdYkQqKpSDa1E7WeAJQ3 -Donations with PicPay @danielnmaldonado Nehalem, SandyBridge, IvyBridge, Haswell, Broadwell https://www.olarila.com/topic/5794-guide-install-macos-with-olarila-image-step-by-step-install-and-post-install-windows-or-mac/ Skylake, Kabylake and Coffeelake is here https://www.olarila.com/topic/5794-guide-install-macos-with-olarila-image-step-by-step-install-and-post-install-windows-or-mac/ Install MacOS with Olarila Image, Step by Step, Install and Post Install https://www.olarila.com/topic/5794-guide-install-macos-with-olarila-image-step-by-step-install-and-post-install-windows-or-mac/ First... ***Update bios to last available version!*** If you need a full patched DSDT... -Extract tables with F4 key in Clover boot screen! -Run it and send me files! RunMe.app Installation --Create a bootable copy of macOS Sierra / High Sierra / Mojave https://github.com/chris1111/Create-Install-Media/releases --Install Clover in USB stick https://github.com/CloverHackyColor/CloverBootloader/releases --Replace with my Clover folder https://tinyurl.com/ybr968w3 --Install Sierra/High Sierra and boot into system! Post Installation --Install Clover and replace with my folder https://tinyurl.com/ybr968w3 --Reboot and activate video! Bingo! Now you need a fine tune! DSDT time! --DSDT Patches -FIX ERRORS AND WARNINGS -HPET -SATA -DMAC -SLPB -DARWIN -LPC -XHCI -PLUGIN TYPE -XXXX to HDEF -HDEF -RTC -IRQs -SBUS -BUS1 -MCHC -ALS0 -SHUTDOWN -LAN -USBX -PMCR -EC -PNLF -HDMI --Power Management - 1 Generation Intel Processors, use Generate P and C States in config.plist - 2 and 3 Generations Intel Processors, Generate SSDT with Piker script and drop CpuPm and Cpu0Ist SSDTs ssdtPRGen.command.zip Credits-https://github.com/Piker-Alpha/ssdtPRGen.sh - 4 Generation+ Intel Processors, use PluginType=1 in DSDT, SSDT or Clover config.plist for check Power, Frequency, Temperature and Utilization, use it Install Intel Power Gadget.pkg.zip --Brightness Install .app, select the required permission and reboot. Work in F1 / F2 keys! NativeDisplayBrightness.app.zip https://github.com/Bensge/NativeDisplayBrightness/releases *in some cases .app don't work, check patches in config.plist inside Clover folder Post Install --Clover https://sourceforge.net/projects/cloverefiboot/files/Installer/ --AUDIO Use DSDT + AppleAlc --install Lan driver by Mieze -Atheros http://www.insanelymac.com/forum/files/file/313-atherose2200ethernet/ -Intel http://www.insanelymac.com/forum/files/file/396-intelmausiethernet/ -Realtek http://www.insanelymac.com/forum/files/file/88-realtekrtl8111-binary/ --Links -FakeSMC https://bitbucket.org/RehabMan/os-x-fakesmc-kozlek -Audio https://github.com/vit9696/AppleALC http://www.insanelymac.com/forum/topic/314406-voodoohda-289/ -USB https://bitbucket.org/RehabMan/os-x-usb-inject-all/downloads It's time to Rock -Credits and thanks to the old and new people in the community who developed patches, kexts and bootloaders! Apple, Slice, Kabyl, usr-sse2, jadran, Blackosx, dmazar, STLVNUB, pcj, apianti, JrCs, pene, FrodoKenny, skoczy, ycr.ru, Oscar09, xsmile, SoThOr, RehabMan, Download-Fritz, Zenit432, cecekpawon, Intel, Oracle, Chameleon Team, crazybirdy, Mieze, Mirone, Oldnapalm, netkas, Elconiglio, artut-pt, ErmaC, Pavo, Toleda, Master Chief and family, bcc9, The King, PMheart, Sherlocks, Micky1979, vit9696, vandroiy2013, Voodoo Team, Pike R. Alpha, lvs1974, Austere.J, CVad and many, many, many others! We're all here to have fun and learn from each other!

Manually install Clover for UEFI booting and configure boot priority with EasyUEFI in Windows This tutorial will show how to manually install Clover in the EFI system partition of a pre-existing install of UEFI Windows. In the process, you will also learn how to mount the EFI partition and add Clover as a UEFI boot option (using the EasyUEFI program) in Windows. Prerequisites 1. CloverISO from Sourceforge. 2. 7-Zip for Windows 3. EasyUEFI 4. Existing UEFI install of Windows X64 (7,8,8.1 or 10) Obtain Clover 1. Download the CloverISO.tar.lzma file from Sourceforge and open the file with 7-Zip. 2. Extract the Clover subfolder to your \Downloads with 7-Zip. 3. Copy the Clover folder by right clicking on its icon in Windows File Explorer. Mounting the EFI System Partition and installing Clover 1. Open an administrative command prompt by clicking the Windows start button, typing cmd and right clicking on the search result as shown below... 2. Type the following commands, followed by <Enter> after each line: diskpart list disk select disk # (where # is the disk number of the disk with UEFI Windows) list partition select partition x (where x is the partition number of the EFI system partition. By default, it is usually the 100MB second partition) assign letter=s exit 3. Open Windows Task Manager as administrator by clicking the Windows start button, typing taskmgr and right clicking on the search result as shown below... 4. Click Run new task 5. Click Browse and in the Browse window, navigate to the EFI folder in the System Partition (which is mapped to drive S:) and also select "All files" from the drop down menu... 6. Right click inside the EFI folder to "paste" the Clover folder we downloaded earlier. If necessary, you can make edits to Clover's default config.plist with Wordpad or add OSX kexts like FakeSMC into the \kexts\other folder while still in the Task Manager browse window. For UEFI booting into OSX, you will most likely need the OsxAptioFix2Drv-64.efi or OsxAptioFixDrv-64.efi driver in EFI\CLOVER\drivers64UEFI (copy from the \CLOVER\drivers-Off\drivers64UEFI folder). 7. Quit Task Manager. Add Clover as a UEFI Boot Option using the EasyUEFI Program 1. Open EasyUEFI and click on the small icon with the plus sign (second from top) to add a new entry. 2. In the Create Boot Entry Window, choose "Linux or other OS" as the entry type, click to select the EFI System partition as the target and browse to the CLOVERX64.efi file (file path \EFI\CLOVER\CLOVERX64.efi) as shown below... 3. Type Clover in the Description field then the OK button. 4. You will now see the new Clover entry on the main GUI of EasyUEFI. Click on the entry and then click the small up arrow icon to move Clover to the top so it will get priority over the Windows Boot Manager on boot up. Note on this screen, you can also delete/edit/disable boot entries or move them down the boot order. 5. Click the power menu and select reboot to restart your system (use your system's boot device selection key to choose the drive with CLOVER installed if necessary eg F12 for Gigabyte motherboards, F8 for ASUS motherboards, F11 for ASrock motherboards) ---> will now be presented with the Clover Main Menu GUI to boot Windows (or OSX). Enjoy and Good Hack !

Hi there, time for my first guide after asking so many things Updated for newer Clover versions and with additional instructions for more apps: gdisk and RU. So what may be overlooked sometimes in the whole boot loader discussion is the ability of UEFI to do more than just loading an OS. This is why I see ".efi" files as "apps" because in fact they just are, built on a special kind of API: UEFI. So, you can actually do stuff like editing, diagnosing, testing certain stuff at the lowest possible system level without booting to any OS. DISCLAIMER: Use this guide at your own risk! For educational purposes only! Should do not any harm, but remember you are dealing with rather low level stuff. But at least for me everything went flawless. Prerequisites: Working clover installation Clover Configurator or some app to edit the config.plist 1) Memtest This is how to install the UEFI version of Memtest with Clover: Download memtest, I used this link: Image for creating boot-able USB Drive Open the archive by double clicking on it. Mount the file memtest86-usb.img within by double clicking again. Now, you should see a folder named EFI in this volume, containing a folder BOOT. Open it. The files containing it are the actual app, in 32 and 64 bit versions. Think in almost all cases we want to use the 64 bit version. Now, mount your EFI partition, using Clover configurator. Create a folder named MemTest86 in the EFI folder on your main drive. Copy all files in the EFI/BOOT folder from the mounted image to your newly created folder. That ends the basic setup! Now, we add the correct Menu entry to the clover boot menu, so that we can actually start this app. Get into clover configurator, open your standard config.plist from your boot drive and go to the GUI section. Under "Custom Entries", add an entry like this: Please note while the path you enter is not case sensitive, you must make sure you use the backslash "\" for entering paths, and not a slash. So basically what we do is tell clover where it can find the app, give it a name, and tell clover it is a "Windows" app. Note: with older Clover versions we had to set this to "Linux", but for now "Windows" is the setting that works. If you prefer to do a manual config, add this entry to your config.plist, under GUI/Custom/Entries: <dict> <key>CustomLogo</key> <true/> <key>Disabled</key> <false/> <key>FullTitle</key> <string>MemTest86</string> <key>Hidden</key> <false/> <key>Ignore</key> <false/> <key>Image</key> <string>\EFI\CLOVER\themes\Icons\os_mint.png</string> <key>Path</key> <string>\EFI\MemTest86\BOOTX64.efi</string> <key>Type</key> <string>Windows</string> <key>VolumeType</key> <string>Internal</string> </dict> Now, save and reboot and you should see the newly created entry. Note that I also used a custom Icon - this is optional - in case you don't you will just see a generic windows icon instead: And this is how it looks like: PS: also noticeably faster and you get also more features with this version than with the older version, for example it does now write a log file. For more Information, see: http://www.passmark.com/forum/showthread.php?4315-Memtest86-Version-5-Beta-%28Pure-UEFI%29 2) gdisk Another app you can use is the UEFI version of gdisk (aka GPT fdisk), which you can use to edit and change your partitions. Warning! Install and use this app at your own risk! If you do something wrong here you might nuke your drive(s), so only use that if you know what you are doing. This is how to do it (even easier): Download here: https://sourceforge.net/projects/gptfdisk/files/gptfdisk/1.0.1/gdisk-binaries/gdisk-efi-1.0.1.zip/download Mount your EFI partition Unzip the file and copy the resulting folder to your EFI Folder, so your path goes like this "/Volumes/EFI/EFI/gdisk-efi" Get into clover configurator, open your standard config.plist from your boot drive and go to the GUI section. Add an entry like this: If you prefer to do a manual config, add this entry to your config.plist, under GUI/Custom/Entries: <dict> <key>CustomLogo</key> <false/> <key>Disabled</key> <false/> <key>FullTitle</key> <string>GDisk</string> <key>Hidden</key> <false/> <key>Ignore</key> <false/> <key>Image</key> <string></string> <key>Path</key> <string>\EFI\gdisk-efi\gdisk_x64.efi</string> <key>Type</key> <string>Windows</string> <key>VolumeType</key> <string>Internal</string> </dict> When everything went OK you should see this after selecting the respective entry in Clover: 3) RU I recently found one more app that might be interesting to some, and thats "Read Universal" or in short "RU". This is a tool that enables you to debug your BIOS and read (and modify!) every imaginable data, including UEFI variables, ACPI Tables etc. Warning, again! I think blindly messing around with this app is even more dangerous, but on the other hand it gives you access to a lot of potentially interesting stuff. Download here: http://ruexe.blogspot.de/ The next steps are basically the same as above so make a folder in your EFI partition, copy the .EFI files and make another custom entry in your config.plist Here are some screens: So this is what you also can do with UEFI and clover. I am curious which other useful applications might exist! Anybody who knows, maybe post it here?

Good news and Bad news. DP audio working, Shutdown working. But No more PCI info and internal Audio. TT

Hi, No working. I see Whatevergreen and it work for Dp audio but my screen has one more fake screen. So I delete Whatevergreen. And works fine with monitors but no Audio. No shutdown work still. https://www108.zippyshare.com/v/OTtGIVcF/file.html

hi, again! Here is the link https://www66.zippyshare.com/v/3llvvvDy/file.html

Welcome, boca! Enjoy!

Excellent, I will check them out. Thank you for everything Maldon!

in my very old topic have some useful links https://www.insanelymac.com/forum/forums/topic/235523-dsdt-auto-patcher/

Of course that worked... Maldon touched it!!!!! Thank you very much Maldon! Question on the DSDT: If I change/upgrade my video card or CPU does the DSDT have to be changed?

Posta se pui la cartella Clover funzionante quella con impostazioni migliori al momento x il tuo HW ..... Al notebook della mia ragazza la Ethernet funziona solo se installo in S\L\E FakePCIID_BCM57XX_as_BCM57765.kext con lilu e FakePCIID in other in Clover .... Puoi provare cosi , non si sa mai ....

Oh I see. Well, thanks for the reply. I have a P8Z77-V PRO motherboard and the Realtek onboard is not working, so I bought a cheap sb0570. But I will try to change for a compatible one, like the pcie SB Audigy Rx.

Are you booting with UEFI or Legacy? I am guessing that the boot sequence changed from first Windows drive to first Clover drive. You need to get to the BIOS and update the boot priority. Another way to do this is to update Clover to autoboot to Windows as default. You could use Clover Configurator to do that. If you are going down this path, select the System Reserved partition as boot on MBR, not the partition with Windows. Hope it helps.

Sicuro di avere messo entrambi i kext fakepciid?

Thanks Matthew82 ! : After a week of severals issues : 1/ Bios recommended parameters + Pci devices set as Legacy 2/ I added arbitrary lines on my config.plist 3/ I created my own SSDT What is working : - Hot plug USB or HDD pluged on USB 3.1 or USB C : eject and re-plug OK Not working ( working in Windows 10 ) - Display sreen connected on USB C

Sposta pure i kext in 10.13 poi invece di un riavvio spegni il pc e avvialo. Controlla tutto, la rete dovrebbe esserci Per l’audio devi selezionare l’uscita giusta in preferenze di sistema probabilmente.

Devi scegliere sempre quella col nome del tuo hdd. Gli altri li faremo sparire. Finché farai il boot dalla penna avrai sempre quello install sierra

you're most welcome i would really like if all the inputs and outputs working without any problem

Hmmm that's a better way!

Hello, what about USB3? I have Z620 but have errors only with USB.

Mio fratello ha una Mobo praticamente identica con quello che ti ho passato dovrebbe funzionarti tutto. ti mancherà fare un ssdt per il pm

you should delete voodoohda.kext and applehdadisabler.kext as youve got applealc.kext which is the best option. also the ioreg you sent was without voodoo patches. personally i think you should do a fresh install and keep the clover setup. as youve got a lot of stuff you shouldnt have.

Salut Tout va bien chez moi

Andiamo per passi: - Kext. Primo, decidi dove metterli, o other o 10.13 non in entrambi. Secondo, non si mettono a caso; di quelli che hai messo in other l'unico utile è FakeSMC gli altri sono inutili se non nocivi. Per la rete non ne hai brincato uno, tu hai una Broadcom BCM57781, voodoops2 è per per laptop, usbinjectall probabilmente inutile. - Config. Questo deve rispecchiare l'hardware metterne uno a caso non è buona cosa. il tuo per esempio ha un SMBIOS (incompleto) per Haswell Imac14,2 quando quello corretto è 13,2. Continuando, sostituisci il config con quello allegato e d'ora in poi usa/modifica sempre questo. Cancella i kext in other e in 10.13 aggiungi al FakeSMC quelli contenuti in nello zip allegato (compresa la cartella Post-Install). Riavvia il pc e alla schermata di Clover premi un paio di volte F4 e attendi una 30ina di secondi prima di fare il boot, tu non vedrai accadere niente ma questa operazione estrae le tabelle ACPI originali( DSDT e SSDT) che troverai nella cartella EFI/CLOVER/ACPI/origin che devi postare zippata. Controlla che sia popolata di file altrimenti devi ripetere l'operazione Kext in 10.13.zip config.plist 2.zip

Prova le Kext in Clover mettile SOLO in Other x ora , e lascia solo quelle essenziali AGGIORNATE x 10.13.4 , puoi specificare se hai installato in UEFI o Legacy HFS o APFS??? E se usi Nvidia o VGA integrata nella CPU Intel ... CLOVER Prova.zip

Last login: Sun Apr 15 09:42:01 on console iMac-di-Fabio:~ fabio$ diskutil list /dev/disk0 (internal, physical): #: TYPE NAME SIZE IDENTIFIER 0: GUID_partition_scheme *250.1 GB disk0 1: EFI EFI 209.7 MB disk0s1 2: Apple_HFS macOS Sierra 249.2 GB disk0s2 3: Apple_Boot Recovery HD 650.0 MB disk0s3 /dev/disk1 (internal, physical): #: TYPE NAME SIZE IDENTIFIER 0: GUID_partition_scheme *120.0 GB disk1 1: EFI EFI 209.7 MB disk1s1 2: Apple_APFS Container disk2 119.8 GB disk1s2 /dev/disk2 (synthesized): #: TYPE NAME SIZE IDENTIFIER 0: APFS Container Scheme - +119.8 GB disk2 Physical Store disk1s2 1: APFS Volume macOS High Sierra 97.6 GB disk2s1 2: APFS Volume Preboot 21.9 MB disk2s2 3: APFS Volume Recovery 517.8 MB disk2s3 4: APFS Volume VM 20.5 KB disk2s4 iMac-di-Fabio:~ fabio$ /Users/fabio/Downloads/smarter disk0 Medium Type: HDD Protocol: SATA Location: Internal Temperature: 55834574872C° S.M.A.R.T. check disk0: IOCreatePlugInInterfaceForService() failed with error "IOKit Common: no resource" S.M.A.R.T. status: not capable S.M.A.R.T. data (512 bytes): UInt8 smartdata[] = { 0x0A, 0x00, 0x01, 0x0F, 0x00, 0x6D, 0x63, 0x9D, 0x6E, 0x4F, 0x01, 0x00, 0x00, 0x00, 0x03, 0x03, 0x00, 0x62, 0x61, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x32, 0x00, 0x5D, 0x5D, 0x26, 0x1D, 0x00, 0x00, 0x00, 0x00, 0x00, 0x05, 0x33, 0x00, 0x64, 0x64, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x07, 0x0F, 0x00, 0x54, 0x3C, 0x42, 0x9D, 0x32, 0x0E, 0x00, 0x00, 0x00, 0x09, 0x32, 0x00, 0x5F, 0x5F, 0x28, 0x12, 0x00, 0x00, 0x00, 0x00, 0x00, 0x0A, 0x13, 0x00, 0x64, 0x63, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x0C, 0x32, 0x00, 0x60, 0x60, 0x78, 0x11, 0x00, 0x00, 0x00, 0x00, 0x00, 0xBB, 0x32, 0x00, 0x01, 0x01, 0x68, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0xBD, 0x3A, 0x00, 0x60, 0x60, 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xBE, 0x22, 0x00, 0x4C, 0x35, 0x18, 0x00, 0x13, 0x18, 0x00, 0x00, 0x00, 0xC2, 0x22, 0x00, 0x18, 0x2F, 0x18, 0x00, 0x00, 0x00, 0x0D, 0x00, 0x00, 0xC3, 0x1A, 0x00, 0x72, 0x3F, 0x81, 0xC7, 0x89, 0x03, 0x00, 0x00, 0x00, 0xC5, 0x12, 0x00, 0x64, 0x64, 0x06, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xC6, 0x10, 0x00, 0x64, 0x64, 0x06, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xC7, 0x3E, 0x00, 0xC8, 0xC8, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xC8, 0x00, 0x00, 0x64, 0xFD, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xCA, 0x32, 0x00, 0x64, 0xFD, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x82, 0x00, 0xAE, 0x01, 0x00, 0x5B, 0x03, 0x00, 0x01, 0x00, 0x01, 0x5C, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x03, 0x03, 0x03, 0x02, 0x03, 0x03, 0x03, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x5A, 0xE1, 0x52, 0x0F, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xD6, 0x93, 0xC0, 0xF9, 0xFC, 0x01, 0x00, 0x00, 0x06, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x5A, 0xE1, 0x52, 0x0F, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x02, 0x00, 0x01, 0x00, 0x00, 0x00, 0x0F, 0x00, 0x00, 0x00, 0x40, 0x77, 0xDC, 0x81, 0x03, 0x00, 0x00, 0x00, 0x02, 0x9C, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x27, 0x12, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x25 } iMac-di-Fabio:~ fabio$ diskutil info disk0 Device Identifier: disk0 Device Node: /dev/disk0 Whole: Yes Part of Whole: disk0 Device / Media Name: MAXTOR STM3250310AS Volume Name: Not applicable (no file system) Mounted: Not applicable (no file system) File System: None Content (IOContent): GUID_partition_scheme OS Can Be Installed: No Media Type: Generic Protocol: SATA SMART Status: Verified Disk Size: 250.1 GB (250059350016 Bytes) (exactly 488397168 512-Byte-Units) Device Block Size: 512 Bytes Read-Only Media: No Read-Only Volume: Not applicable (no file system) Device Location: Internal Removable Media: Fixed Solid State: No Virtual: No Hardware AES Support: No iMac-di-Fabio:~ fabio$

Hi, @MaLd0n I hope you have some rest with my Beer present! :)) Thank you for always helping me buddy! So I just updated Bios F6 now. And just I said I have some issue about shutdown with SSDT-TB3 Please see my file. I pushed f4 in clover. So this one is good to go. https://www13.zippyshare.com/v/TUb7L1wR/file.html Thank you!

*auto change xD

Yes... that is where I checked every time I injected a new number then rebooted. HDMI, Digital Out and Internal Speaker shows in most injection numbers but never the Line Out Green.

yes I did. I am only using my TV with HDMI at this moment because of the built in HD graphics. Would that have something to do with it?

I tried all of them and most of them have HDMI audio working but none of them showed green line out from back of the computer.

Yes, check if 7, 11,12 or 13 work perfect

OMG, yes PM was working LOL. I don't know how you know this stuff! I will try the Audio injects you suggested. I used your Cover folder you just sent. When I rebooted none of my USB's worked. Thanks Maldon!

PM is working audio is alc662, i inject 5, if dont work u can try other, 5,7,11,12,13 Inject here, save, reboot https://www5.zippyshare.com/d/OVhoGx6q/9412/CLOVER.zip

/* * dme1737.c - Driver for the SMSC DME1737, Asus A8000, SMSC SCH311x, SCH5027, * and SCH5127 Super-I/O chips integrated hardware monitoring * features. * Copyright (c) 2007, 2008, 2009, 2010 Juerg Haefliger <juergh@gmail.com> * * This driver is an I2C/ISA hybrid, meaning that it uses the I2C bus to access * the chip registers if a DME1737, A8000, or SCH5027 is found and the ISA bus * if a SCH311x or SCH5127 chip is found. Both types of chips have very * similar hardware monitoring capabilities but differ in the way they can be * accessed. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by * the Free Software Foundation; either version 2 of the License, or * (at your option) any later version. * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License * along with this program; if not, write to the Free Software * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */ #include <linux/module.h> #include <linux/init.h> #include <linux/slab.h> #include <linux/jiffies.h> #include <linux/i2c.h> #include <linux/platform_device.h> #include <linux/hwmon.h> #include <linux/hwmon-sysfs.h> #include <linux/hwmon-vid.h> #include <linux/err.h> #include <linux/mutex.h> #include <linux/acpi.h> #include <linux/io.h> /* ISA device, if found */ static struct platform_device *pdev; /* Module load parameters */ static int force_start; module_param(force_start, bool, 0); MODULE_PARM_DESC(force_start, "Force the chip to start monitoring inputs"); static unsigned short force_id; module_param(force_id, ushort, 0); MODULE_PARM_DESC(force_id, "Override the detected device ID"); static int probe_all_addr; module_param(probe_all_addr, bool, 0); MODULE_PARM_DESC(probe_all_addr, "Include probing of non-standard LPC " "addresses"); /* Addresses to scan */ static const unsigned short normal_i2c[] = {0x2c, 0x2d, 0x2e, I2C_CLIENT_END}; enum chips { dme1737, sch5027, sch311x, sch5127 }; /* --------------------------------------------------------------------- * Registers * * The sensors are defined as follows: * * Voltages Temperatures * -------- ------------ * in0 +5VTR (+5V stdby) temp1 Remote diode 1 * in1 Vccp (proc core) temp2 Internal temp * in2 VCC (internal +3.3V) temp3 Remote diode 2 * in3 +5V * in4 +12V * in5 VTR (+3.3V stby) * in6 Vbat * * --------------------------------------------------------------------- */ /* Voltages (in) numbered 0-6 (ix) */ #define DME1737_REG_IN(ix) ((ix) < 5 ? 0x20 + (ix) \ : 0x94 + (ix)) #define DME1737_REG_IN_MIN(ix) ((ix) < 5 ? 0x44 + (ix) * 2 \ : 0x91 + (ix) * 2) #define DME1737_REG_IN_MAX(ix) ((ix) < 5 ? 0x45 + (ix) * 2 \ : 0x92 + (ix) * 2) /* Temperatures (temp) numbered 0-2 (ix) */ #define DME1737_REG_TEMP(ix) (0x25 + (ix)) #define DME1737_REG_TEMP_MIN(ix) (0x4e + (ix) * 2) #define DME1737_REG_TEMP_MAX(ix) (0x4f + (ix) * 2) #define DME1737_REG_TEMP_OFFSET(ix) ((ix) == 0 ? 0x1f \ : 0x1c + (ix)) /* Voltage and temperature LSBs * The LSBs (4 bits each) are stored in 5 registers with the following layouts: * IN_TEMP_LSB(0) = [in5, in6] * IN_TEMP_LSB(1) = [temp3, temp1] * IN_TEMP_LSB(2) = [in4, temp2] * IN_TEMP_LSB(3) = [in3, in0] * IN_TEMP_LSB(4) = [in2, in1] */ #define DME1737_REG_IN_TEMP_LSB(ix) (0x84 + (ix)) static const u8 DME1737_REG_IN_LSB[] = {3, 4, 4, 3, 2, 0, 0}; static const u8 DME1737_REG_IN_LSB_SHL[] = {4, 4, 0, 0, 0, 0, 4}; static const u8 DME1737_REG_TEMP_LSB[] = {1, 2, 1}; static const u8 DME1737_REG_TEMP_LSB_SHL[] = {4, 4, 0}; /* Fans numbered 0-5 (ix) */ #define DME1737_REG_FAN(ix) ((ix) < 4 ? 0x28 + (ix) * 2 \ : 0xa1 + (ix) * 2) #define DME1737_REG_FAN_MIN(ix) ((ix) < 4 ? 0x54 + (ix) * 2 \ : 0xa5 + (ix) * 2) #define DME1737_REG_FAN_OPT(ix) ((ix) < 4 ? 0x90 + (ix) \ : 0xb2 + (ix)) #define DME1737_REG_FAN_MAX(ix) (0xb4 + (ix)) /* only for fan[4-5] */ /* PWMs numbered 0-2, 4-5 (ix) */ #define DME1737_REG_PWM(ix) ((ix) < 3 ? 0x30 + (ix) \ : 0xa1 + (ix)) #define DME1737_REG_PWM_CONFIG(ix) (0x5c + (ix)) /* only for pwm[0-2] */ #define DME1737_REG_PWM_MIN(ix) (0x64 + (ix)) /* only for pwm[0-2] */ #define DME1737_REG_PWM_FREQ(ix) ((ix) < 3 ? 0x5f + (ix) \ : 0xa3 + (ix)) /* The layout of the ramp rate registers is different from the other pwm * registers. The bits for the 3 PWMs are stored in 2 registers: * PWM_RR(0) = [OFF3, OFF2, OFF1, RES, RR1E, RR1-2, RR1-1, RR1-0] * PWM_RR(1) = [RR2E, RR2-2, RR2-1, RR2-0, RR3E, RR3-2, RR3-1, RR3-0] */ #define DME1737_REG_PWM_RR(ix) (0x62 + (ix)) /* only for pwm[0-2] */ /* Thermal zones 0-2 */ #define DME1737_REG_ZONE_LOW(ix) (0x67 + (ix)) #define DME1737_REG_ZONE_ABS(ix) (0x6a + (ix)) /* The layout of the hysteresis registers is different from the other zone * registers. The bits for the 3 zones are stored in 2 registers: * ZONE_HYST(0) = [H1-3, H1-2, H1-1, H1-0, H2-3, H2-2, H2-1, H2-0] * ZONE_HYST(1) = [H3-3, H3-2, H3-1, H3-0, RES, RES, RES, RES] */ #define DME1737_REG_ZONE_HYST(ix) (0x6d + (ix)) /* Alarm registers and bit mapping * The 3 8-bit alarm registers will be concatenated to a single 32-bit * alarm value [0, ALARM3, ALARM2, ALARM1]. */ #define DME1737_REG_ALARM1 0x41 #define DME1737_REG_ALARM2 0x42 #define DME1737_REG_ALARM3 0x83 static const u8 DME1737_BIT_ALARM_IN[] = {0, 1, 2, 3, 8, 16, 17}; static const u8 DME1737_BIT_ALARM_TEMP[] = {4, 5, 6}; static const u8 DME1737_BIT_ALARM_FAN[] = {10, 11, 12, 13, 22, 23}; /* Miscellaneous registers */ #define DME1737_REG_DEVICE 0x3d #define DME1737_REG_COMPANY 0x3e #define DME1737_REG_VERSTEP 0x3f #define DME1737_REG_CONFIG 0x40 #define DME1737_REG_CONFIG2 0x7f #define DME1737_REG_VID 0x43 #define DME1737_REG_TACH_PWM 0x81 /* --------------------------------------------------------------------- * Misc defines * --------------------------------------------------------------------- */ /* Chip identification */ #define DME1737_COMPANY_SMSC 0x5c #define DME1737_VERSTEP 0x88 #define DME1737_VERSTEP_MASK 0xf8 #define SCH311X_DEVICE 0x8c #define SCH5027_VERSTEP 0x69 #define SCH5127_DEVICE 0x8e /* Device ID values (global configuration register index 0x20) */ #define DME1737_ID_1 0x77 #define DME1737_ID_2 0x78 #define SCH3112_ID 0x7c #define SCH3114_ID 0x7d #define SCH3116_ID 0x7f #define SCH5027_ID 0x89 #define SCH5127_ID 0x86 /* Length of ISA address segment */ #define DME1737_EXTENT 2 /* chip-dependent features */ #define HAS_TEMP_OFFSET (1 << 0) /* bit 0 */ #define HAS_VID (1 << 1) /* bit 1 */ #define HAS_ZONE3 (1 << 2) /* bit 2 */ #define HAS_ZONE_HYST (1 << 3) /* bit 3 */ #define HAS_PWM_MIN (1 << 4) /* bit 4 */ #define HAS_FAN(ix) (1 << ((ix) + 5)) /* bits 5-10 */ #define HAS_PWM(ix) (1 << ((ix) + 11)) /* bits 11-16 */ /* --------------------------------------------------------------------- * Data structures and manipulation thereof * --------------------------------------------------------------------- */ struct dme1737_data { struct i2c_client *client; /* for I2C devices only */ struct device *hwmon_dev; const char *name; unsigned int addr; /* for ISA devices only */ struct mutex update_lock; int valid; /* !=0 if following fields are valid */ unsigned long last_update; /* in jiffies */ unsigned long last_vbat; /* in jiffies */ enum chips type; const int *in_nominal; /* pointer to IN_NOMINAL array */ u8 vid; u8 pwm_rr_en; u32 has_features; /* Register values */ u16 in[7]; u8 in_min[7]; u8 in_max[7]; s16 temp[3]; s8 temp_min[3]; s8 temp_max[3]; s8 temp_offset[3]; u8 config; u8 config2; u8 vrm; u16 fan[6]; u16 fan_min[6]; u8 fan_max[2]; u8 fan_opt[6]; u8 pwm[6]; u8 pwm_min[3]; u8 pwm_config[3]; u8 pwm_acz[3]; u8 pwm_freq[6]; u8 pwm_rr[2]; u8 zone_low[3]; u8 zone_abs[3]; u8 zone_hyst[2]; u32 alarms; }; /* Nominal voltage values */ static const int IN_NOMINAL_DME1737[] = {5000, 2250, 3300, 5000, 12000, 3300, 3300}; static const int IN_NOMINAL_SCH311x[] = {2500, 1500, 3300, 5000, 12000, 3300, 3300}; static const int IN_NOMINAL_SCH5027[] = {5000, 2250, 3300, 1125, 1125, 3300, 3300}; static const int IN_NOMINAL_SCH5127[] = {2500, 2250, 3300, 1125, 1125, 3300, 3300}; #define IN_NOMINAL(type) ((type) == sch311x ? IN_NOMINAL_SCH311x : \ (type) == sch5027 ? IN_NOMINAL_SCH5027 : \ (type) == sch5127 ? IN_NOMINAL_SCH5127 : \ IN_NOMINAL_DME1737) /* Voltage input * Voltage inputs have 16 bits resolution, limit values have 8 bits * resolution. */ static inline int IN_FROM_REG(int reg, int nominal, int res) { return (reg * nominal + (3 << (res - 3))) / (3 << (res - 2)); } static inline int IN_TO_REG(int val, int nominal) { return SENSORS_LIMIT((val * 192 + nominal / 2) / nominal, 0, 255); } /* Temperature input * The register values represent temperatures in 2's complement notation from * -127 degrees C to +127 degrees C. Temp inputs have 16 bits resolution, limit * values have 8 bits resolution. */ static inline int TEMP_FROM_REG(int reg, int res) { return (reg * 1000) >> (res - 8); } static inline int TEMP_TO_REG(int val) { return SENSORS_LIMIT((val < 0 ? val - 500 : val + 500) / 1000, -128, 127); } /* Temperature range */ static const int TEMP_RANGE[] = {2000, 2500, 3333, 4000, 5000, 6666, 8000, 10000, 13333, 16000, 20000, 26666, 32000, 40000, 53333, 80000}; static inline int TEMP_RANGE_FROM_REG(int reg) { return TEMP_RANGE[(reg >> 4) & 0x0f]; } static int TEMP_RANGE_TO_REG(int val, int reg) { int i; for (i = 15; i > 0; i--) { if (val > (TEMP_RANGE + TEMP_RANGE[i - 1] + 1) / 2) { break; } } return (reg & 0x0f) | (i << 4); } /* Temperature hysteresis * Register layout: * reg[0] = [H1-3, H1-2, H1-1, H1-0, H2-3, H2-2, H2-1, H2-0] * reg[1] = [H3-3, H3-2, H3-1, H3-0, xxxx, xxxx, xxxx, xxxx] */ static inline int TEMP_HYST_FROM_REG(int reg, int ix) { return (((ix == 1) ? reg : reg >> 4) & 0x0f) * 1000; } static inline int TEMP_HYST_TO_REG(int val, int ix, int reg) { int hyst = SENSORS_LIMIT((val + 500) / 1000, 0, 15); return (ix == 1) ? (reg & 0xf0) | hyst : (reg & 0x0f) | (hyst << 4); } /* Fan input RPM */ static inline int FAN_FROM_REG(int reg, int tpc) { if (tpc) { return tpc * reg; } else { return (reg == 0 || reg == 0xffff) ? 0 : 90000 * 60 / reg; } } static inline int FAN_TO_REG(int val, int tpc) { if (tpc) { return SENSORS_LIMIT(val / tpc, 0, 0xffff); } else { return (val <= 0) ? 0xffff : SENSORS_LIMIT(90000 * 60 / val, 0, 0xfffe); } } /* Fan TPC (tach pulse count) * Converts a register value to a TPC multiplier or returns 0 if the tachometer * is configured in legacy (non-tpc) mode */ static inline int FAN_TPC_FROM_REG(int reg) { return (reg & 0x20) ? 0 : 60 >> (reg & 0x03); } /* Fan type * The type of a fan is expressed in number of pulses-per-revolution that it * emits */ static inline int FAN_TYPE_FROM_REG(int reg) { int edge = (reg >> 1) & 0x03; return (edge > 0) ? 1 << (edge - 1) : 0; } static inline int FAN_TYPE_TO_REG(int val, int reg) { int edge = (val == 4) ? 3 : val; return (reg & 0xf9) | (edge << 1); } /* Fan max RPM */ static const int FAN_MAX[] = {0x54, 0x38, 0x2a, 0x21, 0x1c, 0x18, 0x15, 0x12, 0x11, 0x0f, 0x0e}; static int FAN_MAX_FROM_REG(int reg) { int i; for (i = 10; i > 0; i--) { if (reg == FAN_MAX) { break; } } return 1000 + i * 500; } static int FAN_MAX_TO_REG(int val) { int i; for (i = 10; i > 0; i--) { if (val > (1000 + (i - 1) * 500)) { break; } } return FAN_MAX; } /* PWM enable * Register to enable mapping: * 000: 2 fan on zone 1 auto * 001: 2 fan on zone 2 auto * 010: 2 fan on zone 3 auto * 011: 0 fan full on * 100: -1 fan disabled * 101: 2 fan on hottest of zones 2,3 auto * 110: 2 fan on hottest of zones 1,2,3 auto * 111: 1 fan in manual mode */ static inline int PWM_EN_FROM_REG(int reg) { static const int en[] = {2, 2, 2, 0, -1, 2, 2, 1}; return en[(reg >> 5) & 0x07]; } static inline int PWM_EN_TO_REG(int val, int reg) { int en = (val == 1) ? 7 : 3; return (reg & 0x1f) | ((en & 0x07) << 5); } /* PWM auto channels zone * Register to auto channels zone mapping (ACZ is a bitfield with bit x * corresponding to zone x+1): * 000: 001 fan on zone 1 auto * 001: 010 fan on zone 2 auto * 010: 100 fan on zone 3 auto * 011: 000 fan full on * 100: 000 fan disabled * 101: 110 fan on hottest of zones 2,3 auto * 110: 111 fan on hottest of zones 1,2,3 auto * 111: 000 fan in manual mode */ static inline int PWM_ACZ_FROM_REG(int reg) { static const int acz[] = {1, 2, 4, 0, 0, 6, 7, 0}; return acz[(reg >> 5) & 0x07]; } static inline int PWM_ACZ_TO_REG(int val, int reg) { int acz = (val == 4) ? 2 : val - 1; return (reg & 0x1f) | ((acz & 0x07) << 5); } /* PWM frequency */ static const int PWM_FREQ[] = {11, 15, 22, 29, 35, 44, 59, 88, 15000, 20000, 30000, 25000, 0, 0, 0, 0}; static inline int PWM_FREQ_FROM_REG(int reg) { return PWM_FREQ[reg & 0x0f]; } static int PWM_FREQ_TO_REG(int val, int reg) { int i; /* the first two cases are special - stupid chip design! */ if (val > 27500) { i = 10; } else if (val > 22500) { i = 11; } else { for (i = 9; i > 0; i--) { if (val > (PWM_FREQ + PWM_FREQ[i - 1] + 1) / 2) { break; } } } return (reg & 0xf0) | i; } /* PWM ramp rate * Register layout: * reg[0] = [OFF3, OFF2, OFF1, RES, RR1-E, RR1-2, RR1-1, RR1-0] * reg[1] = [RR2-E, RR2-2, RR2-1, RR2-0, RR3-E, RR3-2, RR3-1, RR3-0] */ static const u8 PWM_RR[] = {206, 104, 69, 41, 26, 18, 10, 5}; static inline int PWM_RR_FROM_REG(int reg, int ix) { int rr = (ix == 1) ? reg >> 4 : reg; return (rr & 0x08) ? PWM_RR[rr & 0x07] : 0; } static int PWM_RR_TO_REG(int val, int ix, int reg) { int i; for (i = 0; i < 7; i++) { if (val > (PWM_RR + PWM_RR[i + 1] + 1) / 2) { break; } } return (ix == 1) ? (reg & 0x8f) | (i << 4) : (reg & 0xf8) | i; } /* PWM ramp rate enable */ static inline int PWM_RR_EN_FROM_REG(int reg, int ix) { return PWM_RR_FROM_REG(reg, ix) ? 1 : 0; } static inline int PWM_RR_EN_TO_REG(int val, int ix, int reg) { int en = (ix == 1) ? 0x80 : 0x08; return val ? reg | en : reg & ~en; } /* PWM min/off * The PWM min/off bits are part of the PMW ramp rate register 0 (see above for * the register layout). */ static inline int PWM_OFF_FROM_REG(int reg, int ix) { return (reg >> (ix + 5)) & 0x01; } static inline int PWM_OFF_TO_REG(int val, int ix, int reg) { return (reg & ~(1 << (ix + 5))) | ((val & 0x01) << (ix + 5)); } /* --------------------------------------------------------------------- * Device I/O access * * ISA access is performed through an index/data register pair and needs to * be protected by a mutex during runtime (not required for initialization). * We use data->update_lock for this and need to ensure that we acquire it * before calling dme1737_read or dme1737_write. * --------------------------------------------------------------------- */ static u8 dme1737_read(const struct dme1737_data *data, u8 reg) { struct i2c_client *client = data->client; s32 val; if (client) { /* I2C device */ val = i2c_smbus_read_byte_data(client, reg); if (val < 0) { dev_warn(&client->dev, "Read from register " "0x%02x failed! Please report to the driver " "maintainer.\n", reg); } } else { /* ISA device */ outb(reg, data->addr); val = inb(data->addr + 1); } return val; } static s32 dme1737_write(const struct dme1737_data *data, u8 reg, u8 val) { struct i2c_client *client = data->client; s32 res = 0; if (client) { /* I2C device */ res = i2c_smbus_write_byte_data(client, reg, val); if (res < 0) { dev_warn(&client->dev, "Write to register " "0x%02x failed! Please report to the driver " "maintainer.\n", reg); } } else { /* ISA device */ outb(reg, data->addr); outb(val, data->addr + 1); } return res; } static struct dme1737_data *dme1737_update_device(struct device *dev) { struct dme1737_data *data = dev_get_drvdata(dev); int ix; u8 lsb[5]; mutex_lock(&data->update_lock); /* Enable a Vbat monitoring cycle every 10 mins */ if (time_after(jiffies, data->last_vbat + 600 * HZ) || !data->valid) { dme1737_write(data, DME1737_REG_CONFIG, dme1737_read(data, DME1737_REG_CONFIG) | 0x10); data->last_vbat = jiffies; } /* Sample register contents every 1 sec */ if (time_after(jiffies, data->last_update + HZ) || !data->valid) { if (data->has_features & HAS_VID) { data->vid = dme1737_read(data, DME1737_REG_VID) & 0x3f; } /* In (voltage) registers */ for (ix = 0; ix < ARRAY_SIZE(data->in); ix++) { /* Voltage inputs are stored as 16 bit values even * though they have only 12 bits resolution. This is * to make it consistent with the temp inputs. */ data->in[ix] = dme1737_read(data, DME1737_REG_IN(ix)) << 8; data->in_min[ix] = dme1737_read(data, DME1737_REG_IN_MIN(ix)); data->in_max[ix] = dme1737_read(data, DME1737_REG_IN_MAX(ix)); } /* Temp registers */ for (ix = 0; ix < ARRAY_SIZE(data->temp); ix++) { /* Temp inputs are stored as 16 bit values even * though they have only 12 bits resolution. This is * to take advantage of implicit conversions between * register values (2's complement) and temp values * (signed decimal). */ data->temp[ix] = dme1737_read(data, DME1737_REG_TEMP(ix)) << 8; data->temp_min[ix] = dme1737_read(data, DME1737_REG_TEMP_MIN(ix)); data->temp_max[ix] = dme1737_read(data, DME1737_REG_TEMP_MAX(ix)); if (data->has_features & HAS_TEMP_OFFSET) { data->temp_offset[ix] = dme1737_read(data, DME1737_REG_TEMP_OFFSET(ix)); } } /* In and temp LSB registers * The LSBs are latched when the MSBs are read, so the order in * which the registers are read (MSB first, then LSB) is * important! */ for (ix = 0; ix < ARRAY_SIZE(lsb); ix++) { lsb[ix] = dme1737_read(data, DME1737_REG_IN_TEMP_LSB(ix)); } for (ix = 0; ix < ARRAY_SIZE(data->in); ix++) { data->in[ix] |= (lsb[DME1737_REG_IN_LSB[ix]] << DME1737_REG_IN_LSB_SHL[ix]) & 0xf0; } for (ix = 0; ix < ARRAY_SIZE(data->temp); ix++) { data->temp[ix] |= (lsb[DME1737_REG_TEMP_LSB[ix]] << DME1737_REG_TEMP_LSB_SHL[ix]) & 0xf0; } /* Fan registers */ for (ix = 0; ix < ARRAY_SIZE(data->fan); ix++) { /* Skip reading registers if optional fans are not * present */ if (!(data->has_features & HAS_FAN(ix))) { continue; } data->fan[ix] = dme1737_read(data, DME1737_REG_FAN(ix)); data->fan[ix] |= dme1737_read(data, DME1737_REG_FAN(ix) + 1) << 8; data->fan_min[ix] = dme1737_read(data, DME1737_REG_FAN_MIN(ix)); data->fan_min[ix] |= dme1737_read(data, DME1737_REG_FAN_MIN(ix) + 1) << 8; data->fan_opt[ix] = dme1737_read(data, DME1737_REG_FAN_OPT(ix)); /* fan_max exists only for fan[5-6] */ if (ix > 3) { data->fan_max[ix - 4] = dme1737_read(data, DME1737_REG_FAN_MAX(ix)); } } /* PWM registers */ for (ix = 0; ix < ARRAY_SIZE(data->pwm); ix++) { /* Skip reading registers if optional PWMs are not * present */ if (!(data->has_features & HAS_PWM(ix))) { continue; } data->pwm[ix] = dme1737_read(data, DME1737_REG_PWM(ix)); data->pwm_freq[ix] = dme1737_read(data, DME1737_REG_PWM_FREQ(ix)); /* pwm_config and pwm_min exist only for pwm[1-3] */ if (ix < 3) { data->pwm_config[ix] = dme1737_read(data, DME1737_REG_PWM_CONFIG(ix)); data->pwm_min[ix] = dme1737_read(data, DME1737_REG_PWM_MIN(ix)); } } for (ix = 0; ix < ARRAY_SIZE(data->pwm_rr); ix++) { data->pwm_rr[ix] = dme1737_read(data, DME1737_REG_PWM_RR(ix)); } /* Thermal zone registers */ for (ix = 0; ix < ARRAY_SIZE(data->zone_low); ix++) { /* Skip reading registers if zone3 is not present */ if ((ix == 2) && !(data->has_features & HAS_ZONE3)) { continue; } /* sch5127 zone2 registers are special */ if ((ix == 1) && (data->type == sch5127)) { data->zone_low[1] = dme1737_read(data, DME1737_REG_ZONE_LOW(2)); data->zone_abs[1] = dme1737_read(data, DME1737_REG_ZONE_ABS(2)); } else { data->zone_low[ix] = dme1737_read(data, DME1737_REG_ZONE_LOW(ix)); data->zone_abs[ix] = dme1737_read(data, DME1737_REG_ZONE_ABS(ix)); } } if (data->has_features & HAS_ZONE_HYST) { for (ix = 0; ix < ARRAY_SIZE(data->zone_hyst); ix++) { data->zone_hyst[ix] = dme1737_read(data, DME1737_REG_ZONE_HYST(ix)); } } /* Alarm registers */ data->alarms = dme1737_read(data, DME1737_REG_ALARM1); /* Bit 7 tells us if the other alarm registers are non-zero and * therefore also need to be read */ if (data->alarms & 0x80) { data->alarms |= dme1737_read(data, DME1737_REG_ALARM2) << 8; data->alarms |= dme1737_read(data, DME1737_REG_ALARM3) << 16; } /* The ISA chips require explicit clearing of alarm bits. * Don't worry, an alarm will come back if the condition * that causes it still exists */ if (!data->client) { if (data->alarms & 0xff0000) { dme1737_write(data, DME1737_REG_ALARM3, 0xff); } if (data->alarms & 0xff00) { dme1737_write(data, DME1737_REG_ALARM2, 0xff); } if (data->alarms & 0xff) { dme1737_write(data, DME1737_REG_ALARM1, 0xff); } } data->last_update = jiffies; data->valid = 1; } mutex_unlock(&data->update_lock); return data; } /* --------------------------------------------------------------------- * Voltage sysfs attributes * ix = [0-5] * --------------------------------------------------------------------- */ #define SYS_IN_INPUT 0 #define SYS_IN_MIN 1 #define SYS_IN_MAX 2 #define SYS_IN_ALARM 3 static ssize_t show_in(struct device *dev, struct device_attribute *attr, char *buf) { struct dme1737_data *data = dme1737_update_device(dev); struct sensor_device_attribute_2 *sensor_attr_2 = to_sensor_dev_attr_2(attr); int ix = sensor_attr_2->index; int fn = sensor_attr_2->nr; int res; switch (fn) { case SYS_IN_INPUT: res = IN_FROM_REG(data->in[ix], data->in_nominal[ix], 16); break; case SYS_IN_MIN: res = IN_FROM_REG(data->in_min[ix], data->in_nominal[ix], 8); break; case SYS_IN_MAX: res = IN_FROM_REG(data->in_max[ix], data->in_nominal[ix], 8); break; case SYS_IN_ALARM: res = (data->alarms >> DME1737_BIT_ALARM_IN[ix]) & 0x01; break; default: res = 0; dev_dbg(dev, "Unknown function %d.\n", fn); } return sprintf(buf, "%d\n", res); } static ssize_t set_in(struct device *dev, struct device_attribute *attr, const char *buf, size_t count) { struct dme1737_data *data = dev_get_drvdata(dev); struct sensor_device_attribute_2 *sensor_attr_2 = to_sensor_dev_attr_2(attr); int ix = sensor_attr_2->index; int fn = sensor_attr_2->nr; long val = simple_strtol(buf, NULL, 10); mutex_lock(&data->update_lock); switch (fn) { case SYS_IN_MIN: data->in_min[ix] = IN_TO_REG(val, data->in_nominal[ix]); dme1737_write(data, DME1737_REG_IN_MIN(ix), data->in_min[ix]); break; case SYS_IN_MAX: data->in_max[ix] = IN_TO_REG(val, data->in_nominal[ix]); dme1737_write(data, DME1737_REG_IN_MAX(ix), data->in_max[ix]); break; default: dev_dbg(dev, "Unknown function %d.\n", fn); } mutex_unlock(&data->update_lock); return count; } /* --------------------------------------------------------------------- * Temperature sysfs attributes * ix = [0-2] * --------------------------------------------------------------------- */ #define SYS_TEMP_INPUT 0 #define SYS_TEMP_MIN 1 #define SYS_TEMP_MAX 2 #define SYS_TEMP_OFFSET 3 #define SYS_TEMP_ALARM 4 #define SYS_TEMP_FAULT 5 static ssize_t show_temp(struct device *dev, struct device_attribute *attr, char *buf) { struct dme1737_data *data = dme1737_update_device(dev); struct sensor_device_attribute_2 *sensor_attr_2 = to_sensor_dev_attr_2(attr); int ix = sensor_attr_2->index; int fn = sensor_attr_2->nr; int res; switch (fn) { case SYS_TEMP_INPUT: res = TEMP_FROM_REG(data->temp[ix], 16); break; case SYS_TEMP_MIN: res = TEMP_FROM_REG(data->temp_min[ix], 8); break; case SYS_TEMP_MAX: res = TEMP_FROM_REG(data->temp_max[ix], 8); break; case SYS_TEMP_OFFSET: res = TEMP_FROM_REG(data->temp_offset[ix], 8); break; case SYS_TEMP_ALARM: res = (data->alarms >> DME1737_BIT_ALARM_TEMP[ix]) & 0x01; break; case SYS_TEMP_FAULT: res = (((u16)data->temp[ix] & 0xff00) == 0x8000); break; default: res = 0; dev_dbg(dev, "Unknown function %d.\n", fn); } return sprintf(buf, "%d\n", res); } static ssize_t set_temp(struct device *dev, struct device_attribute *attr, const char *buf, size_t count) { struct dme1737_data *data = dev_get_drvdata(dev); struct sensor_device_attribute_2 *sensor_attr_2 = to_sensor_dev_attr_2(attr); int ix = sensor_attr_2->index; int fn = sensor_attr_2->nr; long val = simple_strtol(buf, NULL, 10); mutex_lock(&data->update_lock); switch (fn) { case SYS_TEMP_MIN: data->temp_min[ix] = TEMP_TO_REG(val); dme1737_write(data, DME1737_REG_TEMP_MIN(ix), data->temp_min[ix]); break; case SYS_TEMP_MAX: data->temp_max[ix] = TEMP_TO_REG(val); dme1737_write(data, DME1737_REG_TEMP_MAX(ix), data->temp_max[ix]); break; case SYS_TEMP_OFFSET: data->temp_offset[ix] = TEMP_TO_REG(val); dme1737_write(data, DME1737_REG_TEMP_OFFSET(ix), data->temp_offset[ix]); break; default: dev_dbg(dev, "Unknown function %d.\n", fn); } mutex_unlock(&data->update_lock); return count; } /* --------------------------------------------------------------------- * Zone sysfs attributes * ix = [0-2] * --------------------------------------------------------------------- */ #define SYS_ZONE_AUTO_CHANNELS_TEMP 0 #define SYS_ZONE_AUTO_POINT1_TEMP_HYST 1 #define SYS_ZONE_AUTO_POINT1_TEMP 2 #define SYS_ZONE_AUTO_POINT2_TEMP 3 #define SYS_ZONE_AUTO_POINT3_TEMP 4 static ssize_t show_zone(struct device *dev, struct device_attribute *attr, char *buf) { struct dme1737_data *data = dme1737_update_device(dev); struct sensor_device_attribute_2 *sensor_attr_2 = to_sensor_dev_attr_2(attr); int ix = sensor_attr_2->index; int fn = sensor_attr_2->nr; int res; switch (fn) { case SYS_ZONE_AUTO_CHANNELS_TEMP: /* check config2 for non-standard temp-to-zone mapping */ if ((ix == 1) && (data->config2 & 0x02)) { res = 4; } else { res = 1 << ix; } break; case SYS_ZONE_AUTO_POINT1_TEMP_HYST: res = TEMP_FROM_REG(data->zone_low[ix], 8) - TEMP_HYST_FROM_REG(data->zone_hyst[ix == 2], ix); break; case SYS_ZONE_AUTO_POINT1_TEMP: res = TEMP_FROM_REG(data->zone_low[ix], 8); break; case SYS_ZONE_AUTO_POINT2_TEMP: /* pwm_freq holds the temp range bits in the upper nibble */ res = TEMP_FROM_REG(data->zone_low[ix], 8) + TEMP_RANGE_FROM_REG(data->pwm_freq[ix]); break; case SYS_ZONE_AUTO_POINT3_TEMP: res = TEMP_FROM_REG(data->zone_abs[ix], 8); break; default: res = 0; dev_dbg(dev, "Unknown function %d.\n", fn); } return sprintf(buf, "%d\n", res); } static ssize_t set_zone(struct device *dev, struct device_attribute *attr, const char *buf, size_t count) { struct dme1737_data *data = dev_get_drvdata(dev); struct sensor_device_attribute_2 *sensor_attr_2 = to_sensor_dev_attr_2(attr); int ix = sensor_attr_2->index; int fn = sensor_attr_2->nr; long val = simple_strtol(buf, NULL, 10); mutex_lock(&data->update_lock); switch (fn) { case SYS_ZONE_AUTO_POINT1_TEMP_HYST: /* Refresh the cache */ data->zone_low[ix] = dme1737_read(data, DME1737_REG_ZONE_LOW(ix)); /* Modify the temp hyst value */ data->zone_hyst[ix == 2] = TEMP_HYST_TO_REG( TEMP_FROM_REG(data->zone_low[ix], 8) - val, ix, dme1737_read(data, DME1737_REG_ZONE_HYST(ix == 2))); dme1737_write(data, DME1737_REG_ZONE_HYST(ix == 2), data->zone_hyst[ix == 2]); break; case SYS_ZONE_AUTO_POINT1_TEMP: data->zone_low[ix] = TEMP_TO_REG(val); dme1737_write(data, DME1737_REG_ZONE_LOW(ix), data->zone_low[ix]); break; case SYS_ZONE_AUTO_POINT2_TEMP: /* Refresh the cache */ data->zone_low[ix] = dme1737_read(data, DME1737_REG_ZONE_LOW(ix)); /* Modify the temp range value (which is stored in the upper * nibble of the pwm_freq register) */ data->pwm_freq[ix] = TEMP_RANGE_TO_REG(val - TEMP_FROM_REG(data->zone_low[ix], 8), dme1737_read(data, DME1737_REG_PWM_FREQ(ix))); dme1737_write(data, DME1737_REG_PWM_FREQ(ix), data->pwm_freq[ix]); break; case SYS_ZONE_AUTO_POINT3_TEMP: data->zone_abs[ix] = TEMP_TO_REG(val); dme1737_write(data, DME1737_REG_ZONE_ABS(ix), data->zone_abs[ix]); break; default: dev_dbg(dev, "Unknown function %d.\n", fn); } mutex_unlock(&data->update_lock); return count; } /* --------------------------------------------------------------------- * Fan sysfs attributes * ix = [0-5] * --------------------------------------------------------------------- */ #define SYS_FAN_INPUT 0 #define SYS_FAN_MIN 1 #define SYS_FAN_MAX 2 #define SYS_FAN_ALARM 3 #define SYS_FAN_TYPE 4 static ssize_t show_fan(struct device *dev, struct device_attribute *attr, char *buf) { struct dme1737_data *data = dme1737_update_device(dev); struct sensor_device_attribute_2 *sensor_attr_2 = to_sensor_dev_attr_2(attr); int ix = sensor_attr_2->index; int fn = sensor_attr_2->nr; int res; switch (fn) { case SYS_FAN_INPUT: res = FAN_FROM_REG(data->fan[ix], ix < 4 ? 0 : FAN_TPC_FROM_REG(data->fan_opt[ix])); break; case SYS_FAN_MIN: res = FAN_FROM_REG(data->fan_min[ix], ix < 4 ? 0 : FAN_TPC_FROM_REG(data->fan_opt[ix])); break; case SYS_FAN_MAX: /* only valid for fan[5-6] */ res = FAN_MAX_FROM_REG(data->fan_max[ix - 4]); break; case SYS_FAN_ALARM: res = (data->alarms >> DME1737_BIT_ALARM_FAN[ix]) & 0x01; break; case SYS_FAN_TYPE: /* only valid for fan[1-4] */ res = FAN_TYPE_FROM_REG(data->fan_opt[ix]); break; default: res = 0; dev_dbg(dev, "Unknown function %d.\n", fn); } return sprintf(buf, "%d\n", res); } static ssize_t set_fan(struct device *dev, struct device_attribute *attr, const char *buf, size_t count) { struct dme1737_data *data = dev_get_drvdata(dev); struct sensor_device_attribute_2 *sensor_attr_2 = to_sensor_dev_attr_2(attr); int ix = sensor_attr_2->index; int fn = sensor_attr_2->nr; long val = simple_strtol(buf, NULL, 10); mutex_lock(&data->update_lock); switch (fn) { case SYS_FAN_MIN: if (ix < 4) { data->fan_min[ix] = FAN_TO_REG(val, 0); } else { /* Refresh the cache */ data->fan_opt[ix] = dme1737_read(data, DME1737_REG_FAN_OPT(ix)); /* Modify the fan min value */ data->fan_min[ix] = FAN_TO_REG(val, FAN_TPC_FROM_REG(data->fan_opt[ix])); } dme1737_write(data, DME1737_REG_FAN_MIN(ix), data->fan_min[ix] & 0xff); dme1737_write(data, DME1737_REG_FAN_MIN(ix) + 1, data->fan_min[ix] >> 8); break; case SYS_FAN_MAX: /* Only valid for fan[5-6] */ data->fan_max[ix - 4] = FAN_MAX_TO_REG(val); dme1737_write(data, DME1737_REG_FAN_MAX(ix), data->fan_max[ix - 4]); break; case SYS_FAN_TYPE: /* Only valid for fan[1-4] */ if (!(val == 1 || val == 2 || val == 4)) { count = -EINVAL; dev_warn(dev, "Fan type value %ld not " "supported. Choose one of 1, 2, or 4.\n", val); goto exit; } data->fan_opt[ix] = FAN_TYPE_TO_REG(val, dme1737_read(data, DME1737_REG_FAN_OPT(ix))); dme1737_write(data, DME1737_REG_FAN_OPT(ix), data->fan_opt[ix]); break; default: dev_dbg(dev, "Unknown function %d.\n", fn); } exit: mutex_unlock(&data->update_lock); return count; } /* --------------------------------------------------------------------- * PWM sysfs attributes * ix = [0-4] * --------------------------------------------------------------------- */ #define SYS_PWM 0 #define SYS_PWM_FREQ 1 #define SYS_PWM_ENABLE 2 #define SYS_PWM_RAMP_RATE 3 #define SYS_PWM_AUTO_CHANNELS_ZONE 4 #define SYS_PWM_AUTO_PWM_MIN 5 #define SYS_PWM_AUTO_POINT1_PWM 6 #define SYS_PWM_AUTO_POINT2_PWM 7 static ssize_t show_pwm(struct device *dev, struct device_attribute *attr, char *buf) { struct dme1737_data *data = dme1737_update_device(dev); struct sensor_device_attribute_2 *sensor_attr_2 = to_sensor_dev_attr_2(attr); int ix = sensor_attr_2->index; int fn = sensor_attr_2->nr; int res; switch (fn) { case SYS_PWM: if (PWM_EN_FROM_REG(data->pwm_config[ix]) == 0) { res = 255; } else { res = data->pwm[ix]; } break; case SYS_PWM_FREQ: res = PWM_FREQ_FROM_REG(data->pwm_freq[ix]); break; case SYS_PWM_ENABLE: if (ix >= 3) { res = 1; /* pwm[5-6] hard-wired to manual mode */ } else { res = PWM_EN_FROM_REG(data->pwm_config[ix]); } break; case SYS_PWM_RAMP_RATE: /* Only valid for pwm[1-3] */ res = PWM_RR_FROM_REG(data->pwm_rr[ix > 0], ix); break; case SYS_PWM_AUTO_CHANNELS_ZONE: /* Only valid for pwm[1-3] */ if (PWM_EN_FROM_REG(data->pwm_config[ix]) == 2) { res = PWM_ACZ_FROM_REG(data->pwm_config[ix]); } else { res = data->pwm_acz[ix]; } break; case SYS_PWM_AUTO_PWM_MIN: /* Only valid for pwm[1-3] */ if (PWM_OFF_FROM_REG(data->pwm_rr[0], ix)) { res = data->pwm_min[ix]; } else { res = 0; } break; case SYS_PWM_AUTO_POINT1_PWM: /* Only valid for pwm[1-3] */ res = data->pwm_min[ix]; break; case SYS_PWM_AUTO_POINT2_PWM: /* Only valid for pwm[1-3] */ res = 255; /* hard-wired */ break; default: res = 0; dev_dbg(dev, "Unknown function %d.\n", fn); } return sprintf(buf, "%d\n", res); } static struct attribute *dme1737_pwm_chmod_attr[]; static void dme1737_chmod_file(struct device*, struct attribute*, mode_t); static ssize_t set_pwm(struct device *dev, struct device_attribute *attr, const char *buf, size_t count) { struct dme1737_data *data = dev_get_drvdata(dev); struct sensor_device_attribute_2 *sensor_attr_2 = to_sensor_dev_attr_2(attr); int ix = sensor_attr_2->index; int fn = sensor_attr_2->nr; long val = simple_strtol(buf, NULL, 10); mutex_lock(&data->update_lock); switch (fn) { case SYS_PWM: data->pwm[ix] = SENSORS_LIMIT(val, 0, 255); dme1737_write(data, DME1737_REG_PWM(ix), data->pwm[ix]); break; case SYS_PWM_FREQ: data->pwm_freq[ix] = PWM_FREQ_TO_REG(val, dme1737_read(data, DME1737_REG_PWM_FREQ(ix))); dme1737_write(data, DME1737_REG_PWM_FREQ(ix), data->pwm_freq[ix]); break; case SYS_PWM_ENABLE: /* Only valid for pwm[1-3] */ if (val < 0 || val > 2) { count = -EINVAL; dev_warn(dev, "PWM enable %ld not " "supported. Choose one of 0, 1, or 2.\n", val); goto exit; } /* Refresh the cache */ data->pwm_config[ix] = dme1737_read(data, DME1737_REG_PWM_CONFIG(ix)); if (val == PWM_EN_FROM_REG(data->pwm_config[ix])) { /* Bail out if no change */ goto exit; } /* Do some housekeeping if we are currently in auto mode */ if (PWM_EN_FROM_REG(data->pwm_config[ix]) == 2) { /* Save the current zone channel assignment */ data->pwm_acz[ix] = PWM_ACZ_FROM_REG( data->pwm_config[ix]); /* Save the current ramp rate state and disable it */ data->pwm_rr[ix > 0] = dme1737_read(data, DME1737_REG_PWM_RR(ix > 0)); data->pwm_rr_en &= ~(1 << ix); if (PWM_RR_EN_FROM_REG(data->pwm_rr[ix > 0], ix)) { data->pwm_rr_en |= (1 << ix); data->pwm_rr[ix > 0] = PWM_RR_EN_TO_REG(0, ix, data->pwm_rr[ix > 0]); dme1737_write(data, DME1737_REG_PWM_RR(ix > 0), data->pwm_rr[ix > 0]); } } /* Set the new PWM mode */ switch (val) { case 0: /* Change permissions of pwm[ix] to read-only */ dme1737_chmod_file(dev, dme1737_pwm_chmod_attr[ix], S_IRUGO); /* Turn fan fully on */ data->pwm_config[ix] = PWM_EN_TO_REG(0, data->pwm_config[ix]); dme1737_write(data, DME1737_REG_PWM_CONFIG(ix), data->pwm_config[ix]); break; case 1: /* Turn on manual mode */ data->pwm_config[ix] = PWM_EN_TO_REG(1, data->pwm_config[ix]); dme1737_write(data, DME1737_REG_PWM_CONFIG(ix), data->pwm_config[ix]); /* Change permissions of pwm[ix] to read-writeable */ dme1737_chmod_file(dev, dme1737_pwm_chmod_attr[ix], S_IRUGO | S_IWUSR); break; case 2: /* Change permissions of pwm[ix] to read-only */ dme1737_chmod_file(dev, dme1737_pwm_chmod_attr[ix], S_IRUGO); /* Turn on auto mode using the saved zone channel * assignment */ data->pwm_config[ix] = PWM_ACZ_TO_REG( data->pwm_acz[ix], data->pwm_config[ix]); dme1737_write(data, DME1737_REG_PWM_CONFIG(ix), data->pwm_config[ix]); /* Enable PWM ramp rate if previously enabled */ if (data->pwm_rr_en & (1 << ix)) { data->pwm_rr[ix > 0] = PWM_RR_EN_TO_REG(1, ix, dme1737_read(data, DME1737_REG_PWM_RR(ix > 0))); dme1737_write(data, DME1737_REG_PWM_RR(ix > 0), data->pwm_rr[ix > 0]); } break; } break; case SYS_PWM_RAMP_RATE: /* Only valid for pwm[1-3] */ /* Refresh the cache */ data->pwm_config[ix] = dme1737_read(data, DME1737_REG_PWM_CONFIG(ix)); data->pwm_rr[ix > 0] = dme1737_read(data, DME1737_REG_PWM_RR(ix > 0)); /* Set the ramp rate value */ if (val > 0) { data->pwm_rr[ix > 0] = PWM_RR_TO_REG(val, ix, data->pwm_rr[ix > 0]); } /* Enable/disable the feature only if the associated PWM * output is in automatic mode. */ if (PWM_EN_FROM_REG(data->pwm_config[ix]) == 2) { data->pwm_rr[ix > 0] = PWM_RR_EN_TO_REG(val > 0, ix, data->pwm_rr[ix > 0]); } dme1737_write(data, DME1737_REG_PWM_RR(ix > 0), data->pwm_rr[ix > 0]); break; case SYS_PWM_AUTO_CHANNELS_ZONE: /* Only valid for pwm[1-3] */ if (!(val == 1 || val == 2 || val == 4 || val == 6 || val == 7)) { count = -EINVAL; dev_warn(dev, "PWM auto channels zone %ld " "not supported. Choose one of 1, 2, 4, 6, " "or 7.\n", val); goto exit; } /* Refresh the cache */ data->pwm_config[ix] = dme1737_read(data, DME1737_REG_PWM_CONFIG(ix)); if (PWM_EN_FROM_REG(data->pwm_config[ix]) == 2) { /* PWM is already in auto mode so update the temp * channel assignment */ data->pwm_config[ix] = PWM_ACZ_TO_REG(val, data->pwm_config[ix]); dme1737_write(data, DME1737_REG_PWM_CONFIG(ix), data->pwm_config[ix]); } else { /* PWM is not in auto mode so we save the temp * channel assignment for later use */ data->pwm_acz[ix] = val; } break; case SYS_PWM_AUTO_PWM_MIN: /* Only valid for pwm[1-3] */ /* Refresh the cache */ data->pwm_min[ix] = dme1737_read(data, DME1737_REG_PWM_MIN(ix)); /* There are only 2 values supported for the auto_pwm_min * value: 0 or auto_point1_pwm. So if the temperature drops * below the auto_point1_temp_hyst value, the fan either turns * off or runs at auto_point1_pwm duty-cycle. */ if (val > ((data->pwm_min[ix] + 1) / 2)) { data->pwm_rr[0] = PWM_OFF_TO_REG(1, ix, dme1737_read(data, DME1737_REG_PWM_RR(0))); } else { data->pwm_rr[0] = PWM_OFF_TO_REG(0, ix, dme1737_read(data, DME1737_REG_PWM_RR(0))); } dme1737_write(data, DME1737_REG_PWM_RR(0), data->pwm_rr[0]); break; case SYS_PWM_AUTO_POINT1_PWM: /* Only valid for pwm[1-3] */ data->pwm_min[ix] = SENSORS_LIMIT(val, 0, 255); dme1737_write(data, DME1737_REG_PWM_MIN(ix), data->pwm_min[ix]); break; default: dev_dbg(dev, "Unknown function %d.\n", fn); } exit: mutex_unlock(&data->update_lock); return count; } /* --------------------------------------------------------------------- * Miscellaneous sysfs attributes * --------------------------------------------------------------------- */ static ssize_t show_vrm(struct device *dev, struct device_attribute *attr, char *buf) { struct i2c_client *client = to_i2c_client(dev); struct dme1737_data *data = i2c_get_clientdata(client); return sprintf(buf, "%d\n", data->vrm); } static ssize_t set_vrm(struct device *dev, struct device_attribute *attr, const char *buf, size_t count) { struct dme1737_data *data = dev_get_drvdata(dev); long val = simple_strtol(buf, NULL, 10); data->vrm = val; return count; } static ssize_t show_vid(struct device *dev, struct device_attribute *attr, char *buf) { struct dme1737_data *data = dme1737_update_device(dev); return sprintf(buf, "%d\n", vid_from_reg(data->vid, data->vrm)); } static ssize_t show_name(struct device *dev, struct device_attribute *attr, char *buf) { struct dme1737_data *data = dev_get_drvdata(dev); return sprintf(buf, "%s\n", data->name); } /* --------------------------------------------------------------------- * Sysfs device attribute defines and structs * --------------------------------------------------------------------- */ /* Voltages 0-6 */ #define SENSOR_DEVICE_ATTR_IN(ix) \ static SENSOR_DEVICE_ATTR_2(in##ix##_input, S_IRUGO, \ show_in, NULL, SYS_IN_INPUT, ix); \ static SENSOR_DEVICE_ATTR_2(in##ix##_min, S_IRUGO | S_IWUSR, \ show_in, set_in, SYS_IN_MIN, ix); \ static SENSOR_DEVICE_ATTR_2(in##ix##_max, S_IRUGO | S_IWUSR, \ show_in, set_in, SYS_IN_MAX, ix); \ static SENSOR_DEVICE_ATTR_2(in##ix##_alarm, S_IRUGO, \ show_in, NULL, SYS_IN_ALARM, ix) SENSOR_DEVICE_ATTR_IN(0); SENSOR_DEVICE_ATTR_IN(1); SENSOR_DEVICE_ATTR_IN(2); SENSOR_DEVICE_ATTR_IN(3); SENSOR_DEVICE_ATTR_IN(4); SENSOR_DEVICE_ATTR_IN(5); SENSOR_DEVICE_ATTR_IN(6); /* Temperatures 1-3 */ #define SENSOR_DEVICE_ATTR_TEMP(ix) \ static SENSOR_DEVICE_ATTR_2(temp##ix##_input, S_IRUGO, \ show_temp, NULL, SYS_TEMP_INPUT, ix-1); \ static SENSOR_DEVICE_ATTR_2(temp##ix##_min, S_IRUGO | S_IWUSR, \ show_temp, set_temp, SYS_TEMP_MIN, ix-1); \ static SENSOR_DEVICE_ATTR_2(temp##ix##_max, S_IRUGO | S_IWUSR, \ show_temp, set_temp, SYS_TEMP_MAX, ix-1); \ static SENSOR_DEVICE_ATTR_2(temp##ix##_offset, S_IRUGO, \ show_temp, set_temp, SYS_TEMP_OFFSET, ix-1); \ static SENSOR_DEVICE_ATTR_2(temp##ix##_alarm, S_IRUGO, \ show_temp, NULL, SYS_TEMP_ALARM, ix-1); \ static SENSOR_DEVICE_ATTR_2(temp##ix##_fault, S_IRUGO, \ show_temp, NULL, SYS_TEMP_FAULT, ix-1) SENSOR_DEVICE_ATTR_TEMP(1); SENSOR_DEVICE_ATTR_TEMP(2); SENSOR_DEVICE_ATTR_TEMP(3); /* Zones 1-3 */ #define SENSOR_DEVICE_ATTR_ZONE(ix) \ static SENSOR_DEVICE_ATTR_2(zone##ix##_auto_channels_temp, S_IRUGO, \ show_zone, NULL, SYS_ZONE_AUTO_CHANNELS_TEMP, ix-1); \ static SENSOR_DEVICE_ATTR_2(zone##ix##_auto_point1_temp_hyst, S_IRUGO, \ show_zone, set_zone, SYS_ZONE_AUTO_POINT1_TEMP_HYST, ix-1); \ static SENSOR_DEVICE_ATTR_2(zone##ix##_auto_point1_temp, S_IRUGO, \ show_zone, set_zone, SYS_ZONE_AUTO_POINT1_TEMP, ix-1); \ static SENSOR_DEVICE_ATTR_2(zone##ix##_auto_point2_temp, S_IRUGO, \ show_zone, set_zone, SYS_ZONE_AUTO_POINT2_TEMP, ix-1); \ static SENSOR_DEVICE_ATTR_2(zone##ix##_auto_point3_temp, S_IRUGO, \ show_zone, set_zone, SYS_ZONE_AUTO_POINT3_TEMP, ix-1) SENSOR_DEVICE_ATTR_ZONE(1); SENSOR_DEVICE_ATTR_ZONE(2); SENSOR_DEVICE_ATTR_ZONE(3); /* Fans 1-4 */ #define SENSOR_DEVICE_ATTR_FAN_1TO4(ix) \ static SENSOR_DEVICE_ATTR_2(fan##ix##_input, S_IRUGO, \ show_fan, NULL, SYS_FAN_INPUT, ix-1); \ static SENSOR_DEVICE_ATTR_2(fan##ix##_min, S_IRUGO | S_IWUSR, \ show_fan, set_fan, SYS_FAN_MIN, ix-1); \ static SENSOR_DEVICE_ATTR_2(fan##ix##_alarm, S_IRUGO, \ show_fan, NULL, SYS_FAN_ALARM, ix-1); \ static SENSOR_DEVICE_ATTR_2(fan##ix##_type, S_IRUGO | S_IWUSR, \ show_fan, set_fan, SYS_FAN_TYPE, ix-1) SENSOR_DEVICE_ATTR_FAN_1TO4(1); SENSOR_DEVICE_ATTR_FAN_1TO4(2); SENSOR_DEVICE_ATTR_FAN_1TO4(3); SENSOR_DEVICE_ATTR_FAN_1TO4(4); /* Fans 5-6 */ #define SENSOR_DEVICE_ATTR_FAN_5TO6(ix) \ static SENSOR_DEVICE_ATTR_2(fan##ix##_input, S_IRUGO, \ show_fan, NULL, SYS_FAN_INPUT, ix-1); \ static SENSOR_DEVICE_ATTR_2(fan##ix##_min, S_IRUGO | S_IWUSR, \ show_fan, set_fan, SYS_FAN_MIN, ix-1); \ static SENSOR_DEVICE_ATTR_2(fan##ix##_alarm, S_IRUGO, \ show_fan, NULL, SYS_FAN_ALARM, ix-1); \ static SENSOR_DEVICE_ATTR_2(fan##ix##_max, S_IRUGO | S_IWUSR, \ show_fan, set_fan, SYS_FAN_MAX, ix-1) SENSOR_DEVICE_ATTR_FAN_5TO6(5); SENSOR_DEVICE_ATTR_FAN_5TO6(6); /* PWMs 1-3 */ #define SENSOR_DEVICE_ATTR_PWM_1TO3(ix) \ static SENSOR_DEVICE_ATTR_2(pwm##ix, S_IRUGO, \ show_pwm, set_pwm, SYS_PWM, ix-1); \ static SENSOR_DEVICE_ATTR_2(pwm##ix##_freq, S_IRUGO, \ show_pwm, set_pwm, SYS_PWM_FREQ, ix-1); \ static SENSOR_DEVICE_ATTR_2(pwm##ix##_enable, S_IRUGO, \ show_pwm, set_pwm, SYS_PWM_ENABLE, ix-1); \ static SENSOR_DEVICE_ATTR_2(pwm##ix##_ramp_rate, S_IRUGO, \ show_pwm, set_pwm, SYS_PWM_RAMP_RATE, ix-1); \ static SENSOR_DEVICE_ATTR_2(pwm##ix##_auto_channels_zone, S_IRUGO, \ show_pwm, set_pwm, SYS_PWM_AUTO_CHANNELS_ZONE, ix-1); \ static SENSOR_DEVICE_ATTR_2(pwm##ix##_auto_pwm_min, S_IRUGO, \ show_pwm, set_pwm, SYS_PWM_AUTO_PWM_MIN, ix-1); \ static SENSOR_DEVICE_ATTR_2(pwm##ix##_auto_point1_pwm, S_IRUGO, \ show_pwm, set_pwm, SYS_PWM_AUTO_POINT1_PWM, ix-1); \ static SENSOR_DEVICE_ATTR_2(pwm##ix##_auto_point2_pwm, S_IRUGO, \ show_pwm, NULL, SYS_PWM_AUTO_POINT2_PWM, ix-1) SENSOR_DEVICE_ATTR_PWM_1TO3(1); SENSOR_DEVICE_ATTR_PWM_1TO3(2); SENSOR_DEVICE_ATTR_PWM_1TO3(3); /* PWMs 5-6 */ #define SENSOR_DEVICE_ATTR_PWM_5TO6(ix) \ static SENSOR_DEVICE_ATTR_2(pwm##ix, S_IRUGO, \ show_pwm, set_pwm, SYS_PWM, ix-1); \ static SENSOR_DEVICE_ATTR_2(pwm##ix##_freq, S_IRUGO, \ show_pwm, set_pwm, SYS_PWM_FREQ, ix-1); \ static SENSOR_DEVICE_ATTR_2(pwm##ix##_enable, S_IRUGO, \ show_pwm, NULL, SYS_PWM_ENABLE, ix-1) SENSOR_DEVICE_ATTR_PWM_5TO6(5); SENSOR_DEVICE_ATTR_PWM_5TO6(6); /* Misc */ static DEVICE_ATTR(vrm, S_IRUGO | S_IWUSR, show_vrm, set_vrm); static DEVICE_ATTR(cpu0_vid, S_IRUGO, show_vid, NULL); static DEVICE_ATTR(name, S_IRUGO, show_name, NULL); /* for ISA devices */ /* This struct holds all the attributes that are always present and need to be * created unconditionally. The attributes that need modification of their * permissions are created read-only and write permissions are added or removed * on the fly when required */ static struct attribute *dme1737_attr[] ={ /* Voltages */ &sensor_dev_attr_in0_input.dev_attr.attr, &sensor_dev_attr_in0_min.dev_attr.attr, &sensor_dev_attr_in0_max.dev_attr.attr, &sensor_dev_attr_in0_alarm.dev_attr.attr, &sensor_dev_attr_in1_input.dev_attr.attr, &sensor_dev_attr_in1_min.dev_attr.attr, &sensor_dev_attr_in1_max.dev_attr.attr, &sensor_dev_attr_in1_alarm.dev_attr.attr, &sensor_dev_attr_in2_input.dev_attr.attr, &sensor_dev_attr_in2_min.dev_attr.attr, &sensor_dev_attr_in2_max.dev_attr.attr, &sensor_dev_attr_in2_alarm.dev_attr.attr, &sensor_dev_attr_in3_input.dev_attr.attr, &sensor_dev_attr_in3_min.dev_attr.attr, &sensor_dev_attr_in3_max.dev_attr.attr, &sensor_dev_attr_in3_alarm.dev_attr.attr, &sensor_dev_attr_in4_input.dev_attr.attr, &sensor_dev_attr_in4_min.dev_attr.attr, &sensor_dev_attr_in4_max.dev_attr.attr, &sensor_dev_attr_in4_alarm.dev_attr.attr, &sensor_dev_attr_in5_input.dev_attr.attr, &sensor_dev_attr_in5_min.dev_attr.attr, &sensor_dev_attr_in5_max.dev_attr.attr, &sensor_dev_attr_in5_alarm.dev_attr.attr, &sensor_dev_attr_in6_input.dev_attr.attr, &sensor_dev_attr_in6_min.dev_attr.attr, &sensor_dev_attr_in6_max.dev_attr.attr, &sensor_dev_attr_in6_alarm.dev_attr.attr, /* Temperatures */ &sensor_dev_attr_temp1_input.dev_attr.attr, &sensor_dev_attr_temp1_min.dev_attr.attr, &sensor_dev_attr_temp1_max.dev_attr.attr, &sensor_dev_attr_temp1_alarm.dev_attr.attr, &sensor_dev_attr_temp1_fault.dev_attr.attr, &sensor_dev_attr_temp2_input.dev_attr.attr, &sensor_dev_attr_temp2_min.dev_attr.attr, &sensor_dev_attr_temp2_max.dev_attr.attr, &sensor_dev_attr_temp2_alarm.dev_attr.attr, &sensor_dev_attr_temp2_fault.dev_attr.attr, &sensor_dev_attr_temp3_input.dev_attr.attr, &sensor_dev_attr_temp3_min.dev_attr.attr, &sensor_dev_attr_temp3_max.dev_attr.attr, &sensor_dev_attr_temp3_alarm.dev_attr.attr, &sensor_dev_attr_temp3_fault.dev_attr.attr, /* Zones */ &sensor_dev_attr_zone1_auto_point1_temp.dev_attr.attr, &sensor_dev_attr_zone1_auto_point2_temp.dev_attr.attr, &sensor_dev_attr_zone1_auto_point3_temp.dev_attr.attr, &sensor_dev_attr_zone1_auto_channels_temp.dev_attr.attr, &sensor_dev_attr_zone2_auto_point1_temp.dev_attr.attr, &sensor_dev_attr_zone2_auto_point2_temp.dev_attr.attr, &sensor_dev_attr_zone2_auto_point3_temp.dev_attr.attr, &sensor_dev_attr_zone2_auto_channels_temp.dev_attr.attr, NULL }; static const struct attribute_group dme1737_group = { .attrs = dme1737_attr, }; /* The following struct holds temp offset attributes, which are not available * in all chips. The following chips support them: * DME1737, SCH311x */ static struct attribute *dme1737_temp_offset_attr[] = { &sensor_dev_attr_temp1_offset.dev_attr.attr, &sensor_dev_attr_temp2_offset.dev_attr.attr, &sensor_dev_attr_temp3_offset.dev_attr.attr, NULL }; static const struct attribute_group dme1737_temp_offset_group = { .attrs = dme1737_temp_offset_attr, }; /* The following struct holds VID related attributes, which are not available * in all chips. The following chips support them: * DME1737 */ static struct attribute *dme1737_vid_attr[] = { &dev_attr_vrm.attr, &dev_attr_cpu0_vid.attr, NULL }; static const struct attribute_group dme1737_vid_group = { .attrs = dme1737_vid_attr, }; /* The following struct holds temp zone 3 related attributes, which are not * available in all chips. The following chips support them: * DME1737, SCH311x, SCH5027 */ static struct attribute *dme1737_zone3_attr[] = { &sensor_dev_attr_zone3_auto_point1_temp.dev_attr.attr, &sensor_dev_attr_zone3_auto_point2_temp.dev_attr.attr, &sensor_dev_attr_zone3_auto_point3_temp.dev_attr.attr, &sensor_dev_attr_zone3_auto_channels_temp.dev_attr.attr, NULL }; static const struct attribute_group dme1737_zone3_group = { .attrs = dme1737_zone3_attr, }; /* The following struct holds temp zone hysteresis related attributes, which * are not available in all chips. The following chips support them: * DME1737, SCH311x */ static struct attribute *dme1737_zone_hyst_attr[] = { &sensor_dev_attr_zone1_auto_point1_temp_hyst.dev_attr.attr, &sensor_dev_attr_zone2_auto_point1_temp_hyst.dev_attr.attr, &sensor_dev_attr_zone3_auto_point1_temp_hyst.dev_attr.attr, NULL }; static const struct attribute_group dme1737_zone_hyst_group = { .attrs = dme1737_zone_hyst_attr, }; /* The following structs hold the PWM attributes, some of which are optional. * Their creation depends on the chip configuration which is determined during * module load. */ static struct attribute *dme1737_pwm1_attr[] = { &sensor_dev_attr_pwm1.dev_attr.attr, &sensor_dev_attr_pwm1_freq.dev_attr.attr, &sensor_dev_attr_pwm1_enable.dev_attr.attr, &sensor_dev_attr_pwm1_ramp_rate.dev_attr.attr, &sensor_dev_attr_pwm1_auto_channels_zone.dev_attr.attr, &sensor_dev_attr_pwm1_auto_point1_pwm.dev_attr.attr, &sensor_dev_attr_pwm1_auto_point2_pwm.dev_attr.attr, NULL }; static struct attribute *dme1737_pwm2_attr[] = { &sensor_dev_attr_pwm2.dev_attr.attr, &sensor_dev_attr_pwm2_freq.dev_attr.attr, &sensor_dev_attr_pwm2_enable.dev_attr.attr, &sensor_dev_attr_pwm2_ramp_rate.dev_attr.attr, &sensor_dev_attr_pwm2_auto_channels_zone.dev_attr.attr, &sensor_dev_attr_pwm2_auto_point1_pwm.dev_attr.attr, &sensor_dev_attr_pwm2_auto_point2_pwm.dev_attr.attr, NULL }; static struct attribute *dme1737_pwm3_attr[] = { &sensor_dev_attr_pwm3.dev_attr.attr, &sensor_dev_attr_pwm3_freq.dev_attr.attr, &sensor_dev_attr_pwm3_enable.dev_attr.attr, &sensor_dev_attr_pwm3_ramp_rate.dev_attr.attr, &sensor_dev_attr_pwm3_auto_channels_zone.dev_attr.attr, &sensor_dev_attr_pwm3_auto_point1_pwm.dev_attr.attr, &sensor_dev_attr_pwm3_auto_point2_pwm.dev_attr.attr, NULL }; static struct attribute *dme1737_pwm5_attr[] = { &sensor_dev_attr_pwm5.dev_attr.attr, &sensor_dev_attr_pwm5_freq.dev_attr.attr, &sensor_dev_attr_pwm5_enable.dev_attr.attr, NULL }; static struct attribute *dme1737_pwm6_attr[] = { &sensor_dev_attr_pwm6.dev_attr.attr, &sensor_dev_attr_pwm6_freq.dev_attr.attr, &sensor_dev_attr_pwm6_enable.dev_attr.attr, NULL }; static const struct attribute_group dme1737_pwm_group[] = { { .attrs = dme1737_pwm1_attr }, { .attrs = dme1737_pwm2_attr }, { .attrs = dme1737_pwm3_attr }, { .attrs = NULL }, { .attrs = dme1737_pwm5_attr }, { .attrs = dme1737_pwm6_attr }, }; /* The following struct holds auto PWM min attributes, which are not available * in all chips. Their creation depends on the chip type which is determined * during module load. */ static struct attribute *dme1737_auto_pwm_min_attr[] = { &sensor_dev_attr_pwm1_auto_pwm_min.dev_attr.attr, &sensor_dev_attr_pwm2_auto_pwm_min.dev_attr.attr, &sensor_dev_attr_pwm3_auto_pwm_min.dev_attr.attr, }; /* The following structs hold the fan attributes, some of which are optional. * Their creation depends on the chip configuration which is determined during * module load. */ static struct attribute *dme1737_fan1_attr[] = { &sensor_dev_attr_fan1_input.dev_attr.attr, &sensor_dev_attr_fan1_min.dev_attr.attr, &sensor_dev_attr_fan1_alarm.dev_attr.attr, &sensor_dev_attr_fan1_type.dev_attr.attr, NULL }; static struct attribute *dme1737_fan2_attr[] = { &sensor_dev_attr_fan2_input.dev_attr.attr, &sensor_dev_attr_fan2_min.dev_attr.attr, &sensor_dev_attr_fan2_alarm.dev_attr.attr, &sensor_dev_attr_fan2_type.dev_attr.attr, NULL }; static struct attribute *dme1737_fan3_attr[] = { &sensor_dev_attr_fan3_input.dev_attr.attr, &sensor_dev_attr_fan3_min.dev_attr.attr, &sensor_dev_attr_fan3_alarm.dev_attr.attr, &sensor_dev_attr_fan3_type.dev_attr.attr, NULL }; static struct attribute *dme1737_fan4_attr[] = { &sensor_dev_attr_fan4_input.dev_attr.attr, &sensor_dev_attr_fan4_min.dev_attr.attr, &sensor_dev_attr_fan4_alarm.dev_attr.attr, &sensor_dev_attr_fan4_type.dev_attr.attr, NULL }; static struct attribute *dme1737_fan5_attr[] = { &sensor_dev_attr_fan5_input.dev_attr.attr, &sensor_dev_attr_fan5_min.dev_attr.attr, &sensor_dev_attr_fan5_alarm.dev_attr.attr, &sensor_dev_attr_fan5_max.dev_attr.attr, NULL }; static struct attribute *dme1737_fan6_attr[] = { &sensor_dev_attr_fan6_input.dev_attr.attr, &sensor_dev_attr_fan6_min.dev_attr.attr, &sensor_dev_attr_fan6_alarm.dev_attr.attr, &sensor_dev_attr_fan6_max.dev_attr.attr, NULL }; static const struct attribute_group dme1737_fan_group[] = { { .attrs = dme1737_fan1_attr }, { .attrs = dme1737_fan2_attr }, { .attrs = dme1737_fan3_attr }, { .attrs = dme1737_fan4_attr }, { .attrs = dme1737_fan5_attr }, { .attrs = dme1737_fan6_attr }, }; /* The permissions of the following zone attributes are changed to read- * writeable if the chip is *not* locked. Otherwise they stay read-only. */ static struct attribute *dme1737_zone_chmod_attr[] = { &sensor_dev_attr_zone1_auto_point1_temp.dev_attr.attr, &sensor_dev_attr_zone1_auto_point2_temp.dev_attr.attr, &sensor_dev_attr_zone1_auto_point3_temp.dev_attr.attr, &sensor_dev_attr_zone2_auto_point1_temp.dev_attr.attr, &sensor_dev_attr_zone2_auto_point2_temp.dev_attr.attr, &sensor_dev_attr_zone2_auto_point3_temp.dev_attr.attr, NULL }; static const struct attribute_group dme1737_zone_chmod_group = { .attrs = dme1737_zone_chmod_attr, }; /* The permissions of the following zone 3 attributes are changed to read- * writeable if the chip is *not* locked. Otherwise they stay read-only. */ static struct attribute *dme1737_zone3_chmod_attr[] = { &sensor_dev_attr_zone3_auto_point1_temp.dev_attr.attr, &sensor_dev_attr_zone3_auto_point2_temp.dev_attr.attr, &sensor_dev_attr_zone3_auto_point3_temp.dev_attr.attr, NULL }; static const struct attribute_group dme1737_zone3_chmod_group = { .attrs = dme1737_zone3_chmod_attr, }; /* The permissions of the following PWM attributes are changed to read- * writeable if the chip is *not* locked and the respective PWM is available. * Otherwise they stay read-only. */ static struct attribute *dme1737_pwm1_chmod_attr[] = { &sensor_dev_attr_pwm1_freq.dev_attr.attr, &sensor_dev_attr_pwm1_enable.dev_attr.attr, &sensor_dev_attr_pwm1_ramp_rate.dev_attr.attr, &sensor_dev_attr_pwm1_auto_channels_zone.dev_attr.attr, &sensor_dev_attr_pwm1_auto_point1_pwm.dev_attr.attr, NULL }; static struct attribute *dme1737_pwm2_chmod_attr[] = { &sensor_dev_attr_pwm2_freq.dev_attr.attr, &sensor_dev_attr_pwm2_enable.dev_attr.attr, &sensor_dev_attr_pwm2_ramp_rate.dev_attr.attr, &sensor_dev_attr_pwm2_auto_channels_zone.dev_attr.attr, &sensor_dev_attr_pwm2_auto_point1_pwm.dev_attr.attr, NULL }; static struct attribute *dme1737_pwm3_chmod_attr[] = { &sensor_dev_attr_pwm3_freq.dev_attr.attr, &sensor_dev_attr_pwm3_enable.dev_attr.attr, &sensor_dev_attr_pwm3_ramp_rate.dev_attr.attr, &sensor_dev_attr_pwm3_auto_channels_zone.dev_attr.attr, &sensor_dev_attr_pwm3_auto_point1_pwm.dev_attr.attr, NULL }; static struct attribute *dme1737_pwm5_chmod_attr[] = { &sensor_dev_attr_pwm5.dev_attr.attr, &sensor_dev_attr_pwm5_freq.dev_attr.attr, NULL }; static struct attribute *dme1737_pwm6_chmod_attr[] = { &sensor_dev_attr_pwm6.dev_attr.attr, &sensor_dev_attr_pwm6_freq.dev_attr.attr, NULL }; static const struct attribute_group dme1737_pwm_chmod_group[] = { { .attrs = dme1737_pwm1_chmod_attr }, { .attrs = dme1737_pwm2_chmod_attr }, { .attrs = dme1737_pwm3_chmod_attr }, { .attrs = NULL }, { .attrs = dme1737_pwm5_chmod_attr }, { .attrs = dme1737_pwm6_chmod_attr }, }; /* Pwm[1-3] are read-writeable if the associated pwm is in manual mode and the * chip is not locked. Otherwise they are read-only. */ static struct attribute *dme1737_pwm_chmod_attr[] = { &sensor_dev_attr_pwm1.dev_attr.attr, &sensor_dev_attr_pwm2.dev_attr.attr, &sensor_dev_attr_pwm3.dev_attr.attr, }; /* --------------------------------------------------------------------- * Super-IO functions * --------------------------------------------------------------------- */ static inline void dme1737_sio_enter(int sio_cip) { outb(0x55, sio_cip); } static inline void dme1737_sio_exit(int sio_cip) { outb(0xaa, sio_cip); } static inline int dme1737_sio_inb(int sio_cip, int reg) { outb(reg, sio_cip); return inb(sio_cip + 1); } static inline void dme1737_sio_outb(int sio_cip, int reg, int val) { outb(reg, sio_cip); outb(val, sio_cip + 1); } /* --------------------------------------------------------------------- * Device initialization * --------------------------------------------------------------------- */ static int dme1737_i2c_get_features(int, struct dme1737_data*); static void dme1737_chmod_file(struct device *dev, struct attribute *attr, mode_t mode) { if (sysfs_chmod_file(&dev->kobj, attr, mode)) { dev_warn(dev, "Failed to change permissions of %s.\n", attr->name); } } static void dme1737_chmod_group(struct device *dev, const struct attribute_group *group, mode_t mode) { struct attribute **attr; for (attr = group->attrs; *attr; attr++) { dme1737_chmod_file(dev, *attr, mode); } } static void dme1737_remove_files(struct device *dev) { struct dme1737_data *data = dev_get_drvdata(dev); int ix; for (ix = 0; ix < ARRAY_SIZE(dme1737_fan_group); ix++) { if (data->has_features & HAS_FAN(ix)) { sysfs_remove_group(&dev->kobj, &dme1737_fan_group[ix]); } } for (ix = 0; ix < ARRAY_SIZE(dme1737_pwm_group); ix++) { if (data->has_features & HAS_PWM(ix)) { sysfs_remove_group(&dev->kobj, &dme1737_pwm_group[ix]); if ((data->has_features & HAS_PWM_MIN) && ix < 3) { sysfs_remove_file(&dev->kobj, dme1737_auto_pwm_min_attr[ix]); } } } if (data->has_features & HAS_TEMP_OFFSET) { sysfs_remove_group(&dev->kobj, &dme1737_temp_offset_group); } if (data->has_features & HAS_VID) { sysfs_remove_group(&dev->kobj, &dme1737_vid_group); } if (data->has_features & HAS_ZONE3) { sysfs_remove_group(&dev->kobj, &dme1737_zone3_group); } if (data->has_features & HAS_ZONE_HYST) { sysfs_remove_group(&dev->kobj, &dme1737_zone_hyst_group); } sysfs_remove_group(&dev->kobj, &dme1737_group); if (!data->client) { sysfs_remove_file(&dev->kobj, &dev_attr_name.attr); } } static int dme1737_create_files(struct device *dev) { struct dme1737_data *data = dev_get_drvdata(dev); int err, ix; /* Create a name attribute for ISA devices */ if (!data->client && (err = sysfs_create_file(&dev->kobj, &dev_attr_name.attr))) { goto exit; } /* Create standard sysfs attributes */ if ((err = sysfs_create_group(&dev->kobj, &dme1737_group))) { goto exit_remove; } /* Create chip-dependent sysfs attributes */ if ((data->has_features & HAS_TEMP_OFFSET) && (err = sysfs_create_group(&dev->kobj, &dme1737_temp_offset_group))) { goto exit_remove; } if ((data->has_features & HAS_VID) && (err = sysfs_create_group(&dev->kobj, &dme1737_vid_group))) { goto exit_remove; } if ((data->has_features & HAS_ZONE3) && (err = sysfs_create_group(&dev->kobj, &dme1737_zone3_group))) { goto exit_remove; } if ((data->has_features & HAS_ZONE_HYST) && (err = sysfs_create_group(&dev->kobj, &dme1737_zone_hyst_group))) { goto exit_remove; } /* Create fan sysfs attributes */ for (ix = 0; ix < ARRAY_SIZE(dme1737_fan_group); ix++) { if (data->has_features & HAS_FAN(ix)) { if ((err = sysfs_create_group(&dev->kobj, &dme1737_fan_group[ix]))) { goto exit_remove; } } } /* Create PWM sysfs attributes */ for (ix = 0; ix < ARRAY_SIZE(dme1737_pwm_group); ix++) { if (data->has_features & HAS_PWM(ix)) { if ((err = sysfs_create_group(&dev->kobj, &dme1737_pwm_group[ix]))) { goto exit_remove; } if ((data->has_features & HAS_PWM_MIN) && ix < 3 && (err = sysfs_create_file(&dev->kobj, dme1737_auto_pwm_min_attr[ix]))) { goto exit_remove; } } } /* Inform if the device is locked. Otherwise change the permissions of * selected attributes from read-only to read-writeable. */ if (data->config & 0x02) { dev_info(dev, "Device is locked. Some attributes " "will be read-only.\n"); } else { /* Change permissions of zone sysfs attributes */ dme1737_chmod_group(dev, &dme1737_zone_chmod_group, S_IRUGO | S_IWUSR); /* Change permissions of chip-dependent sysfs attributes */ if (data->has_features & HAS_TEMP_OFFSET) { dme1737_chmod_group(dev, &dme1737_temp_offset_group, S_IRUGO | S_IWUSR); } if (data->has_features & HAS_ZONE3) { dme1737_chmod_group(dev, &dme1737_zone3_chmod_group, S_IRUGO | S_IWUSR); } if (data->has_features & HAS_ZONE_HYST) { dme1737_chmod_group(dev, &dme1737_zone_hyst_group, S_IRUGO | S_IWUSR); } /* Change permissions of PWM sysfs attributes */ for (ix = 0; ix < ARRAY_SIZE(dme1737_pwm_chmod_group); ix++) { if (data->has_features & HAS_PWM(ix)) { dme1737_chmod_group(dev, &dme1737_pwm_chmod_group[ix], S_IRUGO | S_IWUSR); if ((data->has_features & HAS_PWM_MIN) && ix < 3) { dme1737_chmod_file(dev, dme1737_auto_pwm_min_attr[ix], S_IRUGO | S_IWUSR); } } } /* Change permissions of pwm[1-3] if in manual mode */ for (ix = 0; ix < 3; ix++) { if ((data->has_features & HAS_PWM(ix)) && (PWM_EN_FROM_REG(data->pwm_config[ix]) == 1)) { dme1737_chmod_file(dev, dme1737_pwm_chmod_attr[ix], S_IRUGO | S_IWUSR); } } } return 0; exit_remove: dme1737_remove_files(dev); exit: return err; } static int dme1737_init_device(struct device *dev) { struct dme1737_data *data = dev_get_drvdata(dev); struct i2c_client *client = data->client; int ix; u8 reg; /* Point to the right nominal voltages array */ data->in_nominal = IN_NOMINAL(data->type); data->config = dme1737_read(data, DME1737_REG_CONFIG); /* Inform if part is not monitoring/started */ if (!(data->config & 0x01)) { if (!force_start) { dev_err(dev, "Device is not monitoring. " "Use the force_start load parameter to " "override.\n"); return -EFAULT; } /* Force monitoring */ data->config |= 0x01; dme1737_write(data, DME1737_REG_CONFIG, data->config); } /* Inform if part is not ready */ if (!(data->config & 0x04)) { dev_err(dev, "Device is not ready.\n"); return -EFAULT; } /* Determine which optional fan and pwm features are enabled (only * valid for I2C devices) */ if (client) { /* I2C chip */ data->config2 = dme1737_read(data, DME1737_REG_CONFIG2); /* Check if optional fan3 input is enabled */ if (data->config2 & 0x04) { data->has_features |= HAS_FAN(2); } /* Fan4 and pwm3 are only available if the client's I2C address * is the default 0x2e. Otherwise the I/Os associated with * these functions are used for addr enable/select. */ if (client->addr == 0x2e) { data->has_features |= HAS_FAN(3) | HAS_PWM(2); } /* Determine which of the optional fan[5-6] and pwm[5-6] * features are enabled. For this, we need to query the runtime * registers through the Super-IO LPC interface. Try both * config ports 0x2e and 0x4e. */ if (dme1737_i2c_get_features(0x2e, data) && dme1737_i2c_get_features(0x4e, data)) { dev_warn(dev, "Failed to query Super-IO for optional " "features.\n"); } } /* Fan[1-2] and pwm[1-2] are present in all chips */ data->has_features |= HAS_FAN(0) | HAS_FAN(1) | HAS_PWM(0) | HAS_PWM(1); /* Chip-dependent features */ switch (data->type) { case dme1737: data->has_features |= HAS_TEMP_OFFSET | HAS_VID | HAS_ZONE3 | HAS_ZONE_HYST | HAS_PWM_MIN; break; case sch311x: data->has_features |= HAS_TEMP_OFFSET | HAS_ZONE3 | HAS_ZONE_HYST | HAS_PWM_MIN | HAS_FAN(2) | HAS_PWM(2); break; case sch5027: data->has_features |= HAS_ZONE3; break; case sch5127: data->has_features |= HAS_FAN(2) | HAS_PWM(2); break; default: break; } dev_info(dev, "Optional features: pwm3=%s, pwm5=%s, pwm6=%s, " "fan3=%s, fan4=%s, fan5=%s, fan6=%s.\n", (data->has_features & HAS_PWM(2)) ? "yes" : "no", (data->has_features & HAS_PWM(4)) ? "yes" : "no", (data->has_features & HAS_PWM(5)) ? "yes" : "no", (data->has_features & HAS_FAN(2)) ? "yes" : "no", (data->has_features & HAS_FAN(3)) ? "yes" : "no", (data->has_features & HAS_FAN(4)) ? "yes" : "no", (data->has_features & HAS_FAN(5)) ? "yes" : "no"); reg = dme1737_read(data, DME1737_REG_TACH_PWM); /* Inform if fan-to-pwm mapping differs from the default */ if (client && reg != 0xa4) { /* I2C chip */ dev_warn(dev, "Non-standard fan to pwm mapping: " "fan1->pwm%d, fan2->pwm%d, fan3->pwm%d, " "fan4->pwm%d. Please report to the driver " "maintainer.\n", (reg & 0x03) + 1, ((reg >> 2) & 0x03) + 1, ((reg >> 4) & 0x03) + 1, ((reg >> 6) & 0x03) + 1); } else if (!client && reg != 0x24) { /* ISA chip */ dev_warn(dev, "Non-standard fan to pwm mapping: " "fan1->pwm%d, fan2->pwm%d, fan3->pwm%d. " "Please report to the driver maintainer.\n", (reg & 0x03) + 1, ((reg >> 2) & 0x03) + 1, ((reg >> 4) & 0x03) + 1); } /* Switch pwm[1-3] to manual mode if they are currently disabled and * set the duty-cycles to 0% (which is identical to the PWMs being * disabled). */ if (!(data->config & 0x02)) { for (ix = 0; ix < 3; ix++) { data->pwm_config[ix] = dme1737_read(data, DME1737_REG_PWM_CONFIG(ix)); if ((data->has_features & HAS_PWM(ix)) && (PWM_EN_FROM_REG(data->pwm_config[ix]) == -1)) { dev_info(dev, "Switching pwm%d to " "manual mode.\n", ix + 1); data->pwm_config[ix] = PWM_EN_TO_REG(1, data->pwm_config[ix]); dme1737_write(data, DME1737_REG_PWM(ix), 0); dme1737_write(data, DME1737_REG_PWM_CONFIG(ix), data->pwm_config[ix]); } } } /* Initialize the default PWM auto channels zone (acz) assignments */ data->pwm_acz[0] = 1; /* pwm1 -> zone1 */ data->pwm_acz[1] = 2; /* pwm2 -> zone2 */ data->pwm_acz[2] = 4; /* pwm3 -> zone3 */ /* Set VRM */ if (data->has_features & HAS_VID) { data->vrm = vid_which_vrm(); } return 0; } /* --------------------------------------------------------------------- * I2C device detection and registration * --------------------------------------------------------------------- */ static struct i2c_driver dme1737_i2c_driver; static int dme1737_i2c_get_features(int sio_cip, struct dme1737_data *data) { int err = 0, reg; u16 addr; dme1737_sio_enter(sio_cip); /* Check device ID * We currently know about two kinds of DME1737 and SCH5027. */ reg = force_id ? force_id : dme1737_sio_inb(sio_cip, 0x20); if (!(reg == DME1737_ID_1 || reg == DME1737_ID_2 || reg == SCH5027_ID)) { err = -ENODEV; goto exit; } /* Select logical device A (runtime registers) */ dme1737_sio_outb(sio_cip, 0x07, 0x0a); /* Get the base address of the runtime registers */ if (!(addr = (dme1737_sio_inb(sio_cip, 0x60) << 8) | dme1737_sio_inb(sio_cip, 0x61))) { err = -ENODEV; goto exit; } /* Read the runtime registers to determine which optional features * are enabled and available. Bits [3:2] of registers 0x43-0x46 are set * to '10' if the respective feature is enabled. */ if ((inb(addr + 0x43) & 0x0c) == 0x08) { /* fan6 */ data->has_features |= HAS_FAN(5); } if ((inb(addr + 0x44) & 0x0c) == 0x08) { /* pwm6 */ data->has_features |= HAS_PWM(5); } if ((inb(addr + 0x45) & 0x0c) == 0x08) { /* fan5 */ data->has_features |= HAS_FAN(4); } if ((inb(addr + 0x46) & 0x0c) == 0x08) { /* pwm5 */ data->has_features |= HAS_PWM(4); } exit: dme1737_sio_exit(sio_cip); return err; } /* Return 0 if detection is successful, -ENODEV otherwise */ static int dme1737_i2c_detect(struct i2c_client *client, struct i2c_board_info *info) { struct i2c_adapter *adapter = client->adapter; struct device *dev = &adapter->dev; u8 company, verstep = 0; const char *name; if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA)) { return -ENODEV; } company = i2c_smbus_read_byte_data(client, DME1737_REG_COMPANY); verstep = i2c_smbus_read_byte_data(client, DME1737_REG_VERSTEP); if (company == DME1737_COMPANY_SMSC && verstep == SCH5027_VERSTEP) { name = "sch5027"; } else if (company == DME1737_COMPANY_SMSC && (verstep & DME1737_VERSTEP_MASK) == DME1737_VERSTEP) { name = "dme1737"; } else { return -ENODEV; } dev_info(dev, "Found a %s chip at 0x%02x (rev 0x%02x).\n", verstep == SCH5027_VERSTEP ? "SCH5027" : "DME1737", client->addr, verstep); strlcpy(info->type, name, I2C_NAME_SIZE); return 0; } static int dme1737_i2c_probe(struct i2c_client *client, const struct i2c_device_id *id) { struct dme1737_data *data; struct device *dev = &client->dev; int err; data = kzalloc(sizeof(struct dme1737_data), GFP_KERNEL); if (!data) { err = -ENOMEM; goto exit; } i2c_set_clientdata(client, data); data->type = id->driver_data; data->client = client; data->name = client->name; mutex_init(&data->update_lock); /* Initialize the DME1737 chip */ if ((err = dme1737_init_device(dev))) { dev_err(dev, "Failed to initialize device.\n"); goto exit_kfree; } /* Create sysfs files */ if ((err = dme1737_create_files(dev))) { dev_err(dev, "Failed to create sysfs files.\n"); goto exit_kfree; } /* Register device */ data->hwmon_dev = hwmon_device_register(dev); if (IS_ERR(data->hwmon_dev)) { dev_err(dev, "Failed to register device.\n"); err = PTR_ERR(data->hwmon_dev); goto exit_remove; } return 0; exit_remove: dme1737_remove_files(dev); exit_kfree: kfree(data); exit: return err; } static int dme1737_i2c_remove(struct i2c_client *client) { struct dme1737_data *data = i2c_get_clientdata(client); hwmon_device_unregister(data->hwmon_dev); dme1737_remove_files(&client->dev); kfree(data); return 0; } static const struct i2c_device_id dme1737_id[] = { { "dme1737", dme1737 }, { "sch5027", sch5027 }, { } }; MODULE_DEVICE_TABLE(i2c, dme1737_id); static struct i2c_driver dme1737_i2c_driver = { .class = I2C_CLASS_HWMON, .driver = { .name = "dme1737", }, .probe = dme1737_i2c_probe, .remove = dme1737_i2c_remove, .id_table = dme1737_id, .detect = dme1737_i2c_detect, .address_list = normal_i2c, }; /* --------------------------------------------------------------------- * ISA device detection and registration * --------------------------------------------------------------------- */ static int __init dme1737_isa_detect(int sio_cip, unsigned short *addr) { int err = 0, reg; unsigned short base_addr; dme1737_sio_enter(sio_cip); /* Check device ID * We currently know about SCH3112, SCH3114, SCH3116, and SCH5127 */ reg = force_id ? force_id : dme1737_sio_inb(sio_cip, 0x20); if (!(reg == SCH3112_ID || reg == SCH3114_ID || reg == SCH3116_ID || reg == SCH5127_ID)) { err = -ENODEV; goto exit; } /* Select logical device A (runtime registers) */ dme1737_sio_outb(sio_cip, 0x07, 0x0a); /* Get the base address of the runtime registers */ if (!(base_addr = (dme1737_sio_inb(sio_cip, 0x60) << 8) | dme1737_sio_inb(sio_cip, 0x61))) { printk(KERN_ERR "dme1737: Base address not set.\n"); err = -ENODEV; goto exit; } /* Access to the hwmon registers is through an index/data register * pair located at offset 0x70/0x71. */ *addr = base_addr + 0x70; exit: dme1737_sio_exit(sio_cip); return err; } static int __init dme1737_isa_device_add(unsigned short addr) { struct resource res = { .start = addr, .end = addr + DME1737_EXTENT - 1, .name = "dme1737", .flags = IORESOURCE_IO, }; int err; err = acpi_check_resource_conflict(&res); if (err) goto exit; if (!(pdev = platform_device_alloc("dme1737", addr))) { printk(KERN_ERR "dme1737: Failed to allocate device.\n"); err = -ENOMEM; goto exit; } if ((err = platform_device_add_resources(pdev, &res, 1))) { printk(KERN_ERR "dme1737: Failed to add device resource " "(err = %d).\n", err); goto exit_device_put; } if ((err = platform_device_add(pdev))) { printk(KERN_ERR "dme1737: Failed to add device (err = %d).\n", err); goto exit_device_put; } return 0; exit_device_put: platform_device_put(pdev); pdev = NULL; exit: return err; } static int __devinit dme1737_isa_probe(struct platform_device *pdev) { u8 company, device; struct resource *res; struct dme1737_data *data; struct device *dev = &pdev->dev; int err; res = platform_get_resource(pdev, IORESOURCE_IO, 0); if (!request_region(res->start, DME1737_EXTENT, "dme1737")) { dev_err(dev, "Failed to request region 0x%04x-0x%04x.\n", (unsigned short)res->start, (unsigned short)res->start + DME1737_EXTENT - 1); err = -EBUSY; goto exit; } if (!(data = kzalloc(sizeof(struct dme1737_data), GFP_KERNEL))) { err = -ENOMEM; goto exit_release_region; } data->addr = res->start; platform_set_drvdata(pdev, data); /* Skip chip detection if module is loaded with force_id parameter */ switch (force_id) { case SCH3112_ID: case SCH3114_ID: case SCH3116_ID: data->type = sch311x; break; case SCH5127_ID: data->type = sch5127; break; default: company = dme1737_read(data, DME1737_REG_COMPANY); device = dme1737_read(data, DME1737_REG_DEVICE); if ((company == DME1737_COMPANY_SMSC) && (device == SCH311X_DEVICE)) { data->type = sch311x; } else if ((company == DME1737_COMPANY_SMSC) && (device == SCH5127_DEVICE)) { data->type = sch5127; } else { err = -ENODEV; goto exit_kfree; } } if (data->type == sch5127) { data->name = "sch5127"; } else { data->name = "sch311x"; } /* Initialize the mutex */ mutex_init(&data->update_lock); dev_info(dev, "Found a %s chip at 0x%04x\n", data->type == sch5127 ? "SCH5127" : "SCH311x", data->addr); /* Initialize the chip */ if ((err = dme1737_init_device(dev))) { dev_err(dev, "Failed to initialize device.\n"); goto exit_kfree; } /* Create sysfs files */ if ((err = dme1737_create_files(dev))) { dev_err(dev, "Failed to create sysfs files.\n"); goto exit_kfree; } /* Register device */ data->hwmon_dev = hwmon_device_register(dev); if (IS_ERR(data->hwmon_dev)) { dev_err(dev, "Failed to register device.\n"); err = PTR_ERR(data->hwmon_dev); goto exit_remove_files; } return 0; exit_remove_files: dme1737_remove_files(dev); exit_kfree: platform_set_drvdata(pdev, NULL); kfree(data); exit_release_region: release_region(res->start, DME1737_EXTENT); exit: return err; } static int __devexit dme1737_isa_remove(struct platform_device *pdev) { struct dme1737_data *data = platform_get_drvdata(pdev); hwmon_device_unregister(data->hwmon_dev); dme1737_remove_files(&pdev->dev); release_region(data->addr, DME1737_EXTENT); platform_set_drvdata(pdev, NULL); kfree(data); return 0; } static struct platform_driver dme1737_isa_driver = { .driver = { .owner = THIS_MODULE, .name = "dme1737", }, .probe = dme1737_isa_probe, .remove = __devexit_p(dme1737_isa_remove), }; /* --------------------------------------------------------------------- * Module initialization and cleanup * --------------------------------------------------------------------- */ static int __init dme1737_init(void) { int err; unsigned short addr; if ((err = i2c_add_driver(&dme1737_i2c_driver))) { goto exit; } if (dme1737_isa_detect(0x2e, &addr) && dme1737_isa_detect(0x4e, &addr) && (!probe_all_addr || (dme1737_isa_detect(0x162e, &addr) && dme1737_isa_detect(0x164e, &addr)))) { /* Return 0 if we didn't find an ISA device */ return 0; } if ((err = platform_driver_register(&dme1737_isa_driver))) { goto exit_del_i2c_driver; } /* Sets global pdev as a side effect */ if ((err = dme1737_isa_device_add(addr))) { goto exit_del_isa_driver; } return 0; exit_del_isa_driver: platform_driver_unregister(&dme1737_isa_driver); exit_del_i2c_driver: i2c_del_driver(&dme1737_i2c_driver); exit: return err; } static void __exit dme1737_exit(void) { if (pdev) { platform_device_unregister(pdev); platform_driver_unregister(&dme1737_isa_driver); } i2c_del_driver(&dme1737_i2c_driver); } MODULE_AUTHOR("Juerg Haefliger <juergh@gmail.com>"); MODULE_DESCRIPTION("DME1737 sensors"); MODULE_LICENSE("GPL"); module_init(dme1737_init); module_exit(dme1737_exit);

looks good, test all usbs ports, sleep, shutdown, etc let me know

The wiki is broken because the authentication does not work and the developer who set it up is no where to be found. There's many other things there that are out of date as well. I don't know what to do about it.... You should revert your EDK2 before updating, where EDK2_DIR is your EDK2 path (or ../edk2 if in clover package directly inside EDK2) or you may have merge issues: pushd EDK2_DIR svn revert svn up popd Then copy the patches back.

replace, reboot and send me new SEND_ME with new files CLOVER.zip

Here's patch with shorter hex strings <dict> <key>Comment</key> <string>change 15 port limit to 22 in XHCI kext (270-series) 10.13.4</string> <key>Find</key> <data>g32UDw==</data> <key>MatchOS</key> <string>10.13.4</string> <key>Name</key> <string>com.apple.driver.usb.AppleUSBXHCI</string> <key>Replace</key> <data>g32UFg==</data> </dict>

<dict> <key>Comment</key> <string>USB 10.13.4+ by PMHeart</string> <key>Disabled</key> <true/> <key>Find</key> <data> g32UDw+DlwQAAA== </data> <key>InfoPlistPatch</key> <false/> <key>MatchOS</key> <string>10.13.x</string> <key>Name</key> <string>com.apple.driver.usb.AppleUSBXHCI</string> <key>Replace</key> <data> g32UD5CQkJCQkA== </data> </dict>

Here also no problems with Optiplex780 and DP7. Only the known audio problem.

Rev 4020 A possibility to patch boot.efi on the fly and a possibility to disable some of these patches from Clover GUI. What is "boot.efi"? Clover is Boot Manager providing us a chooser between different OS bootloaders: bootmgfw.efi for Windows grubx64.efi for Linux boot.efi for MacOS. Each substance of MacOS has own boot.efi located on the same volume in /System/Library/CoreServices/ This is EFI application working in EFI environment provided by UEFI BIOS or by CloverEFI. What boot.efi does? - create DeviceTree and fill it with initial information from EFI (SMBIOS, ACPI, DeviceProperties etc) - load kernel, kexts, caches... - make memory map - performs start OS, or hibernate wake, or NET load, or something else - ask user for password at FileVault2 - other preOS procedures Is it opensource? No. But we have some similar sources to see how it works macosxbootloader (Hackintosh version). and by Pike'R Alpha at github. I don't know the origin of the sources. // created: 4:11:2009 10:40 // filename: Console.cpp // author: tiamo Looking at the sources we can find what to patch for our purpose.