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SpeedStepping stuck x8 IvyBridge Power Management issue


macyB
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Hey,

 

I really need Expert's help regarding power management for ivy bridge i7 3537U. CStates,PStates stuck at x8

Currently i am using Mavericks OS X 10.9.2 (13C1021) without any DSDT.

No NullCPUPowerManagement.

patched AppleIntelPowerManagement.

SMBios: 

 - MacBookPro 10,1 (suggested by piker alpha)

 - Also tried MacBookAir5,2.

 - Boot fine with both until this step.

 

This is how i am doing it:

Downloaded script from here: https://github.com/Piker-Alpha/ssdtPRGen.sh/blob/master/ssdtPRGen.sh

in terminal:

sudo /Users/USERNAME/Desktop/ssdtPRGen.sh-master/ssdtPRGen.sh -w 3

Result:

ssdtPRGen.sh v0.9 Copyright (c) 2011-2012 by † RevoGirl
             v6.6 Copyright (c) 2013 by † Jeroen
             v13.2 Copyright (c) 2013-2014 by Pike R. Alpha
-----------------------------------------------------------
Bugs > https://github.com/Piker-Alpha/ssdtPRGen.sh/issues <

Override value: (-w) Ivy Bridge workarounds, now set to: 3!

System information: Mac OS X 10.9.2 (13C64)
Brandstring 'Intel(R) Core(TM) i7-3537U CPU @ 2.00GHz'

Scope (_PR_) {220 bytes} with ACPI Processor declarations found in the DSDT (ACPI 1.0 compliant)
Generating ssdt.dsl for a 'MacBookPro10,1' with board-id [Mac-C3EC7CD22292981F]
Ivy Bridge Core i7-3537U processor [0x306A9] setup [0x0701]
With a maximum TDP of 17 Watt, as specified by Intel
Number logical CPU's: 4 (Core Frequency: 2000 MHz)
Number of Turbo States: 11 (2100-3100 MHz)
Number of P-States: 24 (800-3100 MHz)
Adjusting C-States for detected (mobile) processor
Injected C-States for CPU0 (C1,C3,C6,C7)
Injected C-States for CPU1 (C1,C2,C3)

IASL not found. Creating target directory... Downloading iasl...
  % Total    % Received % Xferd  Average Speed   Time    Time     Time  Current
                                 Dload  Upload   Total   Spent    Left  Speed
  0     0    0     0    0     0      0      0 --:--:--  0:00:03 --:--:--     0
chmod: /usr/local/bin/iasl: No such file or directory
Done.
sudo: /usr/local/bin/iasl: command not found
Do you want to open ssdt.dsl (y/n)?

SSDT.aml placed in /Extra

CStates, PStates set to No

DropSSDT=Yes

 

after reboot i get Kernel Panic in normal mode but was able to boot in safe mode. i searched that panic, found SSDT need some tweaks and found below solution:

From:

Name (APLF, Zero)
        Name (APSN, 0x0C)
        Name (APSS, Package (0x19)
        {
            Package (0x06)
            {
                0x0C1D, 
                0x4268, 
                0x0A, 
                0x0A, 
                0x2000, 
                0x2000
            }, 

            Package (0x06)
            {
                0x0C1C, 
                0x4268, 
                0x0A, 
                0x0A, 
                0x1F00, 
                0x1F00
            },

To:

Name (APLF, Zero)
        Name (APSN, 11)
        Name (APSS, Package (0x18)
        {
            //Package (0x06)
            //{
            //    0x0C1D, 
            //    0x4268, 
            //    0x0A, 
            //    0x0A, 
            //    0x2000, 
            //    0x2000
            //}, 

            Package (0x06)
            {
                0x0C1C, 
                0x4268, 
                0x0A, 
                0x0A, 
                0x1F00, 
                0x1F00
            },

Kernel Panic gone, booting perfectly fine.

Now P States in DPCIManageer (tried intel power gadget too):

 

4/27/14, 2:25:08 AM, Current State: 8

4/27/14, 2:25:08 AM, P States: 8

4/27/14, 2:25:03 AM, Current State: 8

4/27/14, 2:25:03 AM, P States: I/O error, throttling to 9Hz

 

 

PStates stuck to 8 and never change.

 

Without SSDT, CStates, PStates set to Yes

DropSSDT=No then i get only two PStates 8, 19  :unsure:

 

Please let me know if you need further details to figure out the problem.

I searched a lot and tried many methods but all in vain. Its my 6th Installation of OS X today  :wallbash:

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Thanks for quick response. I already tried both ways but no luck.

 

-TURBO 3100 and -w 3

 

Did you modify your SSDT?? As i mentioned if i don't apply that tweak to my SSDT i get kernel panic in normal mode.

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If it's not your SSDT, it may be your smbios.  Which are you using and what type of motherboard do you have - sandy, ivy or haswell?

 

Please check my signatures for laptop specifications.

MacBookPro 10,1 was stucked in x8 so i changed smbios and regenerated the ssdt using method mentioned above. (-w 3)

 - This time ssdt code is different than before, i did not tweaked it, also i did not get kernel panic.

right now i am using MacBookAir5,2

HWMonitor showing c,pstates x8 x19, 792Mhz 1.88Ghz no more.

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For IvyBridge U CPU, you can try using MacBook Air 5,2, patch your mach_kernel with this http://www.insanelymac.com/forum/topic/293503-haswell-early-reboot-mavericks-locked-msrs-and-hp-envy-15-j063cl-i7-4700mq/ (no need if you're using Clover), then boot with "-xcpm" bootflag. After restart, use ssdtprgen to regenerate ssdt (with/without -w 3)

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For IvyBridge U CPU, you can try using MacBook Air 5,2, patch your mach_kernel with this http://www.insanelymac.com/forum/topic/293503-haswell-early-reboot-mavericks-locked-msrs-and-hp-envy-15-j063cl-i7-4700mq/ (no need if you're using Clover), then boot with "-xcpm" bootflag. After restart, use ssdtprgen to regenerate ssdt (with/without -w 3)

 

Now SMBios is MacBook Air 5,2

mach_kernel patched using suggested guide. MD5 was different than the guide.

MD5 (mach_kernel) = b673900061f352a8ca6d06b176f6f660 (is it because of new update OS X 10.9.2 (13C1021)?? )

C,PStates=Yes and DropSSDT=No

rebooted with -xcpm

 

Before generating SSDT, Result of DPCIManager:

 

4/27/14, 12:35:31 PM, Current State: 8

4/27/14, 12:35:31 PM, P States: 8, 14, 17, 20, 25, 28, 29

4/27/14, 12:35:26 PM, Current State: 14

4/27/14, 12:35:26 PM, P States: 8, 14, 17, 20, 25, 28, 29

4/27/14, 12:35:21 PM, Current State: 8

4/27/14, 12:35:21 PM, P States: 8, 14, 17, 20, 25, 28, 29

4/27/14, 12:35:16 PM, Current State: 8

4/27/14, 12:35:16 PM, P States: 8, 14, 17, 20, 25, 28, 29

4/27/14, 12:35:12 PM, P States: I/O error, throttling to 8Hz

4/27/14, 12:35:12 PM, Current State: 8

4/27/14, 12:35:12 PM, P States: 8, 14, 17, 20, 25, 28, 29

4/27/14, 12:35:07 PM, Current State: 20

4/27/14, 12:35:07 PM, P States: 8, 14, 17, 20, 25, 28, 29

4/27/14, 12:35:02 PM, Current State: 14

4/27/14, 12:35:02 PM, P States: 8, 14, 17, 20, 25, 28, 29

4/27/14, 12:34:59 PM, P States: I/O error, throttling to 9Hz

4/27/14, 12:34:58 PM, Current State: 8

4/27/14, 12:34:58 PM, P States: 8, 14, 17, 20, 25, 28, 29

4/27/14, 12:34:53 PM, Current State: 8

4/27/14, 12:34:53 PM, P States: 8, 14, 17, 20, 25, 28, 29

4/27/14, 12:34:48 PM, Current State: 14

4/27/14, 12:34:48 PM, P States: 8, 14, 17, 20, 25, 28, 29

 

SSDT Generated using:

sudo /Users/USERNAME/Desktop/ssdtPRGen.sh-master/ssdtPRGen.sh -w 3

C,PStates=No and DropSSDT=Yes.

 

reboot WITHOUT -xcpm

Result of DPCIManager was same as before x8 x19 only

 

reboot with -xcpm

Result of DPCIManager:

4/27/14, 12:51:29 PM, Current State: 14

4/27/14, 12:51:29 PM, P States: 8, 14, 17, 20, 25, 29

4/27/14, 12:51:24 PM, Current State: 14

4/27/14, 12:51:24 PM, P States: 8, 14, 17, 20, 25, 29

4/27/14, 12:51:19 PM, Current State: 8

4/27/14, 12:51:19 PM, P States: 8, 14, 17, 20, 25, 29

4/27/14, 12:51:14 PM, Current State: 8

4/27/14, 12:51:14 PM, P States: 8, 14, 17, 20, 25, 29

4/27/14, 12:51:09 PM, Current State: 29

4/27/14, 12:51:09 PM, P States: 8, 14, 17, 20, 25, 29

4/27/14, 12:51:04 PM, Current State: 14

4/27/14, 12:51:04 PM, P States: 8, 14, 17, 20, 25, 29

4/27/14, 12:50:59 PM, Current State: 8

4/27/14, 12:50:59 PM, P States: 8, 14, 17, 20, 25, 29

4/27/14, 12:50:54 PM, Current State: 20

4/27/14, 12:50:54 PM, P States: 8, 14, 17, 20, 25, 29

4/27/14, 12:50:49 PM, Current State: 29

4/27/14, 12:50:49 PM, P States: 8, 14, 17, 20, 25, 29

4/27/14, 12:50:44 PM, Current State: 8

4/27/14, 12:50:44 PM, P States: 8, 14, 17

4/27/14, 12:50:42 PM, P States: I/O error, throttling to 8Hz

4/27/14, 12:50:39 PM, Current State: 8

4/27/14, 12:50:39 PM, P States: 8, 14, 17

4/27/14, 12:50:37 PM, P States: I/O error, throttling to 9Hz

4/27/14, 12:50:34 PM, Current State: 8

4/27/14, 12:50:34 PM, P States: 8

 

is it working completely now?? why still showing error P States: I/O error, throttling to 9Hz ??

so i have to boot with -xcpm every time?

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Add xcpm to your org.chameleon.boot.plist, set drop ssdt=yes, generate=no

 

Great thanks! its working now. :yes:

 

P States: 8, 14, 17, 20, 24, 25, 29

 

 

but still not showing Max Turbo Frequency 3100MHz any suggestions?

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Put CPU Package in HWMonitor on your menu bar and run Geek Bench.  That should help you see if your laptop ever reaches 3100 MHz.

 

Cool its working  :thumbsup_anim:  P States: 8, 14, 17, 20, 22, 23, 24, 25, 28, 29

HWMonitor shows x30 x31 when it does then DPCIManager show this error P States: I/O error, throttling to xHz

 

thanks guys for all your help!

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  • 2 weeks later...

Hello,

 

For those who have core i5-3570K, here is the way to make work xcpm.

 

For  iMac13,2 you need to replace in IOPlatformPluginFamily.kext -> X86PlatformPlugin.kext -> Ressources -> Mac-FC02E91DDD3FA6A4.plist

with this one Mac-FC02E91DDD3FA6A4.plist.zip it had FrequencyVectors;

 

Don't forget to set boot-arg with  option -xcmp

 

Tested with clover boot loader.

 

ssdt to include

/*
 * Intel ACPI Component Architecture
 * AML Disassembler version 20140210-00 [Feb 10 2014]
 * Copyright (c) 2000 - 2014 Intel Corporation
 * 
 * Original Table Header:
 *     Signature        "SSDT"
 *     Length           0x0000036A (874)
 *     Revision         0x01
 *     Checksum         0x00
 *     OEM ID           "APPLE "
 *     OEM Table ID     "CpuPm"
 *     OEM Revision     0x00013400 (78848)
 *     Compiler ID      "INTL"
 *     Compiler Version 0x20140210 (538182160)
 */
 
DefinitionBlock ("ssdt.aml", "SSDT", 1, "APPLE ", "CpuPm", 0x00013400)
{
    External (\_PR.CPU0, DeviceObj)
    External (\_PR.CPU1, DeviceObj)
    External (\_PR.CPU2, DeviceObj)
    External (\_PR.CPU3, DeviceObj)
 
    Scope (\_PR.CPU0)
    {
        Name (APLF, 0x08)
        Name (APSN, 0x04)
        Name (APSS, Package (0x1F)
        {
            /* High Frequency Modes (turbo) */
            Package (0x06) { 0x0ED8, 0x012CC8, 0x0A, 0x0A, 0x2600, 0x2600 },
            Package (0x06) { 0x0E74, 0x012CC8, 0x0A, 0x0A, 0x2500, 0x2500 },
            Package (0x06) { 0x0E10, 0x012CC8, 0x0A, 0x0A, 0x2400, 0x2400 },
            Package (0x06) { 0x0DAC, 0x012CC8, 0x0A, 0x0A, 0x2300, 0x2300 },
            /* High Frequency Modes (non-turbo) */
            Package (0x06) { 0x0D48, 0x012CC8, 0x0A, 0x0A, 0x2200, 0x2200 },
            Package (0x06) { 0x0CE4, 0x0120A0, 0x0A, 0x0A, 0x2100, 0x2100 },
            Package (0x06) { 0x0C80, 0x0114B0, 0x0A, 0x0A, 0x2000, 0x2000 },
            Package (0x06) { 0x0C1C, 0x0108F8, 0x0A, 0x0A, 0x1F00, 0x1F00 },
            Package (0x06) { 0x0BB8, 0x00FD77, 0x0A, 0x0A, 0x1E00, 0x1E00 },
            Package (0x06) { 0x0B54, 0x00F22D, 0x0A, 0x0A, 0x1D00, 0x1D00 },
            Package (0x06) { 0x0AF0, 0x00E719, 0x0A, 0x0A, 0x1C00, 0x1C00 },
            Package (0x06) { 0x0A8C, 0x00DC3B, 0x0A, 0x0A, 0x1B00, 0x1B00 },
            Package (0x06) { 0x0A28, 0x00D192, 0x0A, 0x0A, 0x1A00, 0x1A00 },
            Package (0x06) { 0x09C4, 0x00C71F, 0x0A, 0x0A, 0x1900, 0x1900 },
            Package (0x06) { 0x0960, 0x00BCDF, 0x0A, 0x0A, 0x1800, 0x1800 },
            Package (0x06) { 0x08FC, 0x00B2D4, 0x0A, 0x0A, 0x1700, 0x1700 },
            Package (0x06) { 0x0898, 0x00A8FC, 0x0A, 0x0A, 0x1600, 0x1600 },
            Package (0x06) { 0x0834, 0x009F58, 0x0A, 0x0A, 0x1500, 0x1500 },
            Package (0x06) { 0x07D0, 0x0095E6, 0x0A, 0x0A, 0x1400, 0x1400 },
            Package (0x06) { 0x076C, 0x008CA7, 0x0A, 0x0A, 0x1300, 0x1300 },
            Package (0x06) { 0x0708, 0x008399, 0x0A, 0x0A, 0x1200, 0x1200 },
            Package (0x06) { 0x06A4, 0x007ABD, 0x0A, 0x0A, 0x1100, 0x1100 },
            /* Low Frequency Mode */
            Package (0x06) { 0x0640, 0x007212, 0x0A, 0x0A, 0x1000, 0x1000 },          
            Package (0x06) { 0x05DC,     Zero, 0x0A, 0x0A, 0x0F00, 0x0F00 },
            Package (0x06) { 0x0578,     Zero, 0x0A, 0x0A, 0x0E00, 0x0E00 },
            Package (0x06) { 0x0514,     Zero, 0x0A, 0x0A, 0x0D00, 0x0D00 },
            Package (0x06) { 0x04B0,     Zero, 0x0A, 0x0A, 0x0C00, 0x0C00 },
            Package (0x06) { 0x044C,     Zero, 0x0A, 0x0A, 0x0B00, 0x0B00 },
            Package (0x06) { 0x03E8,     Zero, 0x0A, 0x0A, 0x0A00, 0x0A00 },
            Package (0x06) { 0x0384,     Zero, 0x0A, 0x0A, 0x0900, 0x0900 },
            Package (0x06) { 0x0320,     Zero, 0x0A, 0x0A, 0x0800, 0x0800 }
        })
 
        Method (ACST, 0, NotSerialized)
        {
            /* Low Power Modes for CPU0 */
            Return (Package (0x05)
            {
                One,
                0x03,
                Package (0x04)
                {
                    ResourceTemplate ()
                    {
                        Register (FFixedHW,
                            0x01,               // Bit Width
                            0x02,               // Bit Offset
                            0x0000000000000000, // Address
                            0x01,               // Access Size
                            )
                    },
                    One,
                    Zero,
                    0x03E8
                },
 
                Package (0x04)
                {
                    ResourceTemplate ()
                    {
                        Register (FFixedHW,
                            0x01,               // Bit Width
                            0x02,               // Bit Offset
                            0x0000000000000010, // Address
                            0x03,               // Access Size
                            )
                    },
                    0x03,
                    0xCD,
                    0x01F4
                },
 
                Package (0x04)
                {
                    ResourceTemplate ()
                    {
                        Register (FFixedHW,
                            0x01,               // Bit Width
                            0x02,               // Bit Offset
                            0x0000000000000020, // Address
                            0x03,               // Access Size
                            )
                    },
                    0x06,
                    0xF5,
                    0x015E
                }
            })
        }
 
        Method (_DSM, 4, NotSerialized)
        {
            If (LEqual (Arg2, Zero))
            {
                Return (Buffer (One)
                {
                    0x03
                })
            }
 
            Return (Package (0x02)
            {
                "plugin-type",
                One
            })
        }
    }
 
    Scope (\_PR.CPU1)
    {
        Method (APSS, 0, NotSerialized)
        {
            Return (\_PR.CPU0.APSS)
        }
 
        Method (ACST, 0, NotSerialized)
        {
            /* Low Power Modes for CPU1 */
            Return (Package (0x05)
            {
                One,
                0x03,
                Package (0x04)
                {
                    ResourceTemplate ()
                    {
                        Register (FFixedHW,
                            0x01,               // Bit Width
                            0x02,               // Bit Offset
                            0x0000000000000000, // Address
                            0x01,               // Access Size
                            )
                    },
                    One,
                    0x03E8,
                    0x03E8
                },
 
                Package (0x04)
                {
                    ResourceTemplate ()
                    {
                        Register (FFixedHW,
                            0x01,               // Bit Width
                            0x02,               // Bit Offset
                            0x0000000000000010, // Address
                            0x03,               // Access Size
                            )
                    },
                    0x02,
                    0x94,
                    0x01F4
                },
 
                Package (0x04)
                {
                    ResourceTemplate ()
                    {
                        Register (FFixedHW,
                            0x01,               // Bit Width
                            0x02,               // Bit Offset
                            0x0000000000000020, // Address
                            0x03,               // Access Size
                            )
                    },
                    0x03,
                    0xA9,
                    0x15E
                }
            })
        }
    }
 
    Scope (\_PR.CPU2)
    {
        Method (APSS, 0, NotSerialized)
        {
            Return (\_PR.CPU0.APSS)
        }
 
        Method (ACST, 0, NotSerialized) { Return (\_PR.CPU1.ACST ()) }
    }
 
    Scope (\_PR.CPU3)
    {
        Method (APSS, 0, NotSerialized)
        {
            Return (\_PR.CPU0.APSS)
        }
 
        Method (ACST, 0, NotSerialized) { Return (\_PR.CPU1.ACST ()) }
    }
}

Fred

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  • 4 months later...

Hello,

 

For those who have core i5-3570K, here is the way to make work xcpm.

 

For  iMac13,2 you need to replace in IOPlatformPluginFamily.kext -> X86PlatformPlugin.kext -> Ressources -> Mac-FC02E91DDD3FA6A4.plist

with this one attachicon.gifMac-FC02E91DDD3FA6A4.plist.zip it had FrequencyVectors;

 

Don't forget to set boot-arg with  option -xcmp

 

Tested with clover boot loader.

 

ssdt to include

/*
 * Intel ACPI Component Architecture
 * AML Disassembler version 20140210-00 [Feb 10 2014]
 * Copyright (c) 2000 - 2014 Intel Corporation
 * 
 * Original Table Header:
 *     Signature        "SSDT"
 *     Length           0x0000036A (874)
 *     Revision         0x01
 *     Checksum         0x00
 *     OEM ID           "APPLE "
 *     OEM Table ID     "CpuPm"
 *     OEM Revision     0x00013400 (78848)
 *     Compiler ID      "INTL"
 *     Compiler Version 0x20140210 (538182160)
 */
 
DefinitionBlock ("ssdt.aml", "SSDT", 1, "APPLE ", "CpuPm", 0x00013400)
{
    External (\_PR.CPU0, DeviceObj)
    External (\_PR.CPU1, DeviceObj)
    External (\_PR.CPU2, DeviceObj)
    External (\_PR.CPU3, DeviceObj)
 
    Scope (\_PR.CPU0)
    {
        Name (APLF, 0x08)
        Name (APSN, 0x04)
        Name (APSS, Package (0x1F)
        {
            /* High Frequency Modes (turbo) */
            Package (0x06) { 0x0ED8, 0x012CC8, 0x0A, 0x0A, 0x2600, 0x2600 },
            Package (0x06) { 0x0E74, 0x012CC8, 0x0A, 0x0A, 0x2500, 0x2500 },
            Package (0x06) { 0x0E10, 0x012CC8, 0x0A, 0x0A, 0x2400, 0x2400 },
            Package (0x06) { 0x0DAC, 0x012CC8, 0x0A, 0x0A, 0x2300, 0x2300 },
            /* High Frequency Modes (non-turbo) */
            Package (0x06) { 0x0D48, 0x012CC8, 0x0A, 0x0A, 0x2200, 0x2200 },
            Package (0x06) { 0x0CE4, 0x0120A0, 0x0A, 0x0A, 0x2100, 0x2100 },
            Package (0x06) { 0x0C80, 0x0114B0, 0x0A, 0x0A, 0x2000, 0x2000 },
            Package (0x06) { 0x0C1C, 0x0108F8, 0x0A, 0x0A, 0x1F00, 0x1F00 },
            Package (0x06) { 0x0BB8, 0x00FD77, 0x0A, 0x0A, 0x1E00, 0x1E00 },
            Package (0x06) { 0x0B54, 0x00F22D, 0x0A, 0x0A, 0x1D00, 0x1D00 },
            Package (0x06) { 0x0AF0, 0x00E719, 0x0A, 0x0A, 0x1C00, 0x1C00 },
            Package (0x06) { 0x0A8C, 0x00DC3B, 0x0A, 0x0A, 0x1B00, 0x1B00 },
            Package (0x06) { 0x0A28, 0x00D192, 0x0A, 0x0A, 0x1A00, 0x1A00 },
            Package (0x06) { 0x09C4, 0x00C71F, 0x0A, 0x0A, 0x1900, 0x1900 },
            Package (0x06) { 0x0960, 0x00BCDF, 0x0A, 0x0A, 0x1800, 0x1800 },
            Package (0x06) { 0x08FC, 0x00B2D4, 0x0A, 0x0A, 0x1700, 0x1700 },
            Package (0x06) { 0x0898, 0x00A8FC, 0x0A, 0x0A, 0x1600, 0x1600 },
            Package (0x06) { 0x0834, 0x009F58, 0x0A, 0x0A, 0x1500, 0x1500 },
            Package (0x06) { 0x07D0, 0x0095E6, 0x0A, 0x0A, 0x1400, 0x1400 },
            Package (0x06) { 0x076C, 0x008CA7, 0x0A, 0x0A, 0x1300, 0x1300 },
            Package (0x06) { 0x0708, 0x008399, 0x0A, 0x0A, 0x1200, 0x1200 },
            Package (0x06) { 0x06A4, 0x007ABD, 0x0A, 0x0A, 0x1100, 0x1100 },
            /* Low Frequency Mode */
            Package (0x06) { 0x0640, 0x007212, 0x0A, 0x0A, 0x1000, 0x1000 },          
            Package (0x06) { 0x05DC,     Zero, 0x0A, 0x0A, 0x0F00, 0x0F00 },
            Package (0x06) { 0x0578,     Zero, 0x0A, 0x0A, 0x0E00, 0x0E00 },
            Package (0x06) { 0x0514,     Zero, 0x0A, 0x0A, 0x0D00, 0x0D00 },
            Package (0x06) { 0x04B0,     Zero, 0x0A, 0x0A, 0x0C00, 0x0C00 },
            Package (0x06) { 0x044C,     Zero, 0x0A, 0x0A, 0x0B00, 0x0B00 },
            Package (0x06) { 0x03E8,     Zero, 0x0A, 0x0A, 0x0A00, 0x0A00 },
            Package (0x06) { 0x0384,     Zero, 0x0A, 0x0A, 0x0900, 0x0900 },
            Package (0x06) { 0x0320,     Zero, 0x0A, 0x0A, 0x0800, 0x0800 }
        })
 
        Method (ACST, 0, NotSerialized)
        {
            /* Low Power Modes for CPU0 */
            Return (Package (0x05)
            {
                One,
                0x03,
                Package (0x04)
                {
                    ResourceTemplate ()
                    {
                        Register (FFixedHW,
                            0x01,               // Bit Width
                            0x02,               // Bit Offset
                            0x0000000000000000, // Address
                            0x01,               // Access Size
                            )
                    },
                    One,
                    Zero,
                    0x03E8
                },
 
                Package (0x04)
                {
                    ResourceTemplate ()
                    {
                        Register (FFixedHW,
                            0x01,               // Bit Width
                            0x02,               // Bit Offset
                            0x0000000000000010, // Address
                            0x03,               // Access Size
                            )
                    },
                    0x03,
                    0xCD,
                    0x01F4
                },
 
                Package (0x04)
                {
                    ResourceTemplate ()
                    {
                        Register (FFixedHW,
                            0x01,               // Bit Width
                            0x02,               // Bit Offset
                            0x0000000000000020, // Address
                            0x03,               // Access Size
                            )
                    },
                    0x06,
                    0xF5,
                    0x015E
                }
            })
        }
 
        Method (_DSM, 4, NotSerialized)
        {
            If (LEqual (Arg2, Zero))
            {
                Return (Buffer (One)
                {
                    0x03
                })
            }
 
            Return (Package (0x02)
            {
                "plugin-type",
                One
            })
        }
    }
 
    Scope (\_PR.CPU1)
    {
        Method (APSS, 0, NotSerialized)
        {
            Return (\_PR.CPU0.APSS)
        }
 
        Method (ACST, 0, NotSerialized)
        {
            /* Low Power Modes for CPU1 */
            Return (Package (0x05)
            {
                One,
                0x03,
                Package (0x04)
                {
                    ResourceTemplate ()
                    {
                        Register (FFixedHW,
                            0x01,               // Bit Width
                            0x02,               // Bit Offset
                            0x0000000000000000, // Address
                            0x01,               // Access Size
                            )
                    },
                    One,
                    0x03E8,
                    0x03E8
                },
 
                Package (0x04)
                {
                    ResourceTemplate ()
                    {
                        Register (FFixedHW,
                            0x01,               // Bit Width
                            0x02,               // Bit Offset
                            0x0000000000000010, // Address
                            0x03,               // Access Size
                            )
                    },
                    0x02,
                    0x94,
                    0x01F4
                },
 
                Package (0x04)
                {
                    ResourceTemplate ()
                    {
                        Register (FFixedHW,
                            0x01,               // Bit Width
                            0x02,               // Bit Offset
                            0x0000000000000020, // Address
                            0x03,               // Access Size
                            )
                    },
                    0x03,
                    0xA9,
                    0x15E
                }
            })
        }
    }
 
    Scope (\_PR.CPU2)
    {
        Method (APSS, 0, NotSerialized)
        {
            Return (\_PR.CPU0.APSS)
        }
 
        Method (ACST, 0, NotSerialized) { Return (\_PR.CPU1.ACST ()) }
    }
 
    Scope (\_PR.CPU3)
    {
        Method (APSS, 0, NotSerialized)
        {
            Return (\_PR.CPU0.APSS)
        }
 
        Method (ACST, 0, NotSerialized) { Return (\_PR.CPU1.ACST ()) }
    }
}

Fred

Hey Fred

 

Will this .plist file also work on an intel core i7-3770K? I've searched all day long getting speedstep to work but still stuck at 0,8GHz.

 

BTW I also noticed that I get KP with the mac mini 6,2 smbios so I decided to stick with imac 13,2

 

Grtz

Metalcored00d

 

EDIT

 

OMG it worked!! Thank you so much!! =')

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