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Intel HD Graphics (Core i5 520M) Fujitsu Q9000 MacOS X 10.8.4

Fujitsu Q9000 Mac OS X Mountain Lion Intel HD Graphics

Best Answer GhostRaider, 26 September 2013 - 09:50 PM

The problem is that currently VGA and HDMI don't work so this means that you won't be able to use external displays. I'm not saying its impossible but the problem is we don't know where these hex values are to patch the framebuffer. If there was a hack to enable the VGA and HDMI ports, then you may have Been able to get OS X working. Go to the full post


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#1
stetze

stetze

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Hi there,
 
I installed Mountain Lion 10.8.3 on the Fujitsu Q9000.
 
After I've done since updating to 10.8.5
 
So far so good. Unfortunately, my Video Card is not recognized.
 
Intel GMA HD (Intel Core i5 520M (Arrandele)).
 
smbios.plist from MacbookPro 6.1 (DSDT etc. in my extra folder you can download)
 
Bootloader Chameleon 2.2
 
I have a Full HD monitor connected via HDMI.
 
Please help me.
 
Thanks in advance.
 
best regards
 
stetze

Attached Files



#2
stetze

stetze

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Here is my Linux reg_dumper

 

LVDS is disable - i use the kext for edp ... 

 

About Mac -> Videocard - Intel HD Graphics 128 MB ... but i can't change my resolution? 1280x1024 is set... i need Full HD

                    PGETBL_CTL: 0x00000008
               GEN6_INSTDONE_1: 0xfffffffe
               GEN6_INSTDONE_2: 0xffffffff
                  CPU_VGACNTRL: 0x80000000 (disabled)
    DIGITAL_PORT_HOTPLUG_CNTRL: 0x00000000
                     RR_HW_CTL: 0x00000000 (low 0, high 0)
                FDI_PLL_BIOS_0: 0x082b3019
                FDI_PLL_BIOS_1: 0x00000000
                FDI_PLL_BIOS_2: 0x00000000
       DISPLAY_PORT_PLL_BIOS_0: 0x0807012b
       DISPLAY_PORT_PLL_BIOS_1: 0x00000000
       DISPLAY_PORT_PLL_BIOS_2: 0x00000000
              FDI_PLL_FREQ_CTL: 0x00053687
                     PIPEACONF: 0xc0000000 (enabled, active, pf-pd, rotate 0, 8bpc)
                      HTOTAL_A: 0x0897077f (1920 active, 2200 total)
                      HBLANK_A: 0x0897077f (1920 start, 2200 end)
                       HSYNC_A: 0x080307d7 (2008 start, 2052 end)
                      VTOTAL_A: 0x04640437 (1080 active, 1125 total)
                      VBLANK_A: 0x04640437 (1080 start, 1125 end)
                       VSYNC_A: 0x0440043b (1084 start, 1089 end)
                  VSYNCSHIFT_A: 0x00000000
                      PIPEASRC: 0x077f0437 (1920, 1080)
                 PIPEA_DATA_M1: 0x7e3661e0 (TU 64, val 0x3661e0 3564000)
                 PIPEA_DATA_N1: 0x0041eb00 (val 0x41eb00 4320000)
                 PIPEA_DATA_M2: 0x00000000 (TU 1, val 0x0 0)
                 PIPEA_DATA_N2: 0x00000000 (val 0x0 0)
                 PIPEA_LINK_M1: 0x00024414 (val 0x24414 148500)
                 PIPEA_LINK_N1: 0x00041eb0 (val 0x41eb0 270000)
                 PIPEA_LINK_M2: 0x00000000 (val 0x0 0)
                 PIPEA_LINK_N2: 0x00000000 (val 0x0 0)
                      DSPACNTR: 0xd8004400 (enabled)
                      DSPABASE: 0x00000000
                    DSPASTRIDE: 0x00001e00 (120)
                      DSPASURF: 0x030c2000
                   DSPATILEOFF: 0x00000000 (0, 0)
                     PIPEBCONF: 0x00000000 (disabled, inactive, pf-pd, rotate 0, 8bpc)
                      HTOTAL_B: 0x031f027f (640 active, 800 total)
                      HBLANK_B: 0x03170287 (648 start, 792 end)
                       HSYNC_B: 0x02ef028f (656 start, 752 end)
                      VTOTAL_B: 0x020c01df (480 active, 525 total)
                      VBLANK_B: 0x020401e7 (488 start, 517 end)
                       VSYNC_B: 0x01eb01e9 (490 start, 492 end)
                  VSYNCSHIFT_B: 0x00000000
                      PIPEBSRC: 0x027f01df (640, 480)
                 PIPEB_DATA_M1: 0x00000000 (TU 1, val 0x0 0)
                 PIPEB_DATA_N1: 0x00000000 (val 0x0 0)
                 PIPEB_DATA_M2: 0x00000000 (TU 1, val 0x0 0)
                 PIPEB_DATA_N2: 0x00000000 (val 0x0 0)
                 PIPEB_LINK_M1: 0x00000000 (val 0x0 0)
                 PIPEB_LINK_N1: 0x00000000 (val 0x0 0)
                 PIPEB_LINK_M2: 0x00000000 (val 0x0 0)
                 PIPEB_LINK_N2: 0x00000000 (val 0x0 0)
                      DSPBCNTR: 0x00000000 (disabled)
                      DSPBBASE: 0x00000000
                    DSPBSTRIDE: 0x00000000 (0)
                      DSPBSURF: 0x00000000
                   DSPBTILEOFF: 0x00000000 (0, 0)
                     PIPECCONF: 0x00000000 (disabled, inactive, pf-pd, rotate 0, 8bpc)
                      HTOTAL_C: 0x00000000 (1 active, 1 total)
                      HBLANK_C: 0x00000000 (1 start, 1 end)
                       HSYNC_C: 0x00000000 (1 start, 1 end)
                      VTOTAL_C: 0x00000000 (1 active, 1 total)
                      VBLANK_C: 0x00000000 (1 start, 1 end)
                       VSYNC_C: 0x00000000 (1 start, 1 end)
                  VSYNCSHIFT_C: 0x00000000
                      PIPECSRC: 0x00000000 (1, 1)
                 PIPEC_DATA_M1: 0x00000000 (TU 1, val 0x0 0)
                 PIPEC_DATA_N1: 0x00000000 (val 0x0 0)
                 PIPEC_DATA_M2: 0x00000000 (TU 1, val 0x0 0)
                 PIPEC_DATA_N2: 0x00000000 (val 0x0 0)
                 PIPEC_LINK_M1: 0x00000000 (val 0x0 0)
                 PIPEC_LINK_N1: 0x00000000 (val 0x0 0)
                 PIPEC_LINK_M2: 0x00000000 (val 0x0 0)
                 PIPEC_LINK_N2: 0x00000000 (val 0x0 0)
                      DSPCCNTR: 0x00000000 (disabled)
                      DSPCBASE: 0x00000000
                    DSPCSTRIDE: 0x00000000 (0)
                      DSPCSURF: 0x00000000
                   DSPCTILEOFF: 0x00000000 (0, 0)
                     PFA_CTL_1: 0x00000000 (disable, auto_scale yes, auto_scale_cal no, v_filter enable, vadapt disable, mode least, filter_sel programmed,chroma pre-filter disable, vert3tap auto, v_inter_invert field 1)
                     PFA_CTL_2: 0x00007de4 (vscale 0.983521)
                     PFA_CTL_3: 0x00003ef2 (vscale initial phase 0.491760)
                     PFA_CTL_4: 0x00007c40 (hscale 0.970703)
                   PFA_WIN_POS: 0x00000000 (0, 0)
                  PFA_WIN_SIZE: 0x00000000 (0, 0)
                     PFB_CTL_1: 0x00000000 (disable, auto_scale yes, auto_scale_cal no, v_filter enable, vadapt disable, mode least, filter_sel programmed,chroma pre-filter disable, vert3tap auto, v_inter_invert field 1)
                     PFB_CTL_2: 0x00000000 (vscale 0.000000)
                     PFB_CTL_3: 0x00000000 (vscale initial phase 0.000000)
                     PFB_CTL_4: 0x00000000 (hscale 0.000000)
                   PFB_WIN_POS: 0x00000000 (0, 0)
                  PFB_WIN_SIZE: 0x00000000 (0, 0)
                     PFC_CTL_1: 0x00000000 (disable, auto_scale yes, auto_scale_cal no, v_filter enable, vadapt disable, mode least, filter_sel programmed,chroma pre-filter disable, vert3tap auto, v_inter_invert field 1)
                     PFC_CTL_2: 0x00000000 (vscale 0.000000)
                     PFC_CTL_3: 0x00000000 (vscale initial phase 0.000000)
                     PFC_CTL_4: 0x00000000 (hscale 0.000000)
                   PFC_WIN_POS: 0x00000000 (0, 0)
                  PFC_WIN_SIZE: 0x00000000 (0, 0)
              PCH_DREF_CONTROL: 0x00000400 (cpu source disable, ssc_source disable, nonspread_source enable, superspread_source disable, ssc4_mode downspread, ssc1 disable, ssc4 disable)
               PCH_RAWCLK_FREQ: 0x0000007d (FDL_TP1 timer 0.5us, FDL_TP2 timer 1.5us, freq 125)
              PCH_DPLL_TMR_CFG: 0x0271186a
                PCH_SSC4_PARMS: 0x00000000
            PCH_SSC4_AUX_PARMS: 0x00000000
                  PCH_DPLL_SEL: 0x00000000 (FDL_TP1 timer 0.5us, FDL_TP2 timer 1.5us, freq 125)
           PCH_DPLL_ANALOG_CTL: 0x00008000
                    PCH_DPLL_A: 0xc4020002 (enable, sdvo high speed yes, mode (null), p2 (null), FPA0 P1 2, FPA1 P1 2, refclk default 120Mhz, sdvo/hdmi mul 1)
                    PCH_DPLL_B: 0x04800080 (disable, sdvo high speed no, mode (null), p2 (null), FPA0 P1 8, FPA1 P1 8, refclk default 120Mhz, sdvo/hdmi mul 1)
                      PCH_FPA0: 0x00021007 (n = 2, m1 = 16, m2 = 7)
                      PCH_FPA1: 0x00021007 (n = 2, m1 = 16, m2 = 7)
                      PCH_FPB0: 0x00030d07 (n = 3, m1 = 13, m2 = 7)
                      PCH_FPB1: 0x00030d07 (n = 3, m1 = 13, m2 = 7)
                TRANS_HTOTAL_A: 0x0897077f (1920 active, 2200 total)
                TRANS_HBLANK_A: 0x0897077f (1920 start, 2200 end)
                 TRANS_HSYNC_A: 0x080307d7 (2008 start, 2052 end)
                TRANS_VTOTAL_A: 0x04640437 (1080 active, 1125 total)
                TRANS_VBLANK_A: 0x04640437 (1080 start, 1125 end)
                 TRANS_VSYNC_A: 0x0440043b (1084 start, 1089 end)
            TRANS_VSYNCSHIFT_A: 0x00000000
                TRANSA_DATA_M1: 0x00000000 (TU 1, val 0x0 0)
                TRANSA_DATA_N1: 0x00000000 (val 0x0 0)
                TRANSA_DATA_M2: 0x00000000 (TU 1, val 0x0 0)
                TRANSA_DATA_N2: 0x00000000 (val 0x0 0)
             TRANSA_DP_LINK_M1: 0x00000000 (val 0x0 0)
             TRANSA_DP_LINK_N1: 0x00000000 (val 0x0 0)
             TRANSA_DP_LINK_M2: 0x00000000 (val 0x0 0)
             TRANSA_DP_LINK_N2: 0x00000000 (val 0x0 0)
                TRANS_HTOTAL_B: 0x031f027f (640 active, 800 total)
                TRANS_HBLANK_B: 0x03170287 (648 start, 792 end)
                 TRANS_HSYNC_B: 0x02ef028f (656 start, 752 end)
                TRANS_VTOTAL_B: 0x020c01df (480 active, 525 total)
                TRANS_VBLANK_B: 0x020401e7 (488 start, 517 end)
                 TRANS_VSYNC_B: 0x01eb01e9 (490 start, 492 end)
            TRANS_VSYNCSHIFT_B: 0x00000000
                TRANSB_DATA_M1: 0x00000000 (TU 1, val 0x0 0)
                TRANSB_DATA_N1: 0x00000000 (val 0x0 0)
                TRANSB_DATA_M2: 0x00000000 (TU 1, val 0x0 0)
                TRANSB_DATA_N2: 0x00000000 (val 0x0 0)
             TRANSB_DP_LINK_M1: 0x00000000 (val 0x0 0)
             TRANSB_DP_LINK_N1: 0x00000000 (val 0x0 0)
             TRANSB_DP_LINK_M2: 0x00000000 (val 0x0 0)
             TRANSB_DP_LINK_N2: 0x00000000 (val 0x0 0)
                TRANS_HTOTAL_C: 0x00000000 (1 active, 1 total)
                TRANS_HBLANK_C: 0x00000000 (1 start, 1 end)
                 TRANS_HSYNC_C: 0x00000000 (1 start, 1 end)
                TRANS_VTOTAL_C: 0x00000000 (1 active, 1 total)
                TRANS_VBLANK_C: 0x00000044 (69 start, 1 end)
                 TRANS_VSYNC_C: 0x00000000 (1 start, 1 end)
            TRANS_VSYNCSHIFT_C: 0x00000000
                TRANSC_DATA_M1: 0x00000000 (TU 1, val 0x0 0)
                TRANSC_DATA_N1: 0x00000000 (val 0x0 0)
                TRANSC_DATA_M2: 0x00000000 (TU 1, val 0x0 0)
                TRANSC_DATA_N2: 0x00000000 (val 0x0 0)
             TRANSC_DP_LINK_M1: 0x00000000 (val 0x0 0)
             TRANSC_DP_LINK_N1: 0x00000000 (val 0x0 0)
             TRANSC_DP_LINK_M2: 0x00000000 (val 0x0 0)
             TRANSC_DP_LINK_N2: 0x00000000 (val 0x0 0)
                    TRANSACONF: 0xc0000000 (enable, active, progressive)
                    TRANSBCONF: 0x00000000 (disable, inactive, progressive)
                    TRANSCCONF: 0x00000000 (disable, inactive, progressive)
                   FDI_TXA_CTL: 0xb00c4000 (enable, train pattern not train, voltage swing 0.4V,pre-emphasis none, port width X2, enhanced framing enable, FDI PLL enable, scrambing enable, master mode disable)
                   FDI_TXB_CTL: 0x00044000 (disable, train pattern pattern_1, voltage swing 0.4V,pre-emphasis none, port width X1, enhanced framing enable, FDI PLL enable, scrambing enable, master mode disable)
                   FDI_TXC_CTL: 0x00000000 (disable, train pattern pattern_1, voltage swing 0.4V,pre-emphasis none, port width X1, enhanced framing disable, FDI PLL disable, scrambing enable, master mode disable)
                   FDI_RXA_CTL: 0xb0082050 (enable, train pattern not train, port width X2, 8bpc,link_reverse_strap_overwrite no, dmi_link_reverse no, FDI PLL enable,FS ecc disable, FE ecc disable, FS err report disable, FE err report disable,scrambing enable, enhanced framing enable, PCDClk)
                   FDI_RXB_CTL: 0x00000040 (disable, train pattern pattern_1, port width X1, 8bpc,link_reverse_strap_overwrite no, dmi_link_reverse no, FDI PLL disable,FS ecc disable, FE ecc disable, FS err report disable, FE err report disable,scrambing enable, enhanced framing enable, RawClk)
                   FDI_RXC_CTL: 0x00000000 (disable, train pattern pattern_1, port width X1, 8bpc,link_reverse_strap_overwrite no, dmi_link_reverse no, FDI PLL disable,FS ecc disable, FE ecc disable, FS err report disable, FE err report disable,scrambing enable, enhanced framing disable, RawClk)
                  FDI_RXA_MISC: 0x00000080 (FDI Delay 128)
                  FDI_RXB_MISC: 0x00000080 (FDI Delay 128)
                  FDI_RXC_MISC: 0x00000000 (FDI Delay 0)
               FDI_RXA_TUSIZE1: 0x7e000000
               FDI_RXA_TUSIZE2: 0x7e000000
               FDI_RXB_TUSIZE1: 0x7e000000
               FDI_RXB_TUSIZE2: 0x7e000000
               FDI_RXC_TUSIZE1: 0x00000000
               FDI_RXC_TUSIZE2: 0x00000000
                 FDI_PLL_CTL_1: 0x33505248
                 FDI_PLL_CTL_2: 0x00000000
                   FDI_RXA_IIR: 0x00000000
                   FDI_RXA_IMR: 0x000000ff
                   FDI_RXB_IIR: 0x00000000
                   FDI_RXB_IMR: 0x000000ff
                      PCH_ADPA: 0x00f40018 (disabled, transcoder A, +hsync, +vsync)
                         HDMIB: 0x0000089c (disabled pipe A 8bpc TMDS DVI audio disabled +vsync +hsync detected)
                         HDMIC: 0x00000018 (disabled pipe A 8bpc SDVO DVI audio disabled +vsync +hsync non-detected)
                         HDMID: 0x8000001c (enabled pipe A 8bpc SDVO DVI audio disabled +vsync +hsync detected)
                      PCH_LVDS: 0x40000000 (disabled, pipe B, 18 bit, 1 channel)
                     CPU_eDP_A: 0x00000018
                      PCH_DP_B: 0x0000001c
                      PCH_DP_C: 0x00000018
                      PCH_DP_D: 0x0000001c
                TRANS_DP_CTL_A: 0x00000000 (disabled, pipe B, 18 bit, 1 channel)
                TRANS_DP_CTL_B: 0x00000000 (disabled, pipe B, 18 bit, 1 channel)
                TRANS_DP_CTL_C: 0x00000000 (disabled, pipe B, 18 bit, 1 channel)
              BLC_PWM_CPU_CTL2: 0x00000000
               BLC_PWM_CPU_CTL: 0x00000000
              BLC_PWM_PCH_CTL1: 0x00000000
              BLC_PWM_PCH_CTL2: 0x00000000
                 PCH_PP_STATUS: 0x00000000 (off, not ready, sequencing idle)
                PCH_PP_CONTROL: 0x00000000 (blacklight disabled, do not power down on reset, panel off)
              PCH_PP_ON_DELAYS: 0x00000000
             PCH_PP_OFF_DELAYS: 0x00000000
                PCH_PP_DIVISOR: 0x00186904
                      PORT_DBG: 0x00000000 (HW DRRS off)
            RC6_RESIDENCY_TIME: 0xffffffff
           RC6p_RESIDENCY_TIME: 0xffffffff
          RC6pp_RESIDENCY_TIME: 0xffffffff



#3
GhostRaider

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Sorry Stetze but desktop computers are not supported. Only laptops with LVDS displays.



#4
stetze

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Thanks for your answer.
 
But what is the difference between the eDP display of a laptop and a desktop computer?
 
Can I adjust myself somehow?


#5
GhostRaider

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Best Answer

The problem is that currently VGA and HDMI don't work so this means that you won't be able to use external displays. I'm not saying its impossible but the problem is we don't know where these hex values are to patch the framebuffer. If there was a hack to enable the VGA and HDMI ports, then you may have Been able to get OS X working.





Also tagged with one or more of these keywords: Fujitsu Q9000, Mac OS X Mountain Lion, Intel HD Graphics


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