jaimecus Posted August 2, 2010 Share Posted August 2, 2010 hi sorry my English, but I need help with this panic Kermel, please I get when I work cpu asus striker nse 2 i790 nvidia qcore 9550 gpu: gtx 260 nvidia 4 giga ram transced ddr3 1066 work full internet graphics,sound only is this kermel panic Quote Link to comment Share on other sites More sharing options...
verdant Posted August 2, 2010 Share Posted August 2, 2010 hi sorry my English, but I need help with this panic Kermel, please I get when I work cpuasus striker nse 2 i790 nvidia qcore 9550 gpu: gtx 260 nvidia 4 giga ram transced ddr3 1066 work full internet graphics,sound only is this kermel panic The kernel panic is related to 32bit versus 64bit memory accessing because you have more than 3GB RAM installed..... So, the system panics with the following message type in the kernel panic log: panic(cpu X caller 0xXXXXXXXX): getPhysicalSegment() out of 32b range 0xXXXXXXXX, len 0xXXXX, class IOGeneralMemoryDescriptor....... AFAIK the reason is that getPhysicalSegment returns a 32 bit address but because the physical memory address cannot fit in 32 bits a panic occurs.....which invariably happens when more than 3GB of RAM is installed on the MOBO..... Have you installed slashack's AppleNForceATA v0.1 kext yet?......if not, then you should do so because it supports 64bit memory addressing....... Even with slashack's AppleNForceATA v0.1 kext installed, which enables use of >3GB RAM without any problems for 99% of the time, there still seem to be some apps that cause memory addressing kernel panics either during installation or during large data file transfers e.g. video/audio files...... If you temporarily boot manually with -v arch=i386 cpus=1 maxmem=2048 when installing the app, or for doing large data file transfers e.g. video/audio files......and then afterwards, you reboot as normal.......everything is generally OK again, including making full use of all CPU cores by running applications now using the transferred data...... It is not as bad as you think.....data transfers do not need all 4 cores running at 100%, since it is the MCP that is controlling the data transfer rate from USB/Firewire/eSATA/SATA/IDE to SATA/IDE and vice versa....see chipset architectures in my two nForce chipset threads....... Quote Link to comment Share on other sites More sharing options...
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