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Welcome and I hope you enjoy my extensive guide to getting the GA-X58-UD3R rev 1.0, 1.6 and v1.7 boards up and running as I myself has. Yes i'm talking about getting every little detail working.
I will base it on my revision which is v1.7 but seeing as Rev 1.0, 1.6 boards have a different Network card I can easily sort this problem out for you guys.
After this guide you will have a fully working Snow Leopard 10.6.2 or 10.6.3 latest you choose! with 5.1 Analogue, 7.1 Digital Audio.
BIOS Settings:
Intergrated Periperals
SATA RAID/AHCI Mode - AHCI - My 2 SATA drives work as AHCI
USB Keyboard and Mouse enabled
Onboard SATA/IDE Ctrl Mode - IDE - My DVDRW is using first white SATA port 0, Acts like IDE drive
Power Management
Set to S3
Also set HPET to 64bit
Let's gets started, things you will need.
BootCD - http://www.tonymacx8...iBootCD.iso.zip
Retail copy of MacOSX Snow Leopard 10.6.0
A Bootloader - http://github.com/do...eBLN_v1.1.9.zip
MacOSX 10.6.2 Combo Update - http://support.apple....mbo10.6.2.dmg or http://supportdownlo...Combo10.6.2.dmg
MacOSX 10.6.3 Combo Update - http://support.apple...Combo10.6.3.dmg
My Kext's and DSDT for Observation only. ***ONLY TAKE WHAT IS NEEDED***
Kext_Utility v2.3.2 http://www.insanelym...p...st&id=50182
PlistEdit Pro http://www.fatcatsof...listEditPro.dmg
Instructions:
1. Insert Tonymacx86 iBoot CD
2. Select Snow Leopard Retail DVD and wait till it boots
3. Make sure you format your drive as GUID partition, create your partitions and install to that drive.
4. Follow on-screen prompts till your system restarts, Boot from Tonymacx86 iBootCD again, this time select your Snow Leopard drive where you installed to.
5. Install Macosx 10.6.2 OR 10.6.3 Combo update, don't restart
6. Install the bootloader AsereBLN v1.1.9, don't restart
7. Now at this stage the only kext's that you need are fakesmc.kext and NullCPUPowerManagement.kext and OpenHaltRestart.kext, this is just to start with we will get rid of them later. RESTART OR CONTINUE.
8. Copy fakesmc.kext, NullCPUPowerManagement.kext , OpenHaltRestart.kext to /Extra/Stored_Kexts folder in the root partition. Example /Volumes/MYSNOW/Extra.
STARTING_KEXTS.zip 88.98K
493 downloads9. Drag Stored_Kexts folder onto the Kext_Utility icon and enter root pass and repair permisions.
10. DSDT Patching
DSDT Fun
You will need to get yourself Evo DSDTSE v1.4.3
http://www.osx86.es/...ivos/DSDTSE.zip
The things that I will fix here:
CPU – Intel Core i7 920, Fixed CMOS Reset, Your internal drives will not be orange no more, Sleep, Audio injection and stutter fix, CPU Turbo plus, Power management, Shutdown.
Load your Evo DSDTSE up and click on Extract DSDT, this will extract a raw DSDT of your hardware with no modifications so there will be errors that need fixing before you save the file for use.
To fix Local0 error
Original
Scope (\_SI)
{
Method (_MSG, 1, NotSerialized)
{
Store (Local0, Local0)
}
Method (_SST, 1, NotSerialized)
{
Store (Local0, Local0)
}
}
Modified
Scope (\_SI)
{
Method (_MSG, 1, NotSerialized)
{
Store ("Local0", Local0)
}
Method (_SST, 1, NotSerialized)
{
Store ("Local0", Local0)
}
}
To fix the _WAK error
Original
Notify (\_SB.PCI0.USB0, 0x00) Notify (\_SB.PCI0.USB1, 0x00) Notify (\_SB.PCI0.USB2, 0x00) Notify (\_SB.PCI0.USB3, 0x00) Notify (\_SB.PCI0.USB4, 0x00) Notify (\_SB.PCI0.USB5, 0x00) }
Modified
Notify (\_SB.PCI0.USB0, 0x00)
Notify (\_SB.PCI0.USB1, 0x00)
Notify (\_SB.PCI0.USB2, 0x00)
Notify (\_SB.PCI0.USB3, 0x00)
Notify (\_SB.PCI0.USB4, 0x00)
Notify (\_SB.PCI0.USB5, 0x00)
Return (Package (0x02)
{
Zero,
Zero
})
}
To fix CMOS reset error
Original
Device (RTC)
{
Name (_HID, EisaId ("PNP0B00"))
Name (ATT0, ResourceTemplate ()
{
IO (Decode16,
0x0070, // Range Minimum
0x0070, // Range Maximum
0x00, // Alignment
0x04, // Length
)
IRQNoFlags ()
{8}
})
Name (ATT1, ResourceTemplate ()
{
IO (Decode16,
0x0070, // Range Minimum
0x0070, // Range Maximum
0x00, // Alignment
0x04, // Length
)
})
Modified
Device (RTC)
{
Name (_HID, EisaId ("PNP0B00"))
Name (ATT0, ResourceTemplate ()
{
IO (Decode16,
0x0070, // Range Minimum
0x0070, // Range Maximum
0x00, // Alignment
0x02, // Length
)
IRQNoFlags ()
{8}
})
Name (ATT1, ResourceTemplate ()
{
IO (Decode16,
0x0070, // Range Minimum
0x0070, // Range Maximum
0x00, // Alignment
0x02, // Length
)
})
layout-id insert, this allows layout ID 12 for audio to be inserted into the kernel.
This must be pasted before “Method (\_WAK, 1, NotSerialized)”
Method (DTGP, 5, NotSerialized)
{
If (LEqual (Arg0, Buffer (0x10)
{
/* 0000 */ 0xC6, 0xB7, 0xB5, 0xA0, 0x18, 0x13, 0x1C, 0x44,
/* 0008 */ 0xB0, 0xC9, 0xFE, 0x69, 0x5E, 0xAF, 0x94, 0x9B
}))
{
If (LEqual (Arg1, One))
{
If (LEqual (Arg2, Zero))
{
Store (Buffer (One)
{
0x03
}, Arg4)
Return (One)
}
If (LEqual (Arg2, One))
{
Return (One)
}
}
}
Store (Buffer (One)
{
0x00
}, Arg4)
Return (Zero)
}
CPU fix, this is only for Core i7 920 processor which most people buy.
Original
Processor (\_PR.CPU0, 0x00, 0x00000410, 0x06) {}
Processor (\_PR.CPU1, 0x01, 0x00000410, 0x06) {}
Processor (\_PR.CPU2, 0x02, 0x00000410, 0x06) {}
Processor (\_PR.CPU3, 0x03, 0x00000410, 0x06) {}
Processor (\_PR.CPU4, 0x04, 0x00000410, 0x06) {}
Processor (\_PR.CPU5, 0x05, 0x00000410, 0x06) {}
Processor (\_PR.CPU6, 0x06, 0x00000410, 0x06) {}
Processor (\_PR.CPU7, 0x07, 0x00000410, 0x06) {}
Modified
Processor (\_PR.CPU0, 0x00, 0x00000410, 0x06)
{
Name (_CST, Package (0x07)
{
0x06,
Package (0x04)
{
ResourceTemplate ()
{
Register (FFixedHW,
0x01, // Bit Width
0x02, // Bit Offset
0x0000000000000000, // Address
0x01, // Access Size
)
},
0x01,
0x0001,
0x000003E8
},
Package (0x04)
{
ResourceTemplate ()
{
Register (FFixedHW,
0x01, // Bit Width
0x02, // Bit Offset
0x0000000000000010, // Address
0x01, // Access Size
)
},
0x02,
0x0040,
0x000001F4
},
Package (0x04)
{
ResourceTemplate ()
{
Register (FFixedHW,
0x01, // Bit Width
0x02, // Bit Offset
0x0000000000000020, // Address
0x01, // Access Size
)
},
0x03,
0x0060,
0x0000015E
},
Package (0x04)
{
ResourceTemplate ()
{
Register (FFixedHW,
0x00, // Bit Width
0x00, // Bit Offset
0x0000000000000000, // Address
,)
},
0x01,
0x0001,
0x000003E8
},
Package (0x04)
{
ResourceTemplate ()
{
Register (SystemIO,
0x08, // Bit Width
0x00, // Bit Offset
0x0000000000000414, // Address
,)
},
0x02,
0x0040,
0x000001F4
},
Package (0x04)
{
ResourceTemplate ()
{
Register (SystemIO,
0x08, // Bit Width
0x00, // Bit Offset
0x0000000000000415, // Address
,)
},
0x03,
0x0060,
0x0000015E
}
})
Name (_PCT, Package (0x02)
{
ResourceTemplate ()
{
Register (FFixedHW,
0x40, // Bit Width
0x00, // Bit Offset
0x0000000000000199, // Address
,)
},
ResourceTemplate ()
{
Register (FFixedHW,
0x10, // Bit Width
0x00, // Bit Offset
0x0000000000000198, // Address
,)
}
})
Name (_PSS, Package (0x0A)
{
Package (0x06)
{
0x00000A65,
0x0001FBD0,
0x0000000A,
0x0000000A,
0x00000015,
0x00000015
},
Package (0x06)
{
0x00000A64,
0x0001FBD0,
0x0000000A,
0x0000000A,
0x00000014,
0x00000014
},
Package (0x06)
{
0x000009DF,
0x0001A9C8,
0x0000000A,
0x0000000A,
0x00000013,
0x00000013
},
Package (0x06)
{
0x0000095A,
0x000186A0,
0x0000000A,
0x0000000A,
0x00000012,
0x00000012
},
Package (0x06)
{
0x000008D5,
0x00014438,
0x0000000A,
0x0000000A,
0x00000011,
0x00000011
},
Package (0x06)
{
0x00000850,
0x000128E0,
0x0000000A,
0x0000000A,
0x00000010,
0x00000010
},
Package (0x06)
{
0x000007CB,
0x0000F618,
0x0000000A,
0x0000000A,
0x0000000F,
0x0000000F
},
Package (0x06)
{
0x00000746,
0x0000DEA8,
0x0000000A,
0x0000000A,
0x0000000E,
0x0000000E
},
Package (0x06)
{
0x000006C1,
0x0000B798,
0x0000000A,
0x0000000A,
0x0000000D,
0x0000000D
},
Package (0x06)
{
0x0000063C,
0x0000A7F8,
0x0000000A,
0x0000000A,
0x0000000C,
0x0000000C
}
})
Method (_PPC, 0, NotSerialized)
{
Return (Zero)
}
}
Processor (\_PR.CPU1, 0x01, 0x00000410, 0x06)
{
Alias (\_PR.CPU0._CST, _CST)
Alias (\_PR.CPU0._PCT, _PCT)
Alias (\_PR.CPU0._PSS, _PSS)
Alias (\_PR.CPU0._PPC, _PPC)
}
Processor (\_PR.CPU2, 0x02, 0x00000410, 0x06)
{
Alias (\_PR.CPU0._CST, _CST)
Alias (\_PR.CPU0._PCT, _PCT)
Alias (\_PR.CPU0._PSS, _PSS)
Alias (\_PR.CPU0._PPC, _PPC)
}
Processor (\_PR.CPU3, 0x03, 0x00000410, 0x06)
{
Alias (\_PR.CPU0._CST, _CST)
Alias (\_PR.CPU0._PCT, _PCT)
Alias (\_PR.CPU0._PSS, _PSS)
Alias (\_PR.CPU0._PPC, _PPC)
}
Processor (\_PR.CPU4, 0x04, 0x00000410, 0x06)
{
Alias (\_PR.CPU0._CST, _CST)
Alias (\_PR.CPU0._PCT, _PCT)
Alias (\_PR.CPU0._PSS, _PSS)
Alias (\_PR.CPU0._PPC, _PPC)
}
Processor (\_PR.CPU5, 0x05, 0x00000410, 0x06)
{
Alias (\_PR.CPU0._CST, _CST)
Alias (\_PR.CPU0._PCT, _PCT)
Alias (\_PR.CPU0._PSS, _PSS)
Alias (\_PR.CPU0._PPC, _PPC)
}
Processor (\_PR.CPU6, 0x06, 0x00000410, 0x06)
{
Alias (\_PR.CPU0._CST, _CST)
Alias (\_PR.CPU0._PCT, _PCT)
Alias (\_PR.CPU0._PSS, _PSS)
Alias (\_PR.CPU0._PPC, _PPC)
}
Processor (\_PR.CPU7, 0x07, 0x00000410, 0x06)
{
Alias (\_PR.CPU0._CST, _CST)
Alias (\_PR.CPU0._PCT, _PCT)
Alias (\_PR.CPU0._PSS, _PSS)
Alias (\_PR.CPU0._PPC, _PPC)
}
To make this CPU modification work you have to add a string to “com.apple.Boot.plist” which will be in your /Extra folder.
<key>DropSSDT</key> <string>yes</string>
Goto Device(IDE1) and put this above Device(PRIM) This will make your orange drives grey, internal.
Method (_DSM, 4, NotSerialized)
{
Store (Package (0x02)
{
"device-id",
Buffer (0x04)
{
0x81, 0x26, 0x00, 0x00
}
}, Local0)
DTGP (Arg0, Arg1, Arg2, Arg3, RefOf (Local0))
Return (Local0)
}
Goto Device (PX40) and change the following:
Original
Device (PX40)
{
Name (_ADR, 0x001F0000)
OperationRegion (PREV, PCI_Config, 0x08, 0x01)
Scope (\)
Modified
Device (PX40)
{
Name (_ADR, 0x001F0000)
Method (_DSM, 4, NotSerialized)
{
Store (Package (0x02)
{
"device-id",
Buffer (0x04)
{
0x18, 0x3A, 0x00, 0x00
}
}, Local0)
DTGP (Arg0, Arg1, Arg2, Arg3, RefOf (Local0))
Return (Local0)
}
OperationRegion (PREV, PCI_Config, 0x08, 0x01)
Scope (\)
Goto Device (HPET) and change the following:
Original
Device (HPET)
{
Name (_HID, EisaId ("PNP0103"))
Name (ATT3, ResourceTemplate ()
{
IRQNoFlags ()
{0}
IRQNoFlags ()
{8}
Memory32Fixed (ReadWrite,
0xFED00000, // Address Base
0x00000400, // Address Length
)
})
Name (ATT4, ResourceTemplate ()
{
})
Method (_STA, 0, NotSerialized)
{
If (LGreaterEqual (OSFX, 0x03))
{
If (HPTF)
{
Return (0x0F)
}
Else
{
Return (0x00)
}
}
Else
{
Return (0x00)
}
}
Method (_CRS, 0, NotSerialized)
{
If (LGreaterEqual (OSFX, 0x03))
{
If (HPTF)
{
Return (ATT3)
}
Else
{
Return (ATT4)
}
}
Else
{
Return (ATT4)
}
}
}
Modified
Device (HPET)
{
Name (_HID, EisaId ("PNP0103"))
Name (ATT3, ResourceTemplate ()
{
IRQNoFlags ()
{0}
IRQNoFlags ()
{8}
Memory32Fixed (ReadWrite,
0xFED00000, // Address Base
0x00000400, // Address Length
)
})
Name (ATT4, ResourceTemplate ()
{
})
Method (_STA, 0, NotSerialized)
{
Return (0x0F)
}
Method (_CRS, 0, NotSerialized)
{
Return (ATT3)
}
}
Goto Device (PIC) and Device (PIC) and change the following:
Original
Device (PIC)
{
Name (_HID, EisaId ("PNP0000"))
Name (_CRS, ResourceTemplate ()
{
IO (Decode16,
0x0020, // Range Minimum
0x0020, // Range Maximum
0x01, // Alignment
0x02, // Length
)
IO (Decode16,
0x00A0, // Range Minimum
0x00A0, // Range Maximum
0x01, // Alignment
0x02, // Length
)
IRQNoFlags ()
{2}
})
}
Modified
Device (PIC)
{
Name (_HID, EisaId ("PNP0000"))
Name (_CRS, ResourceTemplate ()
{
IO (Decode16,
0x0020, // Range Minimum
0x0020, // Range Maximum
0x01, // Alignment
0x02, // Length
)
IO (Decode16,
0x00A0, // Range Minimum
0x00A0, // Range Maximum
0x01, // Alignment
0x02, // Length
)
})
}
Original
Device (TMR)
{
Name (_HID, EisaId ("PNP0100"))
Name (ATT5, ResourceTemplate ()
{
IO (Decode16,
0x0040, // Range Minimum
0x0040, // Range Maximum
0x00, // Alignment
0x04, // Length
)
IRQNoFlags ()
{0}
})
Modified
Device (TMR)
{
Name (_HID, EisaId ("PNP0100"))
Name (ATT5, ResourceTemplate ()
{
IO (Decode16,
0x0040, // Range Minimum
0x0040, // Range Maximum
0x00, // Alignment
0x04, // Length
)
})
Goto Device (PWRB) and change the following:
Original
Device (PWRB)
{
Name (_HID, EisaId ("PNP0C0C"))
Method (_STA, 0, NotSerialized)
{
Return (0x0B)
}
}
Modified
Device (PWRB)
{
Name (_CID, EisaId ("PNP0C0C"))
Method (_STA, 0, NotSerialized)
{
Return (0x0B)
}
}
Edit fakesmc.kext/Contents/Info.plist using PlistEdit Pro
Original
<key>REV </key> <data> ATAPAAAD </data> </dict> <key>smc-compatible</key> <string>smc-napa</string>
Modified
<key>REV </key> <data> ATkPAAAF </data> </dict> <key>smc-compatible</key> <string>smc-thurley</string>
Goto AZAL, and change the following:
Original
Method (_L0D, 0, NotSerialized)
{
Notify (\_SB.PCI0.USBE, 0x02)
Notify (\_SB.PCI0.USE2, 0x02)
Notify (\_SB.PWRB, 0x02)
Notify (\_SB.PCI0.AZAL, 0x02)
Notify (\_SB.PCI0.IGBE, 0x02)
}
Modified
Method (_L0D, 0, NotSerialized)
{
Notify (\_SB.PCI0.USBE, 0x02)
Notify (\_SB.PCI0.USE2, 0x02)
Notify (\_SB.PWRB, 0x02)
Notify (\_SB.PCI0.HDEF, 0x02)
Notify (\_SB.PCI0.IGBE, 0x02)
}
Original
Device (AZAL)
{
Name (_ADR, 0x001B0000)
Method (_PRW, 0, NotSerialized)
{
Return (Package (0x02)
{
0x0D,
0x05
})
}
}
Modified
Device (HDEF)
{
Name (_ADR, 0x001B0000)
Method (_DSM, 4, NotSerialized)
{
Store (Package (0x0A)
{
"built-in",
Buffer (0x01)
{
0x01
},
"codec-id",
Buffer (0x04)
{
0x88, 0x08, 0xEC, 0x10
},
"layout-id",
Buffer (0x04)
{
0x03, 0x00, 0x00, 0x00
},
"device-type",
Buffer (0x10)
{
"Realtek ALC888"
},
"PinConfigurations",
Buffer (Zero) {}
}, Local0)
DTGP (Arg0, Arg1, Arg2, Arg3, RefOf (Local0))
Return (Local0)
}
}
Goto OperationRegion (\AGPS, SystemIO, 0x0438, 0x04) and place the following above it.
OperationRegion (PMRS, SystemIO, 0x0430, 0x01)
Field (PMRS, ByteAcc, NoLock, Preserve)
{
, 4,
SLPE, 1
}
Goto Method (\_PTS, 1, NotSerialized) and change the following:
Original
Method (\_PTS, 1, NotSerialized)
{
Or (Arg0, 0xF0, Local0)
Store (Local0, DBG1)
OSTP ()
If (LEqual (Arg0, 0x01)) {}
If (LEqual (Arg0, 0x03)) {}
If (LEqual (Arg0, 0x05))
{
Store (0x99, SMIP)
}
If (LEqual (Arg0, 0x04))
{
If (LNot (PICF))
{
Sleep (0x64)
}
}
}
Modified
Method (\_PTS, 1, NotSerialized)
{
Or (Arg0, 0xF0, Local0)
Store (Local0, DBG1)
OSTP ()
If (LEqual (Arg0, 0x05))
{
Store (0x99, SMIP)
Store (One, \_SB.PCI0.PX40.AG3E)
Store (Zero, SLPE)
Sleep (0x10)
}
Else
{
Store (Zero, \_SB.PCI0.PX40.AG3E)
}
}
Finished the long process of patching the DSDT, Click compile if no errors and you followed instructions perfectly then you should not get any errors, very easy to make a mistake. Click Install then select OSX partition /Extra. DSDT Installed.
Now you can remove NullCPUPowerManagement.kext , OpenHaltRestart.kext and repair permissions on the Stored_Kext folder so it creates a fresh Extensions.mkext file in /Extra folder.
GA-X58-UD3R Rev v1.7 kext's -
DSDT.aml / Extra
smbios.plist /Extra – Bootloader will create it.
com.apple.boot.plist / Extra
fakesmc.kext /Extra/Stored_Kexts
HDAEnabler.kext /Extra/Stored_Kexts
AppleHDA.kext v1.8.3fc1 / System/Library/Extensions
Rev1.7.zip 1.76MB
263 downloadsGA-X58-UD3R Rev v1.6 kext's -
DSDT.aml / Extra
smbios.plist /Extra – Bootloader will create it.
com.apple.boot.plist / Extra
fakesmc.kext /Extra/Stored_Kexts
HDAEnabler.kext /Extra/Stored_Kexts
AppleHDA.kext v1.8.3fc1 / System/Library/Extensions
Rev1.6.zip 1.76MB
331 downloadsGA-X58-UD3R Rev v1.0 kext's -
DSDT.aml / Extra
smbios.plist /Extra – Bootloader will create it.
com.apple.boot.plist / Extra
fakesmc.kext /Extra/Stored_Kexts
RealtekR1000SL.kext /Extra/Stored_Kexts
HDAEnabler.kext /Extra/Stored_Kexts
AppleHDA.kext v1.8.3fc1 / System/Library/Extensions
Rev1.0.zip 1.82MB
331 downloadsThat should be everything to get a fully working system.
Enjoy!, Credit's goto Digital Dreamer for refreshing my knowledge of this board and to d00d for alot of his lovely DSDT fixes, Tonymac for his lovely iBoot CD.
I hope a lot of you could test my audio,this works in 10.6.3 and I'll bring out a 10.6.4 when it goes final.
MacOSX 10.6.3 released! Newest AppleHDA.kext v1.8.4fc3
Bin hacked for ALC888 + DSDT
5 Outs, 4 Ins
Headphones - Green rear - working
Grey - Working
Black - Working
Orange - Working
Headphones Front panel - Removed
2x Mics - Not tested
1x Linein- Not tested
1x Digital Out - Not tested
1x Digital In - Not tested
NEW AS OF 28.05.2010
AppleHDA5OUT_4IN.kext.zip 1.17MB
241 downloadsMy setup:
USE MY DSDT AUDIO EDIT, TXT FILE INCLUDED
/System/Library/Extensions - Bin patched AppleHDA
Edit smbios.plist
<key>SMcputype</key>
<string>1793</string>
***This will change your CPU from a Quad core Xeon to an Intel Core i7 CPU.***
MY SMBIOS for reference ONLY unless you have the same CPU and RAM There are a lot of smbios scripts around to create smbios.plist if you do not have one.
smbios.plist.zip 560bytes
162 downloadsSMBIOS.PLIST
<?xml version="1.0" encoding="UTF-8"?> <!DOCTYPE plist PUBLIC "-//Apple//DTD PLIST 1.0//EN" "http://www.apple.com/DTDs/PropertyList-1.0.dtd"> <plist version="1.0"> <dict> <key>SMbiosversion</key> <string>MP31.88Z.00C1.B00.0802091544</string> <key>SMbusspeed</key>***4800 stands for CPU bandwidth, Intel QPI Speed, 4.8 GT/s*** <string>4800</string> <key>SMcputype</key>***1793 STANDS FOR CPU TYPE, CORE i 7*** <string>1793</string> <key>SMmanufacter</key> <string>Apple Inc.</string> <key>SMmemmanufacter</key>***MEMORY BRAND*** <string>Corsair XMS3</string> <key>SMmempart</key> <string>TR3X661600C9</string> <key>SMmemserial_1</key>***SERIAL NUMBERS OF EACH MODULE*** <string>000123-01234567-0</string> <key>SMmemserial_2</key> <string>EMPTY</string> <key>SMmemserial_3</key>***SERIAL NUMBERS OF EACH MODULE*** <string>000123-01234567-1</string> <key>SMmemserial_4</key> <string>EMPTY</string> <key>SMmemserial_5</key>***SERIAL NUMBERS OF EACH MODULE*** <string>000123-01234567-2</string> <key>SMmemserial_6</key> <string>EMPTY</string> <key>SMmemspeed</key>***MEMORY SPEED*** <string>1600</string> <key>SMmemtype</key>***24 stands for DDR3*** <string>24</string> <key>SMproductname</key> <string>MacPro4,1</string> <key>SMserial</key> <string>SECRETNUMBER</string> <key>SMsystemversion</key> <string>1.0</string> </dict> </plist>
PRAYSYS has a great guide on creating your own smbios.plist ***FYI***
http://prasys.co.cc/2009/09/guidecreating-your-own-smbios-plist/
***ONE last thing, My Onboard AHCI is set to IDE because my DVDRW is on SATA Port 0 (White ports not blue) My blue are set to AHCI.***
I edited my own kext to make my DVDRW show in MacOSX as IDE drive, works perfectly.
What i changed in this file
<key>IOPCIPrimaryMatch</key> <string>0x2363197b</string>***This PCI address matches the address for the white ports taken from IORegistryExplorer.
JMicron36xATA.kext.zip 50.03K
80 downloads GOES IN /Extra's folder
