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#21
Aargh-a-Knot

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Why we cannot put the RealtekR100SL.kext in the Extra folder (instead of /System/Library) ?

Eric



You can put RealtekR100SL.kext in E/E if you include IONetworkingFamily.kext as well.

#22
Thymallus

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You can put RealtekR100SL.kext in E/E if you include IONetworkingFamily.kext as well.

Thank you very much for this answer Argh-a-Knot.
That's I was thinking after reading some post but you confirn it to me, thanks.

Another, perharps stupid, question : I read Chameleon is not able to launch Windows XP if installed to the same HD that OS X (GUID with Partition 1 SL in Journalised and Partition 2 Win in Fat->NTFS).
Is it still true ?
Is it possible to have 1 OS X 2 Linux 3 Window with Chameleon as bootloader ?
I think install sequence should be : first OSX (format HDD as GUID with partition 1 Mac Extended Journalised and others FAT), then XP (with partition reformated in NTFS) then Ubuntu (with partition reformated in ext3/ext4, without Grub I suppose) and at the end install of Chameleon (on the "EFI" partition).

#23
Aargh-a-Knot

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Anyone have experience overclocking an MSI p55 board? I found a great tutorial for oc'ing the i7 860, but the settings that I would like to change are grayed out in my BIOS.

Any tips are appreciated...

#24
Thymallus

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Anyone have experience overclocking an MSI p55 board? I found a great tutorial for oc'ing the i7 860

can you post link please.

but the settings that I would like to change are grayed out in my BIOS.

What a pity, MSI P55 are supposed very good for over-cloking (I see good review especialy P55-GD65 and P55-GD80).

#25
player_sct

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On my P55-GD65 Core i5 is work with 3,8Ghz :D Everything is stable and veeery fast :D My Geekbench score is over 10000.

Thymallus - I am glad that I could help :)
Chameleon RC4 is stock version (today I write new post with new versions dsdt, boot (Recursor RC4_V2 version) and extra folder - http://szkielkoioko....h-msi-p55-gd65/

#26
Aargh-a-Knot

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can you post link please.


Here's the link to the OC'ing guide for 1156 cpu's: LGA1156 Core i7 & i5 Overclocking Guide

EDIT: I figured out how to change the ratio, but am not having luck with the settings...

On my P55-GD65 Core i5 is work with 3,8Ghz Everything is stable and veeery fast My Geekbench score is over 10000.


p_sct, could you possibly post your BIOS settings that you used?

As soon as I turn off "Turbo boost" the temps are sky-high. If I leave it on and OC even a little bit, I get a KP on boot.


TIA,
~Aargh

#27
player_sct

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ok, no problem :wacko: tonight after work i get screenshots from my bios settings and post it on my page.

#28
kdawg

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ok, no problem :wacko: tonight after work i get screenshots from my bios settings and post it on my page.

Instead of posting screenshots someone should setup a BIOS template in text format and share that instead of photos.

For example this is from my Gigabyte board:
Robust Graphics Booster ...............: [Auto]CPU Clock Ratio .......................: [ 8]Fine CPU Clock Ratio...................: +0.0CPU Frequency .........................: 3.55GHzClock Chip ControlStandard Clock ControlCPU Host Clock Control.................: [Enabled]CPU Host Frequency (Mhz) ..............: 444MhzPCI Express Frequency (Mhz) ...........: 100C.I.A.2 ...............................: [Disabled]Advanced Clock Control [Press Enter]CPU Clock Drive........................: 800mVPCI Express Clock Drive................: 900mVCPU Clock Skew (ps)....................: 0psMCH Clock Skew (ps)....................: 0psDRAM Performance ControlPerformance Enhance....................: [Standard]Extreme Memory Profile (X.M.P.)........: [Disabled](G)MCH Frequency Latch.................: AutoSystem Memory Multiplier ..............: 2.40DMemory Frequency (Mhz) ................: 1066DRAM Timing Selectable ................: [Manual]Standard Timing ControlCAS Latency Time.......................: 5tRCD ..................................: 5tRP'...................................: 5tRAS...................................: 15Advanced Timing ControltRRD...................................: [Auto]tWTR...................................: [Auto]tWR....................................: [Auto]tRFC...................................: 80tRTP...................................: [Auto]Command Rate (CMD) ....................: 2Driving Strength ProfilesDriving Strength ......................: 1066Channel AStatic tRead Value.....................: 8tRD Phase0 Adjustment..................: [Auto]tRD Phase1 Adjustment..................: [Auto]tRD Phase2 Adjustment .................: [Auto]tRD Phase3 Adjustment..................: [Auto]Trd2rd(Different Rank).................: [Auto]Twr2wr(Different Rank).................: [Auto]Twr2rd(Different Rank).................: [Auto]Trd2wr(Same/Diff Rank).................: [Auto]Dimm1 Clock Skew Control...............: [Auto]Dimm2 Clock Skew Control...............: [Auto]DDR Write Training.....................: [Auto]Channel BStatic tRead Value.....................: 8tRD Phase0 Adjustment..................: [Auto]tRD Phase1 Adjustment..................: [Auto]tRD Phase2 Adjustment .................: [Auto]tRD Phase3 Adjustment..................: [Auto]Trd2rd(Different Rank).................: [Auto]Twr2wr(Different Rank).................: [Auto]Twr2rd(Different Rank).................: [Auto]Trd2wr(Same/Diff Rank).................: [Auto]Dimm1 Clock Skew Control...............: [Auto]Dimm2 Clock Skew Control...............: [Auto]DDR Write Training.....................: [Auto]Motherboard Voltage ControlVoltage Type...........................: [Manual]CPU---------------------Normal-----------CurrentLoad Line Calibration..................: [Disabled]CPU Vcore...............1.25000V.......: 1.2875VCPU Termination.........1.200V.........: 1.26VCPU PLL.................1.500V.........: 1.61VCPU Reference...........0.760V.........: [Auto]MCH/ICHMCH Core................1.100V.........: 1.400VMCH Reference...........0.760V.........: [Auto]MCH/DRAM Reference......0.900V.........: [Auto]ICH I/O.................1.500V.........: 1.500VICH Core................1.100V.........: 1.100VDRAMDRAM Voltage............1.800V.........: 2.100VDRAM Termination........0.900V.........: [Auto]Channel A Reference.....0.900V.........: [Auto]Channel B Reference.....0.900V.........: [Auto]Advanced SettingsLimit CPUID Max. to 3..................: [Disabled]No-Execute Memory Protect..............: [Enabled]CPU Enhanced Halt (C1E)................: [Enabled]C2/C2E State Support...................: [NA]x C4/C4E State Support.................: [NA]CPU Thermal Monitor 2(TM2) ............: [Enabled]CPU EIST Function......................: [Enabled]Virtualization Technology..............: [Enabled]Integrated PeripheralsLegacy USB Storage Detect .............: [Enabled]
If you don't want to take the time to start from scratch search for a MSI overclocker forum. Thats how they share BIOS settings. Much quicker for everyone and fewer errors as well.

#29
player_sct

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This is screenshots from my bios:

http://szkielkoioko....-snow-leoparda/

#30
Aargh-a-Knot

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This is screenshots from my bios:

http://szkielkoioko....-snow-leoparda/



Thanks. What kind of temperatures are you getting with these settings? This is what I really need to know, because when I disable Intel Turbo Boost, even without overclocking at all, my temperatures go up very high. It seems to break Speedstepping somehow...

#31
sirenoremac

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I'm using your DSDT on my P55M-GD45 with an i5 750, and the system works great except for audio, which isnt working at all. What legacyhda are you using? And should I need to do anything besides put it into Extra/Extensions to make it work? Any kind of boot.plist edits? Pardon if anything I'm asking is naive, I'm still fairly new at this.

#32
player_sct

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on my Noctua NH-U12P SE2 (900 rpm) i have in stress 55-59

#33
FKA

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Hi There

I've just put together a neo3 FR p45 with my q9450.
I'm quite surprised at what I haven't had to do.- LAN, Speedstep (Model ID MP 3,1 - speedstep not working with MP4,1!) are working OTB

I've added alc888 HDEF device and removed aliases from CPU.
Attached File  DSDT.dslNeo3.zip   17.74KB   59 downloads

Only using fakeSMC and LegacyHDA in E/E.

To Do:
1. Chameleon Restart/ Shutdown fix not working
2. CST errors at boot (no cstate option in BIOS.)
3. Get speedstep working with model ID MP 4,1 to initialize AGPM
4. prob linked to above - patch LPC device in DSDT <<Done

Get a whole load more errors with LCP device patched:
09/03/2010 02:04:35	kernel	ACPI_SMC_PlatformPlugin::pushCPU_CSTData - _CST evaluation failedFakeSMC: key not found BEMB, length - 109/03/2010 02:04:35	kernel	ACPI_SMC_PlatformPlugin::pushCPU_CSTData - _CST evaluation failed09/03/2010 02:04:35	kernel	ACPI_SMC_PlatformPlugin::registerLPCDriver - WARNING - LPC device initialization failed: C-state power management not initialized

Forced sleep and keyboard/mouse wake working vanilla
Auto sleep needs RIP script - due to TCorps DVDRW (I really must replace that!)

Keep on truckin'

D.

#34
FKA

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DSDT fix's so far:

Alias removed from Scope (_PR)
Scope (_PR)    {        Processor (P001, 0x01, 0x00000810, 0x06) {}        Processor (P002, 0x02, 0x00000000, 0x00) {}        Processor (P003, 0x03, 0x00000000, 0x00) {}        Processor (P004, 0x04, 0x00000000, 0x00) {}    }

HDEF ALC888 added
Device (HDEF)            {                Name (_ADR, 0x001B0000)                Method (_PRW, 0, NotSerialized)                {                    Return (Package (0x02)                    {                        0x0D,                        0x05                    })                }                Method (_DSM, 4, NotSerialized)                {                    Store (Package (0x0C)                        {                            "codec-id",                            Buffer (0x04)                            {                                0x88, 0x08, 0xEC, 0x10                            },                            "layout-id",                            Buffer (0x04)                            {                                0x78, 0x03, 0x00, 0x00                            },                            "device-type",                            Buffer (0x07)                            {                                "ALC888"                            },                            "PinConfigurations",                            Buffer (0x28)                            {                                /* 0000 */    0x50, 0x41, 0x01, 0x01, 0x50, 0x40, 0x21, 0x02,                                /* 0008 */    0x30, 0x01, 0x10, 0x90, 0x20, 0x60, 0x01, 0x01,                                /* 0010 */    0x70, 0x20, 0x01, 0x01, 0xA0, 0x90, 0xA1, 0x02,                                /* 0018 */    0x10, 0x30, 0x81, 0x01, 0x40, 0x90, 0xA1, 0x01,                                /* 0020 */    0x60, 0x61, 0x4B, 0x01, 0xF0, 0x01, 0xCB, 0x01                            },                            "reg",                            Buffer (0x28)                            {                                /* 0000 */    0x00, 0xD8, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,                                /* 0008 */    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,                                /* 0010 */    0x00, 0x00, 0x00, 0x00, 0x10, 0xD8, 0x00, 0x02,                                /* 0018 */    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,                                /* 0020 */    0x00, 0x00, 0x00, 0x00, 0x00, 0x40, 0x00, 0x00                            },                            "platformFamily",                            Buffer (One)                            {                                0x00                            }                        }, Local0)                    DTGP (Arg0, Arg1, Arg2, Arg3, RefOf (Local0))                    Return (Local0)                }            }

Added for shutdown
OperationRegion (PMRS, SystemIO, 0x0830, 0x13)    Field (PMRS, ByteAcc, NoLock, Preserve)    {            ,   4,        SLPE,   1,    }

LPC Device ID added
Device (SBRG)            {                Name (_ADR, 0x001F0000)                Method (_DSM, 4, NotSerialized)                {                    Store (Package (0x02)                        {                            "device-id",                             Buffer (0x04)                            {                                0x18, 0x3A, 0x00, 0x00                            }                        }, Local0)                    DTGP (Arg0, Arg1, Arg2, Arg3, RefOf (Local0))                    Return (Local0)                }

Change to Method (_PTS) for shutdown - change in red
If (LEqual (Arg0, 0x05))
{
Store (Zero, SLPE)
Sleep(0x10)
}
_linenums:0'>Method (_PTS, 1, NotSerialized) { Store (Arg0, DBG8) PTS (Arg0) Store (Zero, Index (WAKP, Zero)) Store (Zero, Index (WAKP, One)) If (LEqual (Arg0, 0x05)) { Store (Zero, SLPE) Sleep(0x10) }

I think that's it - I've not changed HPET or RTC0 devices - I don't think i need to ??

Remaining issues:

SMC - CST errors at boot - Not sure how to deal with this? There are no CST tables in SSDT and no C state options in BIOS - not even C1E which I know my CPU supports ???

Was going to add CST from my Gigabyte DSDT :
Name (CST, Package (0x02)        {            0x01,            Package (0x04){ResourceTemplate (){Register (FFixedHW,0x01,0x02,0x0000000000000000,0x00,)},One,One,0x03E8}         })

But unsure how to deal with this, I'm a cut an paste master and so don't know how to deal with the MSI Scope (_PR) structure. I've tried the below but no joy!
Scope (_PR)
{
Name (CST, Package (0x02)
{
0x01,
Package (0x04){ResourceTemplate (){Register (FFixedHW,0x01,0x02,0x0000000000000000,0x00,)},One,One,0x03E8}
})
Processor (P001, 0x01, 0x00000810, 0x06) {}
{
Alias (CST, _CST)
}

Processor (P002, 0x02, 0x00000000, 0x00) {}
{
Alias (CST, _CST)
}
etc etc ..
_linenums:0'>Scope (_PR) { Name (CST, Package (0x02) { 0x01, Package (0x04){ResourceTemplate (){Register (FFixedHW,0x01,0x02,0x0000000000000000,0x00,)},One,One,0x03E8} }) Processor (P001, 0x01, 0x00000810, 0x06) {} { Alias (CST, _CST) }Processor (P002, 0x02, 0x00000000, 0x00) {} { Alias (CST, _CST) }etc etc ..

I know its to do with the P001, CPU1 - P002, CPU2 etc .. but could really do with some help here :rolleyes:

Restart using Chameleon RestartFix=Yes is working but restart seems very slow. Monitor self times out on no signal for about 20secs - then machine reboots!

Idle temp 40.C with CPU fan set in BIOS to around 65% min rpm - nice and cool !
Idle temp 50.C with CPU fan set in BIOS to around 20% min rpm - nice and quiet !

Still haven't tried to overclock yet!

Attached File  DSDT10_03_10.dsl.zip   17.81KB   29 downloads

D.



#35
mm67

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Remaining issues:

SMC - CST errors at boot - Not sure how to deal with this? There are no CST tables in SSDT and no C state options in BIOS - not even C1E which I know my CPU supports ???

Was going to add CST from my Gigabyte DSDT :

Name (CST, Package (0x02)        {            0x01,            Package (0x04){ResourceTemplate (){Register (FFixedHW,0x01,0x02,0x0000000000000000,0x00,)},One,One,0x03E8}         })

But unsure how to deal with this, I'm a cut an paste master and so don't know how to deal with the MSI Scope (_PR) structure. I've tried the below but no joy!


You wouldn't happen to be running on old bios version ? My P43-Neo got C-state option in Cell Menu with some later bios version, early ones only had EIST like your board. If bios update doesn't help then you can use SSDT tables from my board's acpidump. You should find that in Speedstepping thread.

#36
FKA

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You wouldn't happen to be running on old bios version ? My P43-Neo got C-state option in Cell Menu with some later bios version, early ones only had EIST like your board. If bios update doesn't help then you can use SSDT tables from my board's acpidump. You should find that in Speedstepping thread.


I used the live update windows SW to update to the latest 1A but i think i saw 'checksum error' pop up sometime during the update. I'll reflash using a bootable USB and see where i get.

BTW mm67 - thanks for the neo info on infinitemac.

D

#37
FKA

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no joy - still no c-state options!

I'll try your cst. to be honest this is purely cosmetic. I'm idling at 42.c and 58.c at max load.
Speedstep is working and there is more than enough control in the BIOS - temp' wise.

so far, I'm happy with the board. I'm more upset that dominos just sent me a pepperoni with hot red chilli not sweet red chilli!

EDIT

Does anybody know if the MPS Table version matters with OS X .. currently set to 1.4 ???

#38
FKA

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Added _cst adapted from mm67's msi board.

[codebox] Scope (_PR)
{
Processor (P001, 0x01, 0x00000810, 0x06)
{
Name (_CST, Package (0x05)
{
0x04,
Package (0x04) {ResourceTemplate () {Register (FFixedHW, 1, 2, 0x000)},1,1,0x03E8},
Package (0x04) {ResourceTemplate () {Register (SystemIO, 8, 0, 0x814)},2,1,0x01F4},
Package (0x04) {ResourceTemplate () {Register (SystemIO, 8, 0, 0x815)},3,11,0x0FA},
Package (0x04) {ResourceTemplate () {Register (SystemIO, 8, 0, 0x816)},3,39,0x064}
})
}

Processor (P002, 0x02, 0x00000000, 0x00)
{
Alias (^P001._CST, _CST)
}

Processor (P003, 0x03, 0x00000000, 0x00)
{
Alias (^P001._CST, _CST)
}

Processor (P004, 0x04, 0x00000000, 0x00)
{
Alias (^P001._CST, _CST)
}
}
[/codebox]

I'll probably trim this down later as my CPU only supports C1E and this defines C1 through 4

Also added SBUS device to get rid of SBUS related errors at boot
[codebox] Device (SBUS)
{
Name (_ADR, 0x001F0003)
Device (BUS0)
{
Name (_CID, "smbus")
Name (_ADR, Zero)
Device (DVL0)
{
Name (_ADR, 0x57)
Name (_CID, "diagsvault")
}
}
}
[/codebox]

Attached File  DSDT15_03_10.dsl.zip   18KB   26 downloads

D.

#39
FKA

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Found C1E under 'cpu features' have to press F4 to make the option visible.
Anywho, it was on and I still need to add cst data to DSDT to remove errors.


D

#40
Hassan Rai

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Aargh-a-Knot - i'm considering a build similar to yours. I have a couple of questions:

1. Before you tried overclocking... were your idle temperatures still very high? Was speed-stepping working properly?

2. Can you post links to the kexts (you mention) in addition to the DSDT you have posted. In the posted DSDT, is the working audio solution included?

Many thanks...





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