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[DSDT] Gigabyte's Motherboard's - MacPro style


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#41
Paaloball

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Quality work here stickpin - thanks.

I removed the GFX section, as I like to use PC_EFI for dynamic injection of the GFX strings - and altered the processor stepping specification to match my E8400 Core2 Duo and it works almost perfectly. I have sleep shutdown, and restart (with OSXRestart.kext)... so I'm wondering why restart was removed from your list of working features?

Once again - thanks for the research!


I've now done almost the same: Replacing the CPU and GFX part of stickpin's DSDT. Everything works except proper shut down, which I can live with for now. My old DSDT didn't need the SATA fix, since I implemented it directly into the DSDT. I like to have as few kexts in my Extras folder as possible. Anyways - my PCI cards are happy now! ;)

#42
STLVNUB

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Good idea to add this to LPCB
Method (_DSM, 4, NotSerialized)
{
Store (Package (0x02)
{
"device-id",
Buffer (0x04)
{
0x18, 0x3A, 0x00, 0x00
}
}, Local0)
MCDP (Arg2, RefOf (Local0))
Return (Local0)
}
As AppleLPC kext needs it to load and make stepping work. :(

#43
agrajag

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Store (Package (0x02)
{
"device-id",
Buffer (0x04)
{
0x18, 0x3A, 0x00, 0x00
}

Could someone explain the significance of the parameters in the buffer? I had been trying to get speedstepping to work, and I had used "0x18, 0x3A, 0x00, 0x00" as per various examples but I could not get working speedstepping. I did find another DSDT that had used "0x16, 0x29, 0x00, 0x00" and then speedstepping worked right away (to my surprise). How would I know which values to use, besides trial and error?

#44
STLVNUB

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Could someone explain the significance of the parameters in the buffer? I had been trying to get speedstepping to work, and I had used "0x18, 0x3A, 0x00, 0x00" as per various examples but I could not get working speedstepping. I did find another DSDT that had used "0x16, 0x29, 0x00, 0x00" and then speedstepping worked right away (to my surprise). How would I know which values to use, besides trial and error?

That value is specific to your MB ( I think you use the closest value to the chip that is on it, according to the AppleLPC plist), if the 2916 worked for you use it. The 3A18 is for my MB.
Forgot where I saw it, was surprised it was not included in this tute as it makes it more complete.

#45
RepomanUK

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Attached File  dsdt_rev2.zip   15.48KB   47 downloads

That value is specific to your MB ( I think you use the closest value to the chip that is on it, according to the AppleLPC plist), if the 2916 worked for you use it. The 3A18 is for my MB.
Forgot where I saw it, was surprised it was not included in this tute as it makes it more complete.


Thanks for that STLVNUB! I had seen a number of other posts that stated AppleLPC was needed for native speedstepping, but after implementing stickpin's DSDT I seemed to be getting reduced core temps at idle (well, reduced in comparison to my original DSDT) and sleep was working even without having the 'Start up automatically after a power failure' option in the energy pane of System Prefs.

I have now added your suggested method to LPCB and AppleLPC.kext now loads at boot and my CPU core temps have reduced again, idling around 40 - 45 degrees... which is nice!

So thanks again! Don't suppose you have any bright ideas in terms of fixing the shutdown issue do you

@mac_nobbi - My current DSDT including STLVNUB's fix is attached here:

2nd Revision with mac_nobbi's dual core update: Attached File  dsdt_rev2.zip   15.48KB   47 downloads

#46
mac_nobbi

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@mac_nobbi - My current DSDT including STLVNUB's fix is attached here: Attached File  dsdt.zip   15.48KB   18 downloads


Thanks for the dsdt

Now it is working great.

By the way your dsdt shows

Method (_PSD, 0, NotSerialized)		{			Return (Package (0x05)			{				0x05,				Zero,				Zero,				0xFC,				0x04			})		}


In other posts i found that a dual core should read 0x02 instead of the 0x04 which seems to be the number of cores

#47
RepomanUK

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Thanks for the dsdt

Now it is working great.

By the way your dsdt shows

Method (_PSD, 0, NotSerialized)		{			Return (Package (0x05)			{				0x05,				Zero,				Zero,				0xFC,				0x04			})		}


In other posts i found that a dual core should read 0x02 instead of the 0x04 which seems to be the number of cores


Thanks for the input. I have made the correction and updated - although it doesn't seem to have made any huge change!

#48
Kaydis

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Working now on understanding of SATA "Orange Icon" problem, to get rid of another legacy kext. Looks like somehow need to remove Hot Plug flag on PR device and it will fix the problem. If someone know and did some research, please let me know.

I tried, but to no effect. I haven't had a lot of experience with the ICH10 chip set of the ASL language. However, I'll explain what I did in case someone has any ideas on whether I did something wrong.

What I did find was that in the AHCI spec there's a set of PxCMD registers (P0CMD, P1CMD, etc) at addresses ABAR+0x118, ABAR+0x198, ABAR+218, etc. Each of these has two bits at offsets 18 and 21 which sounded promising. Bit 18, the HPC, or Hot Plug Capable bit doesn't really do much, it's for the OS to use in controlling hot-plug, but doesn't actually change anything in the chip. At bit 21 is the ESP, or External SATA Port bit which does seem to disable hot-plus when cleared. I found some bit definitions for the SATA port in the DSDT for my Gigabyte GA-EP45T-DS3R that looked like this:
Device (SATA)            {                Name (_ADR, 0x001F0002)                OperationRegion (PCI, PCI_Config, 0x40, 0x20)                Field (PCI, DWordAcc, NoLock, Preserve)                {                    ITM0,   16,                    ITM1,   16,                    SIT0,   4,                    SIT1,   4,                            Offset (0x08),                    UDC0,   2,                    UDC1,   2,                            Offset (0x0A),                    UDT0,   8,                    UDT1,   8,                            Offset (0x14),                    ICF0,   2,                    ICF1,   2,                        ,   6,                    WPPE,   1,                        ,   1,                    FAS0,   2,                    FAS1,   2                }
I added the bits to it like this:
Device (SATA)            {                Name (_ADR, 0x001F0002)                OperationRegion (PCI, PCI_Config, 0x40, 0x400)                Field (PCI, DWordAcc, NoLock, Preserve)                {                    ITM0,   16,                    ITM1,   16,                    SIT0,   4,                    SIT1,   4,                            Offset (0x08),                    UDC0,   2,                    UDC1,   2,                            Offset (0x0A),                    UDT0,   8,                    UDT1,   8,                            Offset (0x14),                    ICF0,   2,                    ICF1,   2,                        ,   6,                    WPPE,   1,                        ,   1,                    FAS0,   2,                    FAS1,   2,                            Offset (0xD8), // Offset 0x118                        ,  18,                    HPC0,   1,                        ,   2,                    EPS0,   1,                            Offset (0x158), // Offset 0x198                        ,  18,                    HPC1,   1,                        ,   2,                    EPS1,   1,                            Offset (0x1D8), // Offset 0x218                        ,  18,                    HPC2,   1,                        ,   2,                    EPS2,   1,                            Offset (0x258), // Offset 0x298                        ,  18,                    HPC3,   1,                        ,   2,                    EPS3,   1,                            Offset (0x2D8), // Offset 0x318                        ,  18,                    HPC4,   1,                        ,   2,                    EPS4,   1,                            Offset (0x358), // Offset 0x398                        ,  18,                    HPC5,   1,                        ,   2,                    EPS5,   1                }
Then I tried to clear them in the _INI method:
Method (^_INI, 0, NotSerialized)                {                    ...                    Store (Zero, \_SB.PCI0.SATA.EPS0)                    Store (Zero, \_SB.PCI0.SATA.EPS1)                    Store (Zero, \_SB.PCI0.SATA.EPS2)                    Store (Zero, \_SB.PCI0.SATA.EPS3)                    Store (Zero, \_SB.PCI0.SATA.EPS4)                    Store (Zero, \_SB.PCI0.SATA.EPS5)                    Store (Zero, \_SB.PCI0.SATA.HPC0)                    Store (Zero, \_SB.PCI0.SATA.HPC1)                    Store (Zero, \_SB.PCI0.SATA.HPC2)                    Store (Zero, \_SB.PCI0.SATA.HPC3)                    Store (Zero, \_SB.PCI0.SATA.HPC4)                    Store (Zero, \_SB.PCI0.SATA.HPC5)                }
No luck. If I had sources to the kext that takes away the orange icons it might help.

#49
kdawg

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No luck. If I had sources to the kext that takes away the orange icons it might help.


Here is Apple's source for IOStorageFamily

And the kext that overrides the icon is simply an injector kext consisting of:
<?xml version="1.0" encoding="UTF-8"?><!DOCTYPE plist PUBLIC "-//Apple//DTD PLIST 1.0//EN" "http://www.apple.com/DTDs/PropertyList-1.0.dtd"><plist version="1.0"><dict>	<key>CFBundleDevelopmentRegion</key>	<string>English</string>	<key>CFBundleIdentifier</key>	<string>org.chameleon.plist.IOAHCIBlockStorageInjector</string>	<key>CFBundleInfoDictionaryVersion</key>	<string>6.0</string>	<key>CFBundleName</key>	<string>IOAHCIBlockStorage Fix</string>	<key>CFBundlePackageType</key>	<string>KEXT</string>	<key>CFBundleSignature</key>	<string>????</string>	<key>CFBundleVersion</key>	<string>1.0.0</string>	<key>IOKitPersonalities</key>	<dict>		<key>AppleAHCIDiskDriver</key>		<dict>			<key>CFBundleIdentifier</key>			<string>com.apple.iokit.IOAHCIBlockStorage</string>			<key>IOClass</key>			<string>AppleAHCIDiskDriver</string>			<key>IOProviderClass</key>			<string>IOAHCIDevice</string>			<key>IOProbeScore</key>			<integer>1000</integer>			<key>Protocol Characteristics</key>			<dict>				<key>Physical Interconnect</key>				<string>SATA</string>				<key>Physical Interconnect Location</key>				<string>Internal/External</string>			</dict>		</dict>	</dict>	<key>OSBundleRequired</key>	<string>Root</string></dict></plist>


#50
RepomanUK

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I've just started using the RealtekR1000SL.kext from this thread to enable Zeroconf networking - which works pretty well - but since I've installed it, my hard drives now appear as native internal rather than hotplug sata...

Not sure if this is a hard fix implemented in the Realtek kext, or a happy coincidence in conjunction with the DSDT. Even without the Realtek kext, every now and again during heavy disk access, the icon would flicker between the orange hotplug icon and the silver internal drive icon, indicating to me that on at least some level the drive was presenting to the OS as internal...

#51
Bit Shoveler

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I've just started using the RealtekR1000SL.kext from this thread to enable Zeroconf networking - which works pretty well - but since I've installed it, my hard drives now appear as native internal rather than hotplug sata...


As the author of RealtekR1000SL.kext, I can assure you it does nothing at all that should affect the hard drives' icons.

Mine are still orange. :thumbsup_anim:

#52
Mull7965

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Thanks Stickpin, this is a great starting point. A couple of comments, but please bear in mind that I am no expert in any of this.

I got confused that the jmicron kext was still loading despite the fact that you have removed IDE from the DSDT. Maybe this is obvious to you but it took me a while to realise that you also have to disable the "Onboard IDE contoller" in the BIOS settings.

Sleep only works when I check the "Start up automatically after power failiure" option in the energy saver preferences. (If I don't check that option my machine will turn off rather than sleeping.) Is this your experience, too? Or could this be a side effect of the CST settings I'm using?

In your DSDT you define 3 C-States. Is this for C0, C3, and C5? Do you have C2/C2E and C4/C4E disabled in your BIOS settings?

I hope this is not veering into generic speed stepping territory... Repoman, I like how you avoided duplication for _PSS and _PSD in your DSDT. However, this makes it even more obvious that you're using different C-States for the different cores. What is the reason for this?

Also, in this block:

Method (_CST, 0, NotSerialized){    Return (Package (0x04)    {        0x03,        Package (0x04)        {            ResourceTemplate ()            {                Register (FFixedHW,                0x01,                0x02,                0x0000000000000000,,)

Shouldn't the last line read: 0x0000000000000000,0x01,)

And in the following blocks, you keep using FFixedHW when most other CST use SystemIO. I have no idea what that means but I noticed the difference. Is this intentional?

#53
Common Sense

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Any chance to get the apple shipped kext to work 100% by using a dsdt patch?

As the author of RealtekR1000SL.kext, I can assure you it does nothing at all that should affect the hard drives' icons.

Mine are still orange. :)



#54
Common Sense

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kdawg posted a very useful link to a forum in the gigabyte dsdt fix thread, I suggest you go and download the newest beta bios for ep45-ud3lr:
http://forums.tweakt...est-bios-28441/

It will make your computer boot much faster since it has the new ahci included.

Should we remake the dsdt and re-apply the patches because of the newer bios version?

#55
VMatas

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I'm using F6b (beta) BIOS and RepomanUK's dsdt file version with some changes(added GFX again, other cosmetics). All is in perfect working order - no needs for general code change.

#56
justgeeking

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Trying to learn what you folk are doing can u guys tell me if the links i saved is a good start to learn i know asking questions can get tedious

1. http://forums.gentoo...ic.php?t=122145

2. http://acpi.sourceforge.net/

3. http://acpi.sourcefo.../dsdt/index.php

4. http://en.wikipedia....Power_Interface

Thanks a million i hope all your configurations come out well.

Happy 2010
Justgeeking

http://www.acpi.info/spec.htm

#57
stickpin

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Updated to 1.2!
Check the first post. You'll need to replace your Chameleon boot file to make all stuff working! Becareful system-id will cause you some small settings reapply, like additional languages, etc...
Enjoy! :D

#58
greythorne

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Updated to 1.2!
Check the first post. You'll need to replace your Chameleon boot file to make all stuff working! Becareful system-id will cause you some small settings reapply, like additional languages, etc...
Enjoy! ;)


tried your boot file... i think yours did not have the pciroot=1 fix which will enable the graphics enabler fix to work.

#59
stickpin

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I do DSDT injection, so i dont need pciroot thing.
From what i know pciroot needed only if you use efistrings... and enabler uses efistring as well...
Ill post sources later with more details about changes i made.

#60
greythorne

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I do DSDT injection, so i dont need pciroot thing.
From what i know pciroot needed only if you use efistrings... and enabler uses efistring as well...
Ill post sources later with more details about changes i made.


cool. thanks. I am using the boot file you made. Anyway about the PciRoot=1 fix i have the GraphicsEnabler=yes in my com.boot.plist so without the PciRoot=1 the fix wont work. I am not using the efi strings for my gfx.





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