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Master Chief's P5K PRO ACPI Warfare


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The "(Mobile Only)" part is a bit confusing yes. I can't however not check the ICH10 datasheet – not at this very moment because I am moving the actual HD – so you have to wait or clue me in. Is this "Mobile Only" note also part of the ICH10 datasheet or not?

 

Nope, ICH10 datasheet has no such notes. Page 159 is also interesting, check that out.

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I know that you are removing things to the boot loader, but this was the only thing that i was missing from Chameleon2RC4 and so i tried to add it myself and it worked!

So now i have a Revolution v3.1 i think that is working as before but with the SystemUUID patch by rekursor added.

Revolution v3.1 already? Hold your horses! What have I missed? Yeah I know. Just a typo. No worries.

 

And we're most certainly not going to skip anything that might be interesting for us. The UUID patch by rekursor for example, will of course be part of my next update (be it a rewrite). But not his PCI root port patch (originally by Netkas). And I have three good reasons for it (not pointing fingers). Well. Maybe even more, but this is how I look at it right now:

 

1) We don't need it.

2) I don't want things to be done twice when there's no need for it.

3) There has got to be a better way.

 

And thus when we add such feature, then it has to be cleaner (read a lot faster).

 

Now I have all working (except SBUS that I only renamed the device-id ) like with Chameleon2RC4 but with a faster and with less warning boot.

Cool isn't it. Are you also using my modified kext for audio? Just checking!

 

Now imagine that we make this device properties thing twice as fast!

 

Nope, ICH10 datasheet has no such notes. Page 159 is also interesting, check that out.

Are you aware of the posts in the Vanilla SpeedStep thread (long time ago) about people reported to see C1+ states on Linux?

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Revolution v3.1 already? Hold your horses! What have I missed? Yeah I know. Just a typo. No worries.
:D

i'm holding them, or i was calling it a v4 ;)

It was just a joke i'm still with v3 now, waiting your update.

 

1) We don't need it.

2) I don't want things to be done twice when there's no need for it.

3) There has got to be a better way.

I'm of the same opinion, it's not needed for us and could be solved in other way

 

Are you also using my modified kext for audio? Just checking!

No, i've missed it and can't find again, i know it's somewhere in this topic. I'm using the one you posted in the 3rd post.

EDIT: i've found the post (#572) were you explained the fix you made, but i i can't understand well how to do it, if you can pass me the .kext or explain it better i'll try it.

 

Now imagine that we make this device properties thing twice as fast!

I like the idea :)

I like it very much

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Are you aware of the posts in the Vanilla SpeedStep thread (long time ago) about people reported to see C1+ states on Linux?

 

Don't recall that right now, but C2 should work, it's C3 and C4 that maybe don't work. I also finally found a way to verify that my cpu goes to C4. Device LPC, register A6, bit 7. That bit is set the first time cpu enters a C-state deeper than C2.

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..

 

No, i've missed it and can't find again, i know it's somewhere in this topic. I'm using the one you posted in the 3rd post.

EDIT: i've found the post (#572) were you explained the fix you made, but i i can't understand well how to do it, if you can pass me the .kext or explain it better i'll try it.

See post #595

 

Attached is a ZIP file with (only) two source files, the files I changed for this quick update. And fake_efi.c now includes a rewrite of the SystemID option patch (by rekursor) and something to stop a nagging boot message.

 

 

Don't recall that right now, but C2 should work, it's C3 and C4 that maybe don't work. I also finally found a way to verify that my cpu goes to C4. Device LPC, register A6, bit 7. That bit is set the first time cpu enters a C-state deeper than C2.

I played with these registers in the past, but never actually had any luck with them. Might be my board, or the failing DSDT I used to have at the time. Maybe it is time to give it another go.

 

There was something else I was planning to tell you, but I need food first. Not to mention sleep LOL

RevolutionChanges_V04.zip

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The rekursor patch rewritten is working but gives me another PlatformUUID with the same systemUUID than the rekursors old one.

 

The audio is not working anymore but i've put AppleHDA and IONetworkFamily (is this also related to audio?) in /E/E without a mkext in /E

 

before i was using only /E/E/LegacyHDAPlatformDriver.kext

 

at boot i've the error about Sound assertion "0 like you mentioned in your post but the audio device is not shown in sound proprieties

"waiting for dsmos" is back again now also if i come back to the previous boot... But now i've more HD connected also to the ide port.

Now i'll go to sleep, too tired to go on for today.

See you tomorrow (or in a few hours)

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See post #595

 

Attached is a ZIP file with (only) two source files, the files I changed for this quick update. And fake_efi.c now includes a rewrite of the SystemID option patch (by rekursor) and something to stop a nagging boot message.

 

 

 

I played with these registers in the past, but never actually had any luck with them. Might be my board, or the failing DSDT I used to have at the time. Maybe it is time to give it another go.

 

There was something else I was planning to tell you, but I need food first. Not to mention sleep LOL

 

Had to borrow CST from my MSI table to make C4 work, this is what I use now:

		Method (CST, 0, NotSerialized)
	{
		Return (Package (0x04)
		{
			0x3, 
			Package (0x4){ResourceTemplate (){Register (FFixedHW,0x01,0x02,0x00,,)},One,One,0x3E8}, 
			Package (0x4){ResourceTemplate (){Register (FFixedHW,0x01,0x02,0x10,,)},0x2,One,0x1F4}, 
			Package (0x4){ResourceTemplate (){Register (FFixedHW,0x01,0x02,0x30,,)},[color="#FF0000"]0x4[/color],0x39,0x064} 
		})
	}

 

MSI original had 0x3 instead of 0x4 as C-state number on C4 definition, with that C4 didn't work. Using the SystemIO addressing I also couldn't get C4 to work.

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Ok,

I can confirm that the last modification (not yet posted here for some technical problems) are working on my configuration.

So now the rewritten patch for the UUID option is working good for me.

 

Where can I follow the development? Which forum?

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Hi DrHurt,

I think it continue here on insanely, you can use the source posted till now for some test, they are without the rek patch but you can add yourself like i first did or try to contact TheChief via pm for the optimized code.

I think that he'll be back soon with some news.

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Just to make things a bit more clear:

 

To test Revolution v0.3 by TheChief you need to:

 

  1. Download Chameleon2RC4 source code
  2. Download TheChief's Revolution v3 source code and example files
  3. Compile Revolution and use the resulting boot file
  4. Add /Extra/ACPI/ssdt.aml adapted for your pstate more info, note: there are some example in the Revolution v3 .zip)
  5. Post here your results

 

the fake_efi.c file i've posted add the rekursors patch but TheChief has rewritten it in a future update, so for now i think it's not useful for the test phase.

 

Here is my ssdt.dsl with some device added to the dsdt integrated in Revolution

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Hi all. ...

That my friends is my Christmas present for you... Happy Hacking!

 

Ooo, this is marvelous, Master Chief :) Happy 2010 and all the best to you :dance_24::thumbsup_anim:

 

looking forward to work with this app :)

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Nice to read you again :)

A lot of success for this year and thanks for your help and ideas here. :mellow:

Thank you!

 

And speaking about new ideas... one of our interns made me a new boot logo, which I am going to test later today. This way we can hide the boring old BIOS text and see a nice Apple logo instead. Ok. There's still one (Checking NVRAM) that keeps showing up, but the rest is gone. Well. That and this AMI logo which I think can be removed more easily. I'll keep you posted, as usual ;)

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happy to see you back in forum.

lokking forward to the time we can use your new loader.

dont know if its allowed to write this but then correct me then.

i will be happy to donate some bugs for your time spend with this.

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@MS

I would have a question still to the V331.

Everything perfectly up to sleep.

 

Reason is following (diff V331 // V33).

-                OperationRegion (PMCS, PCI_Config, 0x54, 0x02) // Power Management Control/Status (ICH9R-3169722.pdf / 17.1.19 / page 664).
-                Field (PMCS, WordAcc, NoLock, Preserve)
+                OperationRegion (RGRP, PCI_Config, 0x54, 0x12)	// Power Management Control/Status (ICH9R-3169722.pdf / 17.1.19 / page 664).
+                Field (RGRP, WordAcc, NoLock, Preserve)

With RGRP, PCI_Config, 0x54, 0x12 no chance, however with PMCS, PCI_Config, 0x54, 0x02.

Interesting although mine MoBo also has Ich9R.

 

an idea?

thx

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@MS

an idea?

thx

Hi,

I have no problem without that part at all, have you tried?

Device (EHC1){Name (_ADR, 0x001D0007)
			Name (_PRW, Package (0x02){0x0D,0x04})
			/*OperationRegion (PMCS, PCI_Config, 0x54, 0x12)
			Field (PMCS, WordAcc, NoLock, Preserve){
					,   15, 
				PMES,   1, 
						Offset (0x0E), 
				URE2,   9
			}
			Method (_PSW, 1, NotSerialized){Multiply (0x01FF, Arg0, URE2)}*/
		}

 

My Mobo has ICH9

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Hi,

I have no problem without that part at all, have you tried?

Device (EHC1){Name (_ADR, 0x001D0007)
				   Name (_PRW, Package (0x02){0x0D,0x04})
				   /*OperationRegion (PMCS, PCI_Config, 0x54, 0x12)
				   Field (PMCS, WordAcc, NoLock, Preserve){
						   ,   15, 
					   PMES,   1, 
							   Offset (0x0E), 
					   URE2,   9
				   }
				   Method (_PSW, 1, NotSerialized){Multiply (0x01FF, Arg0, URE2)}*/
			   }

 

My Mobo has ICH9

You mean with "R"evolution :), since you have commented out the code /* */

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@MS

I would have a question still to the V331. Everything perfectly up to sleep.

 

Reason is following (diff V331 // V33).

...see post #747

With RGRP, PCI_Config, 0x54, 0x12 no chance, however with PMCS, PCI_Config, 0x54, 0x02.

Interesting although mine MoBo also has Ich9R.

 

an idea?

thx

WordAcc? Change it into:

                OperationRegion (PMCS, PCI_Config, 0x54, 0x10)	// Power Management Control/Status (ICH9R-3169722.pdf / 17.1.19 / page 664).
               Field (PMCS, AnyAcc, NoLock, Preserve)
               {
                       ,   15,
                   PMES,   1,					// Bit 15, PME Status, single bit.
                           Offset(0x0E),			// 0x62 – Port Wake Capabilities Register (ICH9R-316972.pdf / 17.1.25 / page 667).
                   URE2,   9
               }

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WordAcc?

 

Welcome back,

I was making some test today with a combo of extremelyinsane, v3.3.1 and the dsdt in Revolution and I don't undertand why if I remove all the Sbus part like in revolution I hav no more wake after sleep.

I need to keep this code for smbus to have wake working:

Device (SBUS){Name (_ADR, 0x001F0003)
			OperationRegion (SMBE, PCI_Config, 0x04, 0x02)
			Field (SMBE, AnyAcc, NoLock, Preserve){
				IOSE,   1
			}
			Name (SBOK, Zero)
			Method (ENAB, 0, NotSerialized){Store (One, IOSE)Store (One, SBOK)}
			Method (DISB, 0, NotSerialized){Store (Zero, SBOK)}
		}

and this:

Method (_PTS, 1, NotSerialized){
	If (LEqual (Arg0, 0x05)){Store (One, \_SB.PCI0.LPCB.AG3E)}
	Else{
		\_SB.PCI0.SBUS.DISB ()		//Needed for wake
		\_SB.PCI0.LPCB.SPTS ()		// Needed for wake 
		Store (Arg0, ASSB)
	}
}
Method (_WAK, 1, NotSerialized){
	\_SB.PCI0.SBUS.ENAB ()		 // Neede for wake
	Return (Package (0x02){Zero,Zero})
}

 

With the dsdt I have made i have no more waiting for dsmos like in the previous version of Revolution.

Now with Revolution v3 the last one you send me I have it again.

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Welcome back,

I was making some test today with a combo of extremelyinsane, v3.3.1 and the dsdt in Revolution and I don't undertand why if I remove all the Sbus part like in revolution I hav no more wake after sleep.

I need to keep this code for smbus to have wake working...

Thanks. I looked at it, but we have an emergency here so I won't have time for you right now. Later.

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