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DSDT - Vanilla Speedstep - Generic Scope (_PR)


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#1841
FKA

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@FKA: i gotta say, i did notice a bit slowness in itunes when editing the track tags, and also when changing songs manually(i.e. doubleclick a track or press "next" button)


Things like that can be a good sign something 'aint right - but it's always good to be sure :)
Have you tried extracting SSDT tables that are generated by Chameleon to see what's been added?
You can easily extract them using DSDTSE.

Hope you get it sorted.

D

#1842
SaGaR_

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no i havent yet, but i get 3 ssdt tables, SSDT, SSDT-1 and SSDT-2
so if you could tell me what i am looking for then i'll take a look at it tomorrow

#1843
FKA

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no i havent yet, but i get 3 ssdt tables, SSDT, SSDT-1 and SSDT-2
so if you could tell me what i am looking for then i'll take a look at it tomorrow


something like what I've attached in the 1st post. _CST and _PSS values.

#1844
SaGaR_

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okay, i'll check and you'll be hearin' from me, but for now, thanks and goodnight!:)

edit; okay, it seems like my last 2 post have been merged:p anyways:
it turned out to be 2 tables, but here they are.
uhm, what do i do with it? it does contain some cst and pss stuff

Attached Files

  • Attached File  ssdt.zip   1.96KB   13 downloads


#1845
FKA

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okay, i'll check and you'll be hearin' from me, but for now, thanks and goodnight!:thumbsup_anim:

edit; okay, it seems like my last 2 post have been merged:p anyways:
it turned out to be 2 tables, but here they are.
uhm, what do i do with it? it does contain some cst and pss stuff


Looks like you have 10 p-states (PSS) generated and C1 and C3 C-States (CST)
Maybe look to see what C-states your CPU supports and see chameleon 2 rc5 (p and c-states generation) thread - you can have chameleon generate C4 and C6 if CPU supports.

Out of here for the weekend - enjoy :D

#1846
SaGaR_

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okay thanks, i'll try to solve it, and if all else fails..."i'll be back" xD
have a nice weekend;)

#1847
SaGaR_

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hi,
i searched on google and this forum, trying to understand what you tried to tell me, but i figured that i really have no idea whatcha meant xD

i tried to turn off P/C states gen in chameleon, but then i get a totally different ssdt's;

but once again i have no clue of what to do:(..

edit:
omg, it was my modelname, it wasn't spelled right, so it didn't recognize it. and now it seems to work even in MSR tools, i see it changing from 50% to 111%

ooh btw this all i achieved without the "Generate C and P states" from chameleon!
is that good, or will it be better when i enable it from chameleon?

oh and there is one thing that keeps me wondering:
sysctl -a | grep cpufrequency
hw.cpufrequency = 2260000000
hw.cpufrequency: 2260000000
hw.cpufrequency_min: 2260000000
hw.cpufrequency_max: 2260000000

edit2:
I answered my own question; with Chameleon generated C-States i get a lower idle temp, so i think i can say it works perfectly,
BUT: i ran against another little problem, now when i install SleepEnabler i get KP on boot, it says something about AppleIntelCPUPowerManagement.kext
is there any alternative to make it sleep(it's a laptop)

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#1848
FKA

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Bit off topic mate - but yes search the forum for "RIP3 Script"

D

#1849
SaGaR_

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yeah i know, but i have it since this all worked, but anyways,
thank you very much!
it works:)
and now i need to find a way to get sleep working in general.
i was hoping for a dsdt fix, but i'm still working on that, i searched alot but can't get it to work, so maybe if you could point me in right direction, then i won't be posting anymore in this topic:)

#1850
mastershredder

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Hi all

good news is chameleon auto generated p states and c states works
bad news is they dont work as well

Reason
only educated guessing here but my q6600 is overclocked to 3GHz which would be the logical answer however thinking deeper it makes no sense as this is the G0 stepping and i can run at 3GHz with less voltage specified manually in bios than if i left it as auto in bios.
The VID values i used in the DSDT orginally were made based upon the voltages i manually set in the bios. As these are lower than the default values one would expect temps to go slightly up using auto generated C states and P states in chameleon as this is basically extracting values from SSDT tables from bios and injecting them properly into the operating system. however what is occuring is random instability in the operating system using the new chameleon method so i have returned to just manually using the DSDT method as i have had the most stable system for nearly a year without incident and this was the only recent change i made.

second topic

i have just bought and started the long process of getting mac stable on a new laptop the lenovo Z560 great laptop very compatible except audio
however as this is a new i3 it has way more information in the SSDT tables and i have yet to take the plunge and editing the dsdt to include the c state and p state information and i am currently just using chameleon to do the hard work for me. now for whatever reason once i am booted into the os and at desktop its very stable havent had a single crash but when booting its a different story i recieve mabey 1 out of 3 times when booting a random kernel panic relating to many things . originally i thought i was due to voodoohda as it was always present in the kernel backtrace of dependencies however this is not the case as i have these kernel panics occuring on completely unrelated things. this leads me to believe that again its the chameleon p state and c states at fault. that last statement is a bit harsh i shall try and explain further the SSDT and DSDT state there are 8 CPUS in this machine and this is seen when booting in verbose mode however CPUs 4 to 7 are disabled this obviously occurs as this machine can be configured with a dual core i3 /i5 which would be 4 cores 2 physical and 2 logical hyperthreading and a core i7 4 physical 4 logical now this is why the SSDT tables contain the extra info for these core that dont exist this may be partly responsible for the instablilty of the chameleon method as its scraping this info from the SSDTs and injecting it accordingly. WHat i would like to know is there any way to use voodoopstate or any other tool that will work with the new core i3 processors as the way i got this information for my q6600 does not work for this core i3 350m ie the tools dont support the new architecture.

ps sorry for ther long winded rant -_-

#1851
MatzeOS86

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Hello everyone,
At the moment I've a big problem.
I don't get the VID and Voltage, no matter what I try.

Here is what I get with CPU-Z under Windows:

...
FID/VID Control yes

Turbo Mode supported, enabled
Max turbo frequency 2933 MHz
Max non-turbo ratio 20x
Max turbo ratio 22x
Max efficiency ratio 12x
TDC Limit 110 Amps
Core TDP 110 Watts
Uncore TDP 20 Watts
Power @ 12x 43 Watts
Power @ 13x 50 Watts
Power @ 14x 57 Watts
Power @ 15x 66 Watts
Power @ 16x 76 Watts
Power @ 17x 87 Watts
Power @ 18x 100 Watts
Power @ 19x 114 Watts
Power @ 20x 130 Watts
...


And that's what PStateChanger returns:
Posted Image

But the VID is the FID...

So does anyone know what's going wrong?

Regards Matthias

#1852
kizwan

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I believe there is a simpler way to get proper speedstep. seeker_moc & error-idiot @ NBR forum introduced me BIOS Implementation Test Suite (BITS) . This tool basically can check your computer BIOS & make necessary correction to processor P-States, where you can dump the modified SSDT table & reintegrate it into your DSDT. Check it out!

And that's what PStateChanger returns:
Posted Image

But the VID is the FID...

So does anyone know what's going wrong?

This is because Nehalem processors have locked VID & FID. Probably Intel change the register to read VID & FID on Nehalem processors.

#1853
JBraddock

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I believe there is a simpler way to get proper speedstep. seeker_moc & error-idiot @ NBR forum introduced me BIOS Implementation Test Suite (BITS) . This tool basically can check your computer BIOS & make necessary correction to processor P-States, where you can dump the modified SSDT table & reintegrate it into your DSDT. Check it out!.

Hi Kizwan, it's been a long time ;) I hope you are all well.

Does it make permanent changes to Bios (P-States etc.)? If so, can I assume that I will not need to edit my DSDT file as I am using AnVaL to generate P and C states based on my SSDT tables? Or does it just show me the corrections and allow me to dump those newly generated tables for later use?

#1854
kizwan

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Does it make permanent changes to Bios (P-States etc.)? If so, can I assume that I will not need to edit my DSDT file as I am using AnVaL to generate P and C states based on my SSDT tables? Or does it just show me the corrections and allow me to dump those newly generated tables for later use?

It doesn't change the existing BIOS. BITS test the BIOS initialization of Intel processors, hardware, and technologies against Intel recommendations. BITS also includes Intel's official reference code, which you can use to override your BIOS's hardware initialization with a known-good configuration, and then boot an OS. Just read all about it @ http://biosbits.org/

If you don't want to use BITS as intermediate boot loader, you can dump the fixed SSDT table & integrate it in the DSDT. This way you won't need to use boot loader to generate P & C states for you.

#1855
JBraddock

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It doesn't change the existing BIOS. BITS test the BIOS initialization of Intel processors, hardware, and technologies against Intel recommendations. BITS also includes Intel's official reference code, which you can use to override your BIOS's hardware initialization with a known-good configuration, and then boot an OS. Just read all about it @ http://biosbits.org/

If you don't want to use BITS as intermediate boot loader, you can dump the fixed SSDT table & integrate it in the DSDT. This way you won't need to use boot loader to generate P & C states for you.

Say, I run the test and it made corrections for my SSDT tables. But later, in order to dump all those fixed SSDT tables I need to boot into Linux right? Since I don't have Windows installed, that seems the only choice. But the problem is, looking at the screen shots at that website, there are only two options; Boot first drive MBR and boot second drive MBR.

Does this mean that after making the corrections I can't use a Linux live Cd to boot into Linux? In my case, what would be the best option, if any, to dump the fixed SSDT tables? Do I need a separate hard drive on which Windows or Linux installed to dump all those SSDT tables?

#1856
kizwan

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Say, I run the test and it made corrections for my SSDT tables. But later, in order to dump all those fixed SSDT tables I need to boot into Linux right? Since I don't have Windows installed, that seems the only choice. But the problem is, looking at the screen shots at that website, there are only two options; Boot first drive MBR and boot second drive MBR.

Does this mean that after making the corrections I can't use a Linux live Cd to boot into Linux? In my case, what would be the best option, if any, to dump the fixed SSDT tables? Do I need a separate hard drive on which Windows or Linux installed to dump all those SSDT tables?

I only tested it with windows but it should work with linux too. After you have choose which configuration you want in "Configure Menu", boot to linux by choosing "Boot first drive MBR" or "boot second drive MBR", depend on where linux is installed. Then dump SSDT table in linux.

#1857
JBraddock

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I only tested it with windows but it should work with linux too. After you have choose which configuration you want in "Configure Menu", boot to linux by choosing "Boot first drive MBR" or "boot second drive MBR", depend on where linux is installed. Then dump SSDT table in linux.

I see. I think I'll try to find external hard drive to install Windows. But at this point, theoretically speaking, once I've run the test and chosen to boot into my first HDD on which Snow Leopard is installed, Chemeleon should be able to generate P and C States according to the fixed SSDT tables. Am I right?

Also in your case, did you see any improvement in your temp values or the way that CPU is being utilised by OS.

#1858
MatzeOS86

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Thanks kizwan for your reply, but this doesn't solve my problem.

I mean the VID and FID have to be there and there has to be a solution to read them out, actually I hope...

#1859
kizwan

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I see. I think I'll try to find external hard drive to install Windows. But at this point, theoretically speaking, once I've run the test and chosen to boot into my first HDD on which Snow Leopard is installed, Chemeleon should be able to generate P and C States according to the fixed SSDT tables. Am I right?

Also in your case, did you see any improvement in your temp values or the way that CPU is being utilised by OS.

Yeah, theoretically speaking, it should work with Snow Leopard too. After you have chosen your desired configuration & boot into first HDD on which Snow Leopard is installed, your Snow Leopard will get new SSDT with fixed P-States. You don't need to tell Chameleon to generate P & C states anymore because that would be redundant. I'm unable to test this on my notebooks because P & C states are properly detected without telling Chameleon to generate P & C states for me.

I only tested this with windows but I didn't see or feel any improvements. When running the test, everything is OK on my notebook. The only error it found is one C state failed "demotion" routine. I don't know what that's for though (didn't bother to google it ;) ). The BITS ability to generate correct SSDT with fixed P States will definitely help who ever have problem with P States on their computer with OS X.

Thanks kizwan for your reply, but this doesn't solve my problem.

I mean the VID and FID have to be there and there has to be a solution to read them out, actually I hope...

Yeah, you're right. I though it have similar issue with mobile nehalem processors. I spent too long at notebook forum. Nehalem mobile processors; i3, i5 & i7 have locked VID. Can't even monitor it, let alone control it for e.g. undervolting. In your issue, it is best look directly in the _PSS control method in SSDT table.

#1860
MatzeOS86

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I've now dumped the SSDT with Everest under Windows, but the _PSS Method looks a bit strange to me.
And I guess that I won't get the VID/mV out of the table, right?

Thats what the method looks like:

Method (_PSS, 0, NotSerialized)
{
If (LAnd (LNot (And (CFGD, 0x4000)), LEqual (And (PDC0,
0x09), 0x09)))
{
Return (NPSS)
}

Return (SPSS)
}







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