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[Guide] Using DSDT with the Gigabyte GA-EP45-DS3L


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#281
petrs99

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Yes, you are right, I will try to post it there if I have some more questions about the speedstep. Thx

#282
rednous

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Blackosx, I would like to apologize for not being answering your previous replies to my posts :)

So, here's mine current situation. Finally, I managed to implement my CPU's 6 P-states in the DSDT (actually i modified your DSDT dated Nov 9th 2009) successfully :(

screenshot


I think i have implemented the C-states too, but I'm not quite sure, though.
Here's how the C-states (modified by me) part of mine DSDT looks like:
Method (_CST, 0, NotSerialized) // C-states
		{
		Return (Package (0x04)
		{
			0x03, 
			Package (0x04) {ResourceTemplate () {Register (FFixedHW, 0x00, 0x00, 0x0000000000000000)},0x01,0x01,0x03E8},
			Package (0x04) {ResourceTemplate () {Register (SystemIO, 0x08, 0x00, 0x0000000000000414)},0x02,0x01,0x01F4},
			Package (0x04) {ResourceTemplate () {Register (SystemIO, 0x08, 0x00, 0x0000000000000416)},0x03,0x96,0x64}
		})
		}
	}

I'm posting also my current DSDT and my SSDT table (dumped under ubuntu) if you or someone else could tell me if it's right implemented. I think i have more than 3 C-states, but i'm not quite sure. So any assistance would be appreciated :)

My current DSDT with E7500 P-states implemented:


SSDT table (dumped under ubuntu):


Finally, I want to thank to you Blackosx, Master Chief and all other guys doing this marvelous job with the deepest parts of the mighty DSDT.
:D

#283
blackosx

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Blackosx, I would like to apologize for not being answering your previous replies to my posts :D

So, here's mine current situation. Finally, I managed to implement my CPU's 6 P-states in the DSDT (actually i modified your DSDT dated Nov 9th 2009) successfully :D

Well done rednous, don't worry about it. We're all busy people :)
I am trying my best to learn how these DSDT's are pieced together and how the data corresponds to what?.. So at the moment my DSDT is a copied, hashed together and edited version of all the info I can gather. Mostly MasterChief's from the P5K Pro thread, mm67's and others from the Gigabyte Fix thread.

Your ioreg PerformanceStateArray shows 6 x P-States.

I think i have implemented the C-states too, but I'm not quite sure, though.
Here's how the C-states (modified by me) part of mine DSDT looks like:

Method (_CST, 0, NotSerialized) // C-states
		{
		Return (Package (0x04)
		{
			0x03, 
			Package (0x04) {ResourceTemplate () {Register (FFixedHW, 0x00, 0x00, 0x0000000000000000)},0x01,0x01,0x03E8},
			Package (0x04) {ResourceTemplate () {Register (SystemIO, 0x08, 0x00, 0x0000000000000414)},0x02,0x01,0x01F4},
			Package (0x04) {ResourceTemplate () {Register (SystemIO, 0x08, 0x00, 0x0000000000000416)},0x03,0x96,0x64}
		})
		}
	}

Your C-States look okay (as far as I can tell) and I see the data you have used in your SSDT. And I see you have used the data from the 'If (And (CFGD, 0x80))' section which gives you 414 and 416. Your SSDT table is exactly the same as mine and I didn't know what set of data to use (see my post here). So I ended up using 414 and 415 as others were using.
I don't know it if makes a difference or not, as as far as I can tell, my processor only seems to enter C1 so I don't know if the C2 & C3 data really comes in to play.

Finally, I want to thank to you Blackosx, Master Chief and all other guys doing this marvelous job with the deepest parts of the mighty DSDT.

It's MasterChief and the other main contributors you need to be thanking as all I am really doing is copying their work, trying to understand it and relaying back here. But thanks anyway :)

#284
Capt_Boom

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Thanks to everyone's help especially Master Chief and blackosx I've managed to cobble together a working dsdt.aml file.

Everything works with one small exception.

I have sleep, wake, shutdown, restart, Video 8600GTS LAN, and even USB as well as Speedstep both pstate and cstate working.

My minor glitch remaining is with the external hd giving me an error after waking from sleep.
The USB Ports are showing up as built in with the exception of the one that the drive is plugged in to regardless of which usb port it's plugged into it still shows up as Expansion Slot AppleUSBEHCI So i'm just a tad confused.

I've posted my dsdt.dsl file hopefully someone can take a peek and tell me what i've done wrong.

Thanks in advance.

Attached Files



#285
blackosx

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I have sleep, wake, shutdown, restart, Video 8600GTS LAN, and even USB as well as Speedstep both pstate and cstate working.

My minor glitch remaining is with the external hd giving me an error after waking from sleep.
The USB Ports are showing up as built in with the exception of the one that the drive is plugged in to regardless of which usb port it's plugged into it still shows up as Expansion Slot AppleUSBEHCI So i'm just a tad confused.

Well done Capt_Boom ;)
Check your Return (MCID.... device ID's at the bottom of EHCI and UHCI. They both read 0x3A34. Mine report as 0x293A and 0x293C. See if that helps :)

#286
helob

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"Note: You can run your system without NullCPUPowerManagement.kext and SleepEnabler.kext but your CPU will run hotter, so in that case you need to look at introducing Intel SpeedStep by patching P-States & C-States in to your DSDT. For further info, see my DSDT thread." Quote from blackosx Vanilla Retail 10.6.2

Hi blackosx,
I have sucessfully update to 10.6.2 following your excellent guide. I would like to patch my DSDT to enable Intel SpeedStep P & C-states to get rid of NullCPUPowerManagement.kext and SleepEnabler.kext.
Following your above advise, I went through this thread as well as the DSDT 2.4 guide but have difficulty figuring out what to patch in my DSDT to enable SpeedStep.
Would apprecaite if you could update your DSDT V2.4 guide to include P-States & C-States patching.
TQ for your time.
Have a nice day

#287
blackosx

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"Note: You can run your system without NullCPUPowerManagement.kext and SleepEnabler.kext but your CPU will run hotter, so in that case you need to look at introducing Intel SpeedStep by patching P-States & C-States in to your DSDT. For further info, see my DSDT thread." Quote from blackosx Vanilla Retail 10.6.2

Hi blackosx,
I have sucessfully update to 10.6.2 following your excellent guide. I would like to patch my DSDT to enable Intel SpeedStep P & C-states to get rid of NullCPUPowerManagement.kext and SleepEnabler.kext.
Following your above advise, I went through this thread as well as the DSDT 2.4 guide but have difficulty figuring out what to patch in my DSDT to enable SpeedStep.
Would apprecaite if you could update your DSDT V2.4 guide to include P-States & C-States patching.
TQ for your time.
Have a nice day

Hi helob

For Speedstep - I have to point you to FormlerlyKnownAs' Vanilla Speedstep thread. It will require you spending a bit of time reading and trying to understand. There have also been a couple of recent posts in this thread which might help you.

I know you would appreciate me updating my DSDT guide but I am very busy at the moment learning more about DSDT myself. When I understand it better then I might get round to updating the guide.

But have a go, look at my latest DSDT, which I have posted on the front page, for reference. At the top of if, you'll see a Method (_PSS which is for P_states, and Method (_CST which is for C-States. I know it's not easy, but trying to understand it is the best way to learn.

But if you can be patient then I will hopefully put together a simple how to post soon :angel:

#288
Capt_Boom

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Well done Capt_Boom :D
Check your Return (MCID.... device ID's at the bottom of EHCI and UHCI. They both read 0x3A34. Mine report as 0x293A and 0x293C. See if that helps :)




Oddly enough i tried your suggestion and it had absolutely no change.

Would you mind sending me yo ur latest copy blackosx i'd like to compare your and my files.

Thanks

#289
blackosx

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Oddly enough i tried your suggestion and it had absolutely no change.

Would you mind sending me yo ur latest copy blackosx i'd like to compare your and my files.

Thanks

Here's my current work in progress DSDT.dsl that I am using. It looks a bit different to previous as I have been working through MasterChief's DSDT v3.1, and I have been doing some testing.

Note: As always, this contains P-States for my CPU and you must change the data for your CPU.

Attached Files



#290
helob

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Hi helob

For Speedstep - I have to point you to FormlerlyKnownAs' Vanilla Speedstep thread. It will require you spending a bit of time reading and trying to understand. There have also been a couple of recent posts in this thread which might help you.

I know you would appreciate me updating my DSDT guide but I am very busy at the moment learning more about DSDT myself. When I understand it better then I might get round to updating the guide.

But have a go, look at my latest DSDT, which I have posted on the front page, for reference. At the top of if, you'll see a Method (_PSS which is for P_states, and Method (_CST which is for C-States. I know it's not easy, but trying to understand it is the best way to learn.

But if you can be patient then I will hopefully put together a simple how to post soon ;)


Hi blackosx,
TQ for your help and advise.
I will be looking forward to your excellent step by step procedure on speedstep implementation.
Mean while I will try to read up more on Speedstep.
TQ again for sharing with us.
Have a nice day.

#291
Shecky Lovejoy

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I am having problems getting my ethernet working on a EP45-DS3L with DSDT. I am not using the on-board controller, as I've found it to have issues with high-speed transfers on a gigabit network (the hackintosh is used exclusively on a render farm and fully utilizing gigabit bandwidth is crucial). In any event, I've been using a Netgear GA311 with great success under Leo 10.5.7 which was installed using blackosx' guide for same. I do not use DSDT in Leo. The card just plugged in and worked perfectly OTB. My video is configured with com.apple.boot.plist and works good enough for a render farm box (Geforce 6600GT 256)

In preparation for installing Snow Leo and FCS3, I want to get a working DSDT going in Leo as recommended by blackosx. I've got the video going fine (seems to work better than the com.apple.boot.plist config), but I cannot get the GA311 working no matter what configuration I try. The card shows up as (en1) in the Network Sys Prefs, but it says that the cable is unplugged, when it very clearly is plugged in.

The Problem:
Using DSDT and a GA311, I cannot get my hackintosh to recognize that an ethernet cable is plugged in.

The Box:
EP45-DS3L
8 GB RAM
Core 2 Quad 2.83 Q9550
GeForce 6600GT
Netgear GA311
OS X 10.5.7 (installed using blackosx' guide for same)
BIOS 11b

KEXT (in E/E):
AppleDecrypt.kext
ATAPortInjector.kext
Disabler.kext
fakesmc.kext
IOAHCIBlockStorageInjector.kext
JMicronATAInjector.kext
OpenHaltRestart.kext
UUID.kext

Unusual BIOS options:
On-board LAN disabled
Otherwise, my BIOS setting match those in blackosx' guide

I don't use on this box:
Audio (would be nice to have, but I don't need it)
Time Machine

What I've tried:

1) IORegistryExplorer lists the GA311 at PCI0, so that was my first go at it. I selected the same options on the ethernet tab as in this guide. No love.

2) I tried every other combination of options on the ethernet tab. Still no love.

3) I tried enabling on-board LAN and setting the DSDT to PEX5. The on-board worked in it's limited way, but still no love from the GA311.

4) I tried returning to the PCI0 configs with the on-board LAN enabled, but that didn't work either.

I saw that zengiga also was having issues with the GA311, but he seemed to have it working, just spitting out errors.

Any help would be greatly appreciated.

#292
ZenGiga

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The Problem:
Using DSDT and a GA311, I cannot get my hackintosh to recognize that an ethernet cable is plugged in.

I saw that zengiga also was having issues with the GA311, but he seemed to have it working, just spitting out errors.

Well. What I found is that I couldn't get the GA311 to be recognized as "on board" – which makes some sense ;)
I ended up setting the motherboard ethernet as on board so time machine was happy, but not connecting a cable to it. The cable is connected to the GA311 and everything works fine.

I've never had an issue with the GA311 stopping working, no matter what DSDT stuff I've done (well maybe trying to make it 'on board' broke it, can't remember).

I've had no issues with printers shared via bonjour going awol since I started using the GA311, so I still prefer it to the on mobo for my setup.
Here's the LAN section that works for me, for the mobo eth of course, in the 'old fashioned' DSDT I currently use generated by Patcher05 as described in the guide – the new DSDTs BlackOSX has been posting are quite different :(

Device (LAN)
				{
					Name (_ADR, Zero)
					Name (_PRW, Package (0x02)
					{
						0x0B, 
						0x04
					})
					Method (_DSM, 4, NotSerialized)
					{
						Store (Package (0x04)
							{
								"built-in", 
								Buffer (One)
								{
									0x01
								}, 

								"device_type", 
								Buffer (0x09)
								{
									"ethernet"
								}
							}, Local0)
						DTGP (Arg0, Arg1, Arg2, Arg3, RefOf (Local0))
						Return (Local0)
					}
				}
			}


#293
Shecky Lovejoy

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Here's the LAN section that works for me, for the mobo eth of course, in the 'old fashioned' DSDT I currently use generated by Patcher05 as described in the guide �" the new DSDTs BlackOSX has been posting are quite different :)


Thanks, I'll give it a shot tonight. Just to be clear, in your setup, you have on-board LAN enabled in BIOS, but unused? And there is no reference at all to the GA311 in your DSDT?

This will be my first manual edit, so wish me luck! I'm also going to try switching the PCI slot, see if that does anything.

FWIW, in my testing, Bonjour was not the only problem with the on-board LAN, even with all the proper mojo applied. Often, it reconfigures itself to 100T/half-duplex. Even with 1000T/full, speeds were about 40% slower both ways than with the GA311 or with a regular Mac. In my current configuration (based on blackosx' 10.5.7 guide). FYI, I have everything plugged into a Linksys gigabit switch via cat 6 cable behind a Airport Extreme.

Thanks again

#294
ZenGiga

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Just to be clear, in your setup, you have on-board LAN enabled in BIOS, but unused? And there is no reference at all to the GA311 in your DSDT?

That's right. I tried, it didn't work.

I'm also going to try switching the PCI slot, see if that does anything.

I tried that, made no difference.

FWIW, in my testing, Bonjour was not the only problem with the on-board LAN, even with all the proper mojo applied.

Well, I only have 100baseT at the moment, so wouldn't have noticed. ;)
Feeling happier about my investment in the GA311 hearing all that!

Good luck.

#295
Shecky Lovejoy

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Success!

I tried:

1) First I compared your LAN string with the PEX5 DSDT I had created and saw they were exactly the same, so I realized it was not an error in the DSDT I had created.

2) Deleted network config prefs and restarted. Still no love.

3) Then I deleted the network config prefs, shut down, pulled the GA311 and restarted. Ran the Network Sys Prefs and saved the new config. Shut down again. Put the GA311 back into in the other PCI slot (the one closest to the edge of the board) and restarted. When I opened the Network Sys Prefs, the GA311 showed up as en1, and after I saved the config, was able to plug in and get full networking going.

THANKS FOR THE HELP!!!

Now however, my Geekbench score dropped from 6129 to to 5172. Ack!

EDIT: Realized that all the messing with the network screwed up qmaster, which was spinning off crashes left and right and that was the reason for my lowered Geekbench scores. Now with the problem fixed Geekbench score is slightly lower, but just by 100 or so.

On to messing with p-states. Scary.

#296
jamonda

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Koalala says that "using this patcher with Gigabyte hardware Dual-BIOS mainboard is risky even if it seems safer".
Does he mean it is also risky to use the patcher only for generating the DSDT.aml file which will be put in the Extra folder of the Chameleon partition?

Can the patcher be safely used only to generate de DSDT.aml file for a GA-EP45-UD3L motherboard (with the hardware dual-bios feature)?

#297
blackosx

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Koalala says that "using this patcher with Gigabyte hardware Dual-BIOS mainboard is risky even if it seems safer".
Does he mean it is also risky to use the patcher only for generating the DSDT.aml file which will be put in the Extra folder of the Chameleon partition?

Can the patcher be safely used only to generate de DSDT.aml file for a GA-EP45-UD3L motherboard (with the hardware dual-bios feature)?

Koalala was referring to the old days when you had to flash the BIOS with a revised file. Now we can use the bootloader to override DSDT and makes it safer as it leaves the BIOS as it was. So yes, you can generate a DSDT.aml file for GA-EP45-UD3L.

#298
blackosx

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P-State guide...
FormerlyKnownAs has re-written the front page of his vanilla speedstep thread to help anyone get their heads around P-States etc.. It's the best pace to learn about what you need for Speedstep. So read his post to find out everyhing as he knows a lot more than me.

But to help you follow it, I have outlined the steps here.
This is supposed to be an aid to get you started with Speedstep and not an attempt to start a whole new wave of posts here about why, how etc. I still recommend you use FormerlyKnownAs' guide and thread for Speedstep and any major questions should still be directed there as more experienced users there will be able to help out.

• Please note that the tools I have posted here are for Snow Leopard only.

If you are not using the GA-EP45-DS3L and your board doesn't use exactly ICH10 (for example ICH10R or ICH9) then you must follow the LPC fix.
• You first need to check if your mobo has the correct device-id for an LPC Interface controller. (Thanks mm67)
• For this, you'll need to download and run the myHack_lspci_Installer package (I have attached it at the bottom of this post) which came from here .
• After installing lspci, open Terminal and type lspci -nn and press enter and you will see a list of devices similar to the following..
00:00.0 Host bridge [0600]: Intel Corporation 4 Series Chipset DRAM Controller [8086:2e20] (rev 02)00:01.0 PCI bridge [0604]: Intel Corporation 4 Series Chipset PCI Express Root Port [8086:2e21] (rev 02)00:1a.0 USB Controller [0c03]: Intel Corporation 82801JI (ICH10 Family) USB UHCI Controller #4 [8086:3a37]00:1a.1 USB Controller [0c03]: Intel Corporation 82801JI (ICH10 Family) USB UHCI Controller #5 [8086:3a38]00:1a.2 USB Controller [0c03]: Intel Corporation 82801JI (ICH10 Family) USB UHCI Controller #6 [8086:3a39]00:1a.7 USB Controller [0c03]: Intel Corporation 82801JI (ICH10 Family) USB2 EHCI Controller #2 [8086:3a3c]00:1b.0 Audio device [0403]: Intel Corporation 82801JI (ICH10 Family) HD Audio Controller [8086:3a3e]00:1c.0 PCI bridge [0604]: Intel Corporation 82801JI (ICH10 Family) PCI Express Port 1 [8086:3a40]00:1c.5 PCI bridge [0604]: Intel Corporation 82801JI (ICH10 Family) PCI Express Port 6 [8086:3a4a]00:1d.0 USB Controller [0c03]: Intel Corporation 82801JI (ICH10 Family) USB UHCI Controller #1 [8086:3a34]00:1d.1 USB Controller [0c03]: Intel Corporation 82801JI (ICH10 Family) USB UHCI Controller #2 [8086:3a35]00:1d.2 USB Controller [0c03]: Intel Corporation 82801JI (ICH10 Family) USB UHCI Controller #3 [8086:3a36]00:1d.7 USB Controller [0c03]: Intel Corporation 82801JI (ICH10 Family) USB2 EHCI Controller #1 [8086:3a3a]00:1e.0 PCI bridge [0604]: Intel Corporation 82801 PCI Bridge [8086:244e] (rev 90)<strong class='bbc'>00:1f.0 ISA bridge [0601]: Intel Corporation 82801JIB (ICH10) LPC Interface Controller [8086:3a18]</strong>00:1f.2 SATA controller [0106]: Intel Corporation 82801JI (ICH10 Family) SATA AHCI Controller [8086:3a22]00:1f.3 SMBus [0c05]: Intel Corporation 82801JI (ICH10 Family) SMBus Controller [8086:3a30]01:00.0 VGA compatible controller [0300]: nVidia Corporation G92 [GeForce 8800 GT] [10de:0611] (rev a2)03:00.0 Ethernet controller [0200]: Realtek Semiconductor Co., Ltd. RTL8111/8168B PCI Express Gigabit Ethernet controller [10ec:8168] (rev 02)
• You are looking for the line that I have highlighted in bold. If it's there then you can proceed.
• But if it's reads something like 00:1f.0 ISA bridge [0601]: Intel Corporation Unknown device [8086:3a16] then you will need to add it. For my GA-EP45-DS3L which uses ICH10, I never had to do this. See FormlerlyKnownAs' thread for more info. You can also find out more here by Gringo Vermelho.

Only proceed with the following once you have satisfied the LPC Interface controller issue above!
• Next for P-States you need your DSDT.aml generated from koalala's ACPI patcher.
• Drag & drop your DSDT.aml on to iASLme's icon and it will make a DSDT.dsl file.
• Open the DSDT.dsl file in TextEdit (or any other text editor you use).
• At the top, under...
DefinitionBlock ("/Volumes......../dsdt.aml", "DSDT", 1, "GBT   ", "GBTUACPI", 0x00001000){
• You'll find...
Scope (_PR)    {        Processor (CPU0, 0x00, 0x00000410, 0x06) {}        Processor (CPU1, 0x01, 0x00000410, 0x06) {}        Processor (CPU2, 0x02, 0x00000410, 0x06) {}        Processor (CPU3, 0x03, 0x00000410, 0x06) {}    }
• which needs to be changed and added to so the whole section will contain the following...

....Scope (_PR) lists your processor cores
....Scope (_PR.CPU0) which will list the P-States, P-State Dependency & C-States.
........Method (_PSS..... Defines your P-States (Performance States)
........Method (_PSD..... Defines your P-State Dependency
........Method (_CST..... Defines your C-States (Idle States)
....Scope (_PR.CPU1) Consists of aliases to CPU0
....Scope (_PR.CPU2) Only if you have a quad core CPU
....Scope (_PR.CPU3) Only if you have a quad core CPU

Here's what mine looks like for reference.
Scope (_PR) // Lists your CPU cores    {        Processor (CPU0, 0, 0x00000410, 6) {}  // I have a Core2Duo Processor with 2 x cores. So this is core 0        Processor (CPU1, 1, 0x00000410, 6) {} // and this is core 1.      }    Scope (_PR.CPU0) // For Core 0, set P-states & C-States    {        Method (_PSS, 0, NotSerialized) // P-states        {            Return (Package(0x05) // this reads 0x05 because I have 5 x P-states. This number should match you total P-states.            {                Package (0x06) { 2670, 0, 10, 10, 0x0A1D, 0 }, // These values are shown in PStateChanger. To see them                Package (0x06) { 2403, 0, 10, 10, 0x091D, 1 }, // on your system, you will need to install the                 Package (0x06) { 2136, 0, 10, 10, 0x081C, 2 }, // VoodooPState.kext by bcc9, in to /S/L/E by dragging                 Package (0x06) { 1869, 0, 10, 10, 0x071B, 3 }, // it on to Kext Utility's icon. Once installed, restart.                 Package (0x06) { 1602, 0, 10, 10, 0x061A, 4 } // Then load PStateChanger to view the results.            })        }        // Added from MasterChief's DSDT v3.1        Method (_PSD, 0, NotSerialized)        {            Return (Package (0x05)            {                0x05,                0x00,                0x00,                0xFC, // Double-checked the 0xFC value with ACPISpec v4.0 pdf                0x02  // Number of Processors - Again if you have a Quad core CPU then this value should read 0x04            })        }        Method (_CST, 0, NotSerialized) // C-states        {            Return (Package (0x04)            {                0x03,                 Package (0x04) {ResourceTemplate () {Register (FFixedHW, 1, 2, 0x000)},1,1,1000},                Package (0x04) {ResourceTemplate () {Register (SystemIO, 8, 0, 0x414)},2,1,500},                Package (0x04) {ResourceTemplate () {Register (SystemIO, 8, 0, 0x415)},3,17,250}            })        }    }    Scope (_PR.CPU1)  // For Core 1, copy P-States & C-States from Core 0. (If quad core, then you'll need this for CPU2 and CPU3    {        Alias (\_PR.CPU0._PSS, _PSS)        Alias (\_PR.CPU0._PSD, _PSD)        Alias (\_PR.CPU0._CST, _CST)    }
But don't do this yet as you'll need to find some numbers first.

• To change yours to look like mine, you'll need to download the attached hnak_s_PStateChanger_and_bcc9_s_VoodooPstate zip file and install VoodooPState.kext (by bcc9) in to /System/Library/Extensions by drag & dropping the VoodooPState.kext on to Kext Utility's icon. Let it run and when it's complete, restart your system. When your system is back up and running, you'll need to run PStateChanger (by hnak). This will then show you the values that need go to in the _PSS section of the DSDT. (See the included screenshot in the attached ZIP folder). Just enter the data for the MHz column and combine the data from FID/VID columns as shown in my screenshot).

• When you have finished using PStateChanger to get your values, then you can remove VoodooPState.kext from /S/L/E by throwing it in the bin and rebooting.

• Note: If you have a quad core CPU then you will need to add references to the Scope (_PR) section and add 2 x extra Scope (_PR.CPUn) sections for your CPU2 and CPU3. Again see FormerlyKnownAs' front page for reference.

• When you have finished editing your DSDT.dsl you can drag & drop it on to iASLme's icon and it will make a DSDT.aml file which you can put in Chameleon's /Extra folder (keep a backup of your current one). Then remove NullCPUPowerManagement.kext and SleepEnabler.kext from /E/E.

• The final thing you need to do is edit your SMBIOS.plist and change your Mac model to read MacPro3,1.
EDIT: Thanks to mm67, I am now using iMac10,1 as my MacModel.

• You can now reboot.

• I also went in to my Advanced BIOS Features screen and made sure I had the following enabled.
Attached File  Advanced_BIOS_Features.jpg   55.87KB   158 downloads
EDIT: Since writing this, there have been some advancements posted in the Gigabyte DSDT Fix Thread:
This one is regarding BIOS settings as a result of a discussion about SSDT tables.
This one is regarding C-States thanks to mm67 for his findings.

• You can monitor your P-states with Mojodojo's VoodooMonitor. To do this, add the VoodooMonitor.kext in to Chameleon's /Extra/Extensions folder and reboot. Then you can run VoodooMonitor to view the changes in your CPU's power (click the status tab). Note: VoodooMonitor.kext will report slightly different FID/VID values as it uses a less accurate algorithm to calculate them than bcc9's VoodooPState.kext. But (I think this is right) VoodooMonitor is less of a resource hog that PStateChanger so that's why we use it. These are the tools we have for now, and until another tool is developed to just monitor P-States then we have to make do.

• You can see if P-States and C-States are working using IORegistryExplorer and looking at the data for ACPI_SMC_PlatformPlugin. CSTInfo shows C-States are loaded and PerformanceStateArray shows your P-States. Here's what mine looks like.
Attached File  IORegScreenShot.jpg   138.67KB   536 downloads

Hope that helps give a little insight? But remember this is a basic outline to help with FormerlyKnownAs' thread and you can find all answers and a hell of a lot more information there. http://www.insanelym...howtopic=181631

Finally, I have to say thanks to FormerlyKnownAs and everyone on his thread for helping me to learn about this subject and getting this working on my system.

Here's the downloads to help you for this (Remember they are Snow Leopard versions). If you need them for 10.5 then you will have to search for them.

Attached Files



#299
avizana

avizana

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Hi All,

I've installed sl 10A432 in my computer but I can't get the system to load.
I got to the NO CPU HPETS.

I think that its because a bad dsdt file.

my chipset is Gigabyte EP43-DS3L
ATI 4300HD
E5200 processor

Will be glad for some support,

Thx

#300
kabutop

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Wow cool !!!
I'll try this as soon I can and I'll report success (or not) in this thread ;-)

Thanks





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