130 replies to this topic

[ab___73]

Update:

Upload of Release version 1 with source code.

Sorry folks, still no /Extras or SMBIOS compatibility due to filesize restriction with boot1h.
Although this is Work in Progress.

Change log:

+ load upto 30 SSDT tables.
+ load extra additional SSDT tables.
+ ACPI v1 and v2 and v3 support.
+ source code refined.

Thanks to everyone that uploaded their SSDT tables it's helped,

 ssdtboot_chameleon2.zip   314.39K   2646 downloads

Update:

I've now tidied up the source code and added the ability to load up to 30 SSDT tables. I'm currently testing it, If successfull I will post the bootloader and the source code tonight.

I'm having a problem with adding the SMBIOS source code diff, there seems to be a limit on the filesize of the boot file.
If I keep the filesize below 62000bytes the bootloader works, as soon as I load the SMBIOS + DSDT + SSDT patch the filesize grows to 62700bytes when you boot with this file size you get the infamous /boot0 hang.

I wonder if anyone knows anything about the boot filesize restriction?

Found out why, boot1h can only load <64k boot files!!

-------------------


I've modified the very popular chameleon DSDT override bootloader so that it loads modified DSDT and SSDT tables.

This can help you:

+ Understand why you are getting DSDT compile errors, DSDT sometimes references external methods contained within the SSDT tables.

+ Fix Powermanagement.

+ Fix PStates (CPU performance management)

+ Fix CStates (Power Saving managenent)

+ Fix TStates (CPU throttling)

+ View SATA controllers ACPI functions.

This version is the debug version, I shall release a non-debug version later along with the source code.

Thanks to everyone involved with the Chameleon bootloader and DSDT patching project.

To use this bootloader.

Extract the attached to a folder.
  
Use Terminal to cd into the folder.

Backup your existing bootloader.

sudo cp /boot /boot.bak

Copy this bootloader to use.

sudo cp ssdtboot /boot

To extract your SSDT tables.

Usind terminal cd in to the folder that you extracted the files to and run:

./getSSDT5.sh

This will give you decompiled SSDT tables.

SSDT-0.dsl
SSDT-1.dsl
..
SSDT-4.dsl

The number of SSDT Tables depends on the hardware you have.

Open these files in a text editor so you can modify them.

Once you have modified the SSDT tables, run the following command in terminal in the same folder to compile them:

./iasl -sa SSDT-0.dsl
./iasl -sa SSDT-1.dsl
./iasl -sa SSDT-2.dsl
..

./iasl -sa SSDT-x.dsl
(where x is the table you wish to compile)

Copy the compiled files to root.

cp SSDT-x.aml /
(where x is the table you wish to copy)

once you reboot the bootloader will override your SSDT tables.

Use these tutorials for DSDT.

DSDT Patcher

DSDT BIOS Patcher

You can use the following Boot argument to load the default oem SSDT tables instead of the modified ones.
(Use this at darwin boot)
  
oemSSDT=y

To check it's working (optional) use the voodoo kernel with the following boot arguments.

kprintf=1 -v

Once you are in OSX

run the following within terminal.
sudo dmesg | grep ACPI

Sample of OEM SSDT Tables:

ACPI: SSDT @ 0x7f7f4440/0x0024 (v001 HP	   HPQNLP 0x00000001 MSFT 0x0100000E)
ACPI: SSDT @ 0x7f7f4464/0x0326 (v001 HP	   HPQSAT 0x00000001 MSFT 0x0100000E)
ACPI: SSDT @ 0x7f7f4f9d/0x025F (v001 HP	  Cpu0Tst 0x00003000 INTL 0x20060317)
ACPI: SSDT @ 0x7f7f51fc/0x00A6 (v001 HP	  Cpu1Tst 0x00003000 INTL 0x20060317)
ACPI: SSDT @ 0x7f7f52a2/0x04D7 (v001 HP		CpuPm 0x00003000 INTL 0x20060317)

Sample of SSDT tables that have been overridden:

ACPI: SSDT @ 0x7f7f4440/0x0024 (v001 HP	   HPQNLP 0x00000001 MSFT 0x0100000E)
ACPI: SSDT @ 0x7f7f4464/0x0326 (v001 HP	   HPQSAT 0x00000001 MSFT 0x0100000E)
ACPI: SSDT @ 0x7f7f4f9d/0x025F (v001 HP	  Cpu0Tst 0x00003000 INTL 0x20060317)
ACPI: SSDT @ 0x7f7f51fc/0x00A6 (v001 HP	  Cpu1Tst 0x00003000 INTL 0x20060317)
ACPI: SSDT @ 0x1956000/0x051E (v001 HP		CpuPm 0x00003000 INTL 0x20080926)

  
Notice line 5 (SSDT-4)  e.g. 0x7f7f52a2/0x4D7 -> 0x1956000/0x051E

This address change means that the modified SSDT table has loaded successfully.

Please share your SSDT tables so we can help each other. Please upload them to this topic.

I hope this helps someone.



Cheers,

AB

Voodoo kernel can be found here:

voodoo kernel

[Dr. Hurt]

Does that mean speedstep and power management will finally work properly?
Also does this bootloader support /extra folder?

I can't believe the amount of breakthroughs this project has seen over the past 3 years. From the deadmoo image which erased my entire family album (LOL... I had a backup) to installing OS X from a retail and running it without touching the system!!! Now we are closer than ever to a real Mac.

[OneSman7]

It will always be hackintosh cause pc and mac differ much in harware.

[ab___73]

Dr. Hurt, on Jan 9 2009, 07:47 PM, said:

Does that mean speedstep and power management will finally work properly?
Also does this bootloader support /extra folder?

I can't believe the amount of breakthroughs this project has seen over the past 3 years. From the deadmoo image which erased my entire family album (LOL... I had a backup) to installing OS X from a retail and running it without touching the system!!! Now we are closer than ever to a real Mac.

@Dr. Hurt
SSDT tables usually contain most of the SpeedStep (PStates and TStates) and Power Management (CStates) methods (functions) so it potentially could solve this problem.

It will certainly help us research and develop this idea.


I've patched the Mackerintel version from the topic:

http://forum.insanel...howtopic=132757

So if that supports the /extra folder then this will too.
Although I'll look into it further.

--
AB

[Dr. Hurt]

The potential this has is extremely overwhelming. Desktop users will no longer get overheating and laptop users will get better battery life and improved performance. I can't wait to see what this will develop into.
Thank you very much, ab___73

By the way, it will support the /extra folder since it's based on chameleon.

Quote

It will always be hackintosh cause pc and mac differ much in harware.

When we say we're getting closer to a real Mac, we mean functionally not structurally. And by the way, there isn't much difference between PC and Mac hardware at all. Mac use the standard Intel mobile chipsets used is all other laptop brands (Dell, Acer, Toshiba....etc)! It's not like the PPC days anymore.

[ab___73]

SSDT and DSDT dump from a Macbook Pro 4.1

Thanks to skippyretard for this!!

For educational purposes only...

 MBP4_1.zip   18K   435 downloads

[roisoft]

Great work

attached the ssdt for

MB 2.1
MB 3.1
MB 5.1
MBP 5.1
IM 5.1
IM 7.1
MP 3.1

hope it helps ..

 SSDT_MB21.zip   2.27K   180 downloads    DSDT_macbook2_1.zip   316.2K   168 downloads
 SSDT_MB31.zip   4.13K   198 downloads    DSDT_Macbook3.1.dsl.zip   13.85K   186 downloads
 SSDT_MBP3_1.zip   4.13K   174 downloads  DSDT_MBP3_1.zip   13.71K   166 downloads
 SSDT_MB51.zip   2.46K   151 downloads    DSDT_MB5.1.zip   16.45K   142 downloads
 SSDT_MBP51.zip   2.46K   221 downloads  DSDT_MBP5.1.zip   17.48K   242 downloads
 SSDT_IM51.zip   5.65K   125 downloads      DSDT_iMac5.1.zip   11.91K   130 downloads
 SSDT_IM71.zip   4.13K   194 downloads      DSDT_iMac7.1.zip   12.34K   176 downloads
 SSDT_MP1.1.zip   12.09K   168 downloads    DSDT_MacPro1.1.zip   13.16K   179 downloads
 SSDT_MP31.zip   16.4K   434 downloads    DSDT_MacPro3.1.zip   13.94K   432 downloads

 DSDT_Macmini.dsl.zip   11.52K   140 downloads
 DSDT_MacbookAir.dsl.zip   13.79K   145 downloads

Attached Files

•  DSDT_MacPro1.1.zip   13.16K   194 downloads

[ab___73]

roisoft, on Jan 9 2009, 10:50 PM, said:

attached the ssdt from MB 5.1 & MBP 5.1  IM 5.1 & IM 7.1 MP 3.1

hope it helps ..

Thanks very much for the dumps.

How did you extract the ssdt from the MP3.1?
It seems to be very different from normal i.e. 20 tables?
This dump even contains the cst (cstates) and ist (pstates) that are usually hard coded into the memory of the BIOS?
I would be very interested in the dsdt from the MP3.1, could you provide this also?

Thanks for your help. Great work (as always )!!

--
AB

[roisoft]

i have the ioregs saved with ioregistryexplorer, so open the ioreg, select AppleACPIPlatformExpert, ACPI tables, select whatever you need, copy te table, open a hexeditor , paste the table into a new file and save as "xxx.dat",  decompile the dat with iasl ...






 DSDT_MP31.zip   13.94K   127 downloads

[ab___73]

@roisoft

Expertly done.

Thanks again!!

[mitch_de]

This could be an way for my Gigabyte EP-35-DS3 (F3 Bios) - didnt have any ACPI Pstates in the SSDT! VoodooPower(speedstep) never seem them.
Some BIOS seams to have that Pstates forgotten.
How to add (not change some already ssdt found ) those ?

Attached EP-DS3 SSDT (its only one).

Attached Files

•  SSDT_0.dsl.zip   1.11K   61 downloads

[Pink Waters]

I Think this would be very interesting, if it solves sleep problems (not due graphics cards) on hackintosh!
of course and shut down issue too.

[roisoft]

the power states from a Mac Pro...

CPU2
------------
---------------
-----------------

Name (_PSS, Package (0x02)
		{
			Package (0x06) 
			{
				0x00000AF0,
				0x00013880,
				0x0000000A,
				0x0000000A,
				0x0000071F, 
				0x0000071F 
			}, 


			Package (0x06)
			{
				0x00000960, 
				0x00007D00, 
				0x0000000A, 
				0x0000000A, 
				0x0000061A, 
				0x0000061A
			}
		})

this info can be useful , from linux

Quote

6. complete the _PSS table
the _PSS table in the SSDT section of your DSDT file contains the list for the availabe speedsteps.
the first line contains the number of the speedsteps. so you have to change

Name (_PSS, Package (0x02)

into

Name (_PSS, Package (0x05)

now you have to add three "Package (0x06)" tables for the three missing speedsteps
each speedstep entry contains six data fields in the following order:

CoreFreq
Power
TransitionLatency
BusMasterLatency
Control
Status

as far as i know for us the first (CoreFreq) and the last two lines (Control, Status) are important.
the first line is the frequncy in HEX. so 5DC for example means 1500.
in the Control line the first 4 bit set the frequency/100. the next 8 bit set the voltage in millivolts * 16 + 700
so for example 612 in the control line measn: 600mhz and voltage = 18 * 16 + 700 = 988 mV (HEX 12 = DEC 18).
the Status line must just be an unique number for each speedstep.
you find the information for the recommended voltages somewhere here: http://www.intel.com...cumentation.htm
all in all at the end your _PSS table should look somehow like this:

Name (_PSS, Package (0x05)
        {
            Package (0x06)
            {
                0x000005DC,
                0x00000000,
                0x00000064,
                0x0000006E,
                0xF27,
                0x00000000
            },

            Package (0x06)
            {
                0x000004B0,
                0x00000000,
                0x00000064,
                0x0000006E,
                0xC21,
                0x00000001
            },

            Package (0x06)
            {
                0x000003E8,
                0x00000000,
                0x00000064,
                0x0000006E,
                0xA1C,
                0x00000002
            },

            Package (0x06)
            {
                0x00000320,
                0x00000000,
                0x00000064,
                0x0000006E,
                0x817,
                0x00000003
            },

            Package (0x06)
            {
                0x00000258,
                0x00000000,
                0x00000064,
                0x0000006E,
                0x612,
                0x00000004
            }
        })

more info

Quote

// 1800mhz 13.5x 133mhz 1.300v
            Package (0x06)
            {
                0x00000708,
                0x000076D4,
                0x0000007D,
                0x0000007D,
                0x00D059D5,
                0x000001D5
            },

// 1730mhz 13x 133mhz 1.250v
            Package (0x06)
            {
0x000006C2,
0x00006996,
0x0000007D,
0x0000007D,
0x00D05A34,
0x00000234
            },

// 1663mhz 12.5x 133mhz 1.200v
            Package (0x06)
            {
0x0000067F,
0x00005D86,
0x0000007D,
0x0000007D,
0x00005A63,
0x00000263
            },

// 1596mhz 12x 133mhz 1.200v
            Package (0x06)
            {
0x0000063C,
0x0000599B,
0x0000007D,
0x0000007D,
0x00005A62,
0x00000262
            },

// 1530mhz 11.5x 133mhz 1.200v
            Package (0x06)
            {
0x000005FA,
0x00005610,
0x0000007D,
0x0000007D,
0x00D05A61,
0x00000261
            },

// 1463mhz 11x 133mhz 1.150v
            Package (0x06)
            {
                0x000005B7,
                0x00004B94,
                0x0000007D,
                0x0000007D,
                0x00D05AA0,
                0x000002A0
            },

// 1396mhz 10.5x 133mhz 1.150v
            Package (0x06)
            {
                0x00000574,
                0x0000481E,
                0x0000007D,
                0x0000007D,
                0x00D05AAF,
                0x000002AF
            },

// 1330mhz 10x 133mhz 1.150v
            Package (0x06)
            {
                0x00000532,
                0x000044B5,
                0x0000007D,
                0x0000007D,
                0x00D05AAE,
                0x000002AE
            },

// 1266mhz 9.5x 133mhz 1.100v
            Package (0x06)
            {
                0x000004F2,
                0x00003BD6,
                0x0000007D,
                0x0000007D,
                0x00D05AED,
                0x000002ED
            },

// 1199mhz 9x 133mhz 1.050v
            Package (0x06)
            {
                0x000004AF,
                0x00003030,
                0x0000007D,
                0x0000007D,
                0x00D05B2C,
                0x0000032C
            },

// 1133mhz 8.5x 133mhz 0.975v
            Package (0x06)
            {
                0x0000046D,
                0x00002A12,
                0x0000007D,
                0x0000007D,
                0x00D05B8B,
                0x0000038B
            },

// 1066mhz 8x 133mhz 0.925v
            Package (0x06)
            {
                0x0000042A,
                0x000023A0,
                0x0000007D,
                0x0000007D,
                0x00D05BCA,
                0x000003CA
            },

// 999mhz 7.5x 133mhz 0.925v
            Package (0x06)
            {
                0x000003E7,
                0x00002163,
                0x0000007D,
                0x0000007D,
                0x00D05BC9,
                0x000003C9
            },

// 933mhz 7x 133mhz 0.925v
            Package (0x06)
            {
                0x000003A5,
                0x00001F2E,
                0x0000007D,
                0x0000007D,
                0x00D05BC8,
                0x000003C8
            },

// 866mhz 6.5x 133mhz 0.925v
            Package (0x06)
            {
                0x00000362,
                0x00001CF1,
                0x0000007D,
                0x0000007D,
                0x00D05BC7,
                0x000003C7
            },

// 800mhz 6x 133mhz 0.925v
            Package (0x06)
            {
                0x00000320,
                0x00001ABD,
                0x0000007D,
                0x0000007D,
                0x00D05BC6,
                0x000003C6
            },

// 733mhz 5.5x 133mhz 0.925v
            Package (0x06)
            {
                0x000002DD,
                0x0000187F,
                0x0000007D,
                0x0000007D,
                0x00D05BC5,
                0x000003C5
            },

// 666mhz 5x 133mhz 0.925v
            Package (0x06)
            {
                0x0000029A,
                0x00001642,
                0x0000007D,
                0x0000007D,
                0x00D05BC4,
                0x000003C4
            },

// 533mhz 4x 133mhz 0.925v
            Package (0x06)
            {
                0x00000215,
                0x000011D0,
                0x0000007D,
                0x0000007D,
                0x00D05BD2,
                0x000003D2
            }

[BlackCH]

Here are the SSDT tables from my laptop (on the signature). Hope it helps

Attached Files

•  HP6720s_SSDT.zip   5.44K   39 downloads

[J.T]

modified what ?
when i open ssdt file .I dont know what is need to modified?

[mitch_de]

This is really only for expierenced + known ACPI professionals possible i think.
Changing to wrong PSTATES (including mVolts!!!) may damage the CPU.

[pere]

Hi, here i have attached ALL the acpi tables from my Sony Vaio Cr11R/Z laptop, i use  Appleintelcpupowermanagement.kext for speedstep (i get same cpu temperatures as genericintelcpupowermanagement. kext from Superhai, and faster cpu response when stepping with apple kext, fan also works as spected).
The only problem i have is when i shutdown the laptop, it restarts, (This has been my nightmare since 10.5.1).

Tables included:
APIC,APIC-1,BOOT,DSDT,FACP,HPET,MCFG,RSDT,SLIC,SSDT,SSDT-1,SSDT-2,SSDT-3,SSDT-4.

I got this error when decompiling SSDT.dat:

ACPI Error (dmutils-0261): Argument count mismatch for method PRIT 1 0 [20080926]
ACPI Error (dmutils-0261): Argument count mismatch for method SDT0 2 0 [20080926]
ACPI Error (dmutils-0261): Argument count mismatch for method SDT1 2 0 [20080926]

Extra information:
I have modified my Sony dsdt, ported code from Macbook3.1 for bluetooth, network card, Airport (for my dell 1390), added DTGP method to _wak, Changed (DEVICE) names to match Macbook names, Added _SUN to network pci´s for Profiler recognition, added HPET and RTC patch, then flashed it to bios (That´s why my dsdt will be different from other Sony vaio´s when readed from memory).
I haven´t add Video or audio injection cause incompatibility with ALC262 and ATIx2300

I have even loaded the whole DSDT.aml from the macbook3,1, just changing a little the cpu code, harware adresses and getting back my PCI IRQ´s (LNKA,LNKB,LNKC...etc) to the macbook code  and removing the IRQ to DEVICE (SMC). (As pointed by Roisoft, thanks, bro.)  

Hope this info helps.

Attached Files

•  Sony_Vaio_CR11Z_R__ACPI_tables.zip   41.33K   59 downloads

[wayover]

2 Optimizations and 0 SSDT File loaded Sucessfully.. probably, that I did something wrong. Goes to sleep, but do not wake up.


 iDQ965GFdsdt_ssdt.zip   11.33K   19 downloads

[BlackCH]

pere, on Jan 10 2009, 03:27 AM, said:

I have modified my Sony dsdt, ported code from Macbook3.1 for bluetooth, network card, Airport (for my dell 1390), added DTGP method to _wak, Changed (DEVICE) names to match Macbook names, Added _SUN to network pci´s for Profiler recognition, added HPET and RTC patch, then flashed it to bios (That´s why my dsdt will be different from other Sony vaio´s when readed from memory).
I haven´t add Video or audio injection cause incompatibility with ALC262 and ATIx2300

I have even loaded the whole DSDT.aml from the macbook3,1, just changing a little the cpu code, harware adresses and getting back my PCI IRQ´s (LNKA,LNKB,LNKC...etc) to the macbook code  and removing the IRQ to DEVICE (SMC). (As pointed by Roisoft, thanks, bro.)  

Hope this info helps.

Can you post your 'ioreg -ls' output please? Would be very usefull; At least the parts with the devices you modified on your dsdt tables

[ab___73]

mitch_de, on Jan 10 2009, 02:23 AM, said:

This is really only for expierenced + known ACPI professionals possible i think.
Changing to wrong PSTATES (including mVolts!!!) may damage the CPU.

I have tried to overvolt my processor using PSTATES and it never goes over the factory max setting.

So I've never damaged my processor using wrong voltage info with PSTATES.

--
AB

wayover, on Jan 10 2009, 03:25 AM, said:

2 Optimizations and 0 SSDT File loaded Sucessfully.. probably, that I did something wrong. Goes to sleep, but do not wake up.

Use oemSSDT=y at darwin boot to load default oem tables.
or
Rename SSDT-0.aml file in your root folder to SSDT-0.old

mv /SSDT-0.aml /SSDT-0.old

Reboot.

When you do this does it sleep, but not wake up?

What motherboard do you have?