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P5K PRO - Snow Leopard installation...
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I am going to waste spent some time today trying to change this code snippet:
CODE
Name (PRWP, Package (0x02)
{
Zero,
Zero
})
Method (GPRW, 2, NotSerialized)
{
Store (Arg0, Index (PRWP, Zero))
Store (ShiftLeft (SS1, One), Local0)
Or (Local0, ShiftLeft (SS2, 0x02), Local0)
Or (Local0, ShiftLeft (SS3, 0x03), Local0)
Or (Local0, ShiftLeft (SS4, 0x04), Local0)

If (And (ShiftLeft (One, Arg1), Local0))
{
Store (Arg1, Index (PRWP, One))
}
Else
{
ShiftRight (Local0, One, Local0)
FindSetLeftBit (Local0, Index (PRWP, One))
}

Return (PRWP)
}

One of the reasons is that I looked at it a couple of times, and I keep wondering about the red line. I mean S2 isn't even supported on our Asus board so what is it doing there? Why add something when you, as developer, know that it is useless? A contractor getting payed by the line maybe?

Not to mention that this code is called up to 16 times at boot time (UHC[1-6], P0P[2-9], PCIB, EHCI and UHCI). 14 times minimum (without EHCI and UHCI). And all this bit shifting can be done with one single line. I think. What if I make it static? I mean it sure isn't going to change at run time. Does it? Nah. No way. Yeah. Let me give it a try. I like to burn my fingers on other peoples code...

This should work:
CODE
Field (BIOS, ByteAcc, NoLock, Preserve)
{
SLPM, 8,
}

Name (SLPS, Zero)
Name (PRWP, Package (0x02)
{
Zero,
Zero
})

Method (GPRW, 2, NotSerialized)
{
Store (Arg0, Index (PRWP, Zero))

If (And (ShiftLeft (One, Arg1), SLPS))
{
Store (Arg1, Index (PRWP, One))
}
Else
{
FindSetLeftBit (SLPM, Index (PRWP, One))
}

Return (PRWP)
}

At least it compiles. ACPI CA Debugger started... Oops. I forgot to add ShiftLeft (SLPM, One, SLPS) Method _PIC is my temporarily target for it. And now it works. I think. Testing... Done. It works.

Uhg. A mere four bytes smaller. Not exactly what I hoped for, but it wasn't my main concern. Boot speed is wink.gif

And the names might change. Probably. Already done. BTW: The new Field (BIOS... should be put under your current one. Do not replace it with the new one! It's an addition to the current one, to get the byte value of the sleep state bits.

Note: This is an Asus specific change. Do not add Method (GPRW) when you don't already have one. However, every BIOS with Power Management (and sleep) settings should have something like this.

This change will also be part of DSDT V3.2

Right. Kids are home from school so daddy is going to have some quality time now. Later folks.

And as always... Happy Hacking!
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QUOTE (Master Chief @ Nov 20 2009, 08:04 PM) *
And now it works. I think. Testing... Done. It works.


Works ok for me, thanks. V3.2 must be near.

Enjoy the QT.
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QUOTE (DB1 @ Nov 20 2009, 10:09 PM) *
Works ok for me, thanks. V3.2 must be near.

Enjoy the QT.

Thanks, and you are right. We're going to release DSDT V3.2 Saturday (in a few hours).
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